From: Michael Rolnik <mrolnik@gmail.com>
To: qemu-devel@nongnu.org
Cc: thuth@redhat.com, dovgaluk@ispras.ru,
richard.henderson@linaro.org, Michael Rolnik <mrolnik@gmail.com>,
imammedo@redhat.com, philmd@redhat.com
Subject: [Qemu-devel] [PATCH v29 8/8] target/avr: Add tests
Date: Sat, 24 Aug 2019 21:46:35 +0300 [thread overview]
Message-ID: <20190824184635.34192-9-mrolnik@gmail.com> (raw)
In-Reply-To: <20190824184635.34192-1-mrolnik@gmail.com>
1. Avocado test
The test is based on
https://github.com/seharris/qemu-avr-tests/tree/master/free-rtos/Demo
demo which. If working correctly, prints 'ABCDEFGHIJKLMNOPQRSTUVWX' out.
it also demostrates that timer and IRQ are working
2. Boot serial test
Prinit out 'T' through serial port
Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
tests/Makefile.include | 2 ++
tests/acceptance/machine_avr6.py | 36 ++++++++++++++++++++++++++++++++
tests/boot-serial-test.c | 10 +++++++++
3 files changed, 48 insertions(+)
create mode 100644 tests/acceptance/machine_avr6.py
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 49684fd4f4..dbaeb87572 100644
--- a/tests/Makefile.include
+++ b/tests/Makefile.include
@@ -202,6 +202,8 @@ check-qtest-i386-y += tests/test-x86-cpuid-compat$(EXESUF)
check-qtest-i386-y += tests/numa-test$(EXESUF)
check-qtest-x86_64-y += $(check-qtest-i386-y)
+check-qtest-avr-y += tests/boot-serial-test$(EXESUF)
+
check-qtest-alpha-y += tests/boot-serial-test$(EXESUF)
check-qtest-alpha-$(CONFIG_VGA) += tests/display-vga-test$(EXESUF)
diff --git a/tests/acceptance/machine_avr6.py b/tests/acceptance/machine_avr6.py
new file mode 100644
index 0000000000..0601080b01
--- /dev/null
+++ b/tests/acceptance/machine_avr6.py
@@ -0,0 +1,36 @@
+import logging
+import time
+import distutils.spawn
+
+from avocado import skipUnless
+from avocado_qemu import Test
+from avocado.utils import process
+
+class AVR6Machine(Test):
+ timeout = 5
+
+ def test_freertos(self):
+ """
+ :avocado: tags=arch:avr
+ :avocado: tags=machine:sample
+ """
+ """
+ https://github.com/seharris/qemu-avr-tests/raw/master/free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf
+ constantly prints out 'ABCDEFGHIJKLMNOPQRSTUVWXABCDEFGHIJKLMNOPQRSTUVWX'
+ """
+ rom_url = 'https://github.com/seharris/qemu-avr-tests'
+ rom_url += '/raw/master/free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf'
+ rom_hash = '7eb521f511ca8f2622e0a3c5e8dd686efbb911d4'
+ rom_path = self.fetch_asset(rom_url, asset_hash=rom_hash)
+
+ self.vm.set_machine('sample')
+ self.vm.add_args('-bios', rom_path)
+ self.vm.add_args('-nographic')
+ self.vm.launch()
+
+ time.sleep(2)
+ self.vm.shutdown()
+
+ match = 'ABCDEFGHIJKLMNOPQRSTUVWXABCDEFGHIJKLMNOPQRSTUVWX'
+
+ self.assertIn(match, self.vm.get_log())
diff --git a/tests/boot-serial-test.c b/tests/boot-serial-test.c
index 24852d4c7d..22cbaccc1b 100644
--- a/tests/boot-serial-test.c
+++ b/tests/boot-serial-test.c
@@ -16,6 +16,15 @@
#include "qemu/osdep.h"
#include "libqtest.h"
+static const uint8_t bios_avr[] = {
+ 0x88, 0xe0, /* ldi r24, 0x08 */
+ 0x80, 0x93, 0xc1, 0x00, /* sts 0x00C1, r24 ; Enable tx */
+ 0x86, 0xe0, /* ldi r24, 0x06 */
+ 0x80, 0x93, 0xc2, 0x00, /* sts 0x00C2, r24 ; Set the data bits to 8 */
+ 0x84, 0xe5, /* ldi r24, 0x54 */
+ 0x80, 0x93, 0xc6, 0x00, /* sts 0x00C6, r24 ; Output 'T' */
+};
+
static const uint8_t kernel_mcf5208[] = {
0x41, 0xf9, 0xfc, 0x06, 0x00, 0x00, /* lea 0xfc060000,%a0 */
0x10, 0x3c, 0x00, 0x54, /* move.b #'T',%d0 */
@@ -92,6 +101,7 @@ typedef struct testdef {
static testdef_t tests[] = {
{ "alpha", "clipper", "", "PCI:" },
+ { "avr", "sample", "", "T", sizeof(bios_avr), NULL, bios_avr },
{ "ppc", "ppce500", "", "U-Boot" },
{ "ppc", "40p", "-vga none -boot d", "Trying cd:," },
{ "ppc", "g3beige", "", "PowerPC,750" },
--
2.17.2 (Apple Git-113)
next prev parent reply other threads:[~2019-08-24 18:53 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-24 18:46 [Qemu-devel] [PATCH v29 0/8] QEMU AVR 8 bit cores Michael Rolnik
2019-08-24 18:46 ` [Qemu-devel] [PATCH v29 1/8] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-08-26 7:21 ` Thomas Huth
2019-08-26 7:53 ` Michael Rolnik
2019-08-26 8:00 ` Thomas Huth
2019-08-27 10:59 ` Sarah Harris
2019-10-12 7:22 ` Philippe Mathieu-Daudé
2019-08-24 18:46 ` [Qemu-devel] [PATCH v29 2/8] target/avr: Add instruction helpers Michael Rolnik
2019-08-24 18:46 ` [Qemu-devel] [PATCH v29 3/8] target/avr: Add instruction decoding Michael Rolnik
2019-08-24 18:46 ` [Qemu-devel] [PATCH v29 4/8] target/avr: Add instruction translation Michael Rolnik
2019-08-24 18:46 ` [Qemu-devel] [PATCH v29 5/8] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-08-24 18:46 ` [Qemu-devel] [PATCH v29 6/8] target/avr: Add example board configuration Michael Rolnik
2019-08-24 18:46 ` [Qemu-devel] [PATCH v29 7/8] target/avr: Register AVR support with the rest of QEMU, the build system, and the MAINTAINERS file Michael Rolnik
2019-08-26 6:01 ` Thomas Huth
2019-08-24 18:46 ` Michael Rolnik [this message]
2019-08-26 5:39 ` [Qemu-devel] [PATCH v29 8/8] target/avr: Add tests Thomas Huth
2019-08-26 9:23 ` Alex Bennée
2019-08-26 17:13 ` Richard Henderson
2019-08-27 9:25 ` Alex Bennée
2019-08-27 9:29 ` Pavel Dovgalyuk
2019-10-12 7:17 ` Philippe Mathieu-Daudé
2019-10-12 14:11 ` Pavel Dovgalyuk
2019-08-26 7:09 ` [Qemu-devel] [PATCH v29 0/8] QEMU AVR 8 bit cores Pavel Dovgalyuk
2019-08-26 7:46 ` Michael Rolnik
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