From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Christian Svensson" <bluecmd@google.com>,
"Andrew Jeffery" <andrew@aj.id.au>,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Cédric Le Goater" <clg@kaod.org>,
"Joel Stanley" <joel@jms.id.au>
Subject: [Qemu-devel] [PATCH 08/10] aspeed/smc: Calculate checksum on normal DMA
Date: Wed, 4 Sep 2019 09:05:04 +0200 [thread overview]
Message-ID: <20190904070506.1052-9-clg@kaod.org> (raw)
In-Reply-To: <20190904070506.1052-1-clg@kaod.org>
From: Christian Svensson <bluecmd@google.com>
This patch adds the missing checksum calculation on normal DMA transfer.
According to the datasheet this is how the SMC should behave.
Verified on AST1250 that the hardware matches the behaviour.
Signed-off-by: Christian Svensson <bluecmd@google.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ssi/aspeed_smc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 5c3436db5e8f..9ffc7e01179a 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -989,6 +989,7 @@ static void aspeed_smc_dma_rw(AspeedSMCState *s)
s->regs[R_DMA_FLASH_ADDR] += 4;
s->regs[R_DMA_DRAM_ADDR] += 4;
s->regs[R_DMA_LEN] -= 4;
+ s->regs[R_DMA_CHECKSUM] += data;
}
}
--
2.21.0
next prev parent reply other threads:[~2019-09-04 7:18 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-04 7:04 [Qemu-devel] [PATCH 00/10] Aspeed: machine extensions and fixes Cédric Le Goater
2019-09-04 7:04 ` [Qemu-devel] [PATCH 01/10] hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500 Cédric Le Goater
2019-09-04 7:04 ` [Qemu-devel] [PATCH 02/10] aspeed: add a GPIO controller to the SoC Cédric Le Goater
2019-09-04 7:04 ` [Qemu-devel] [PATCH 03/10] aspeed: Remove unused SoC definitions Cédric Le Goater
2019-09-04 7:05 ` [Qemu-devel] [PATCH 04/10] aspeed: Use consistent typenames Cédric Le Goater
2019-09-04 7:05 ` [Qemu-devel] [PATCH 05/10] aspeed/smc: Add support for DMAs Cédric Le Goater
2019-09-04 7:05 ` [Qemu-devel] [PATCH 06/10] aspeed/smc: Add DMA calibration settings Cédric Le Goater
2019-09-04 7:05 ` [Qemu-devel] [PATCH 07/10] aspeed/smc: Inject errors in DMA checksum Cédric Le Goater
2019-09-04 7:05 ` Cédric Le Goater [this message]
2019-09-04 7:05 ` [Qemu-devel] [PATCH 09/10] aspeed/scu: Introduce per-SoC SCU types Cédric Le Goater
2019-09-04 7:05 ` [Qemu-devel] [PATCH 10/10] aspeed/scu: Introduce a aspeed_scu_get_apb_freq() routine Cédric Le Goater
2019-09-11 10:30 ` [Qemu-devel] [PATCH 00/10] Aspeed: machine extensions and fixes Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190904070506.1052-9-clg@kaod.org \
--to=clg@kaod.org \
--cc=andrew@aj.id.au \
--cc=bluecmd@google.com \
--cc=joel@jms.id.au \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).