From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [PULL 00/16] tcg patch queue
Date: Wed, 25 Sep 2019 11:45:32 -0700 [thread overview]
Message-ID: <20190925184548.30673-1-richard.henderson@linaro.org> (raw)
This is v4 of my notdirty + rom patch set with two suggested name
changes (qemu_build_not_reached, TLB_DISCARD_WRITE) from David and Alex.
r~
The following changes since commit 240ab11fb72049d6373cbbec8d788f8e411a00bc:
Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20190924' into staging (2019-09-24 15:36:31 +0100)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-tcg-20190925
for you to fetch changes up to ae57db63acf5a0399232f852acc5c1d83ef63400:
cputlb: Pass retaddr to tb_check_watchpoint (2019-09-25 10:56:28 -0700)
----------------------------------------------------------------
Fixes for TLB_BSWAP
Coversion of NOTDIRTY and ROM handling to cputlb
Followup cleanups to cputlb
----------------------------------------------------------------
Richard Henderson (16):
exec: Use TARGET_PAGE_BITS_MIN for TLB flags
cputlb: Disable __always_inline__ without optimization
qemu/compiler.h: Add qemu_build_not_reached
cputlb: Use qemu_build_not_reached in load/store_helpers
cputlb: Split out load/store_memop
cputlb: Introduce TLB_BSWAP
exec: Adjust notdirty tracing
cputlb: Move ROM handling from I/O path to TLB path
cputlb: Move NOTDIRTY handling from I/O path to TLB path
cputlb: Partially inline memory_region_section_get_iotlb
cputlb: Merge and move memory_notdirty_write_{prepare,complete}
cputlb: Handle TLB_NOTDIRTY in probe_access
cputlb: Remove cpu->mem_io_vaddr
cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access
cputlb: Pass retaddr to tb_invalidate_phys_page_fast
cputlb: Pass retaddr to tb_check_watchpoint
accel/tcg/translate-all.h | 8 +-
include/exec/cpu-all.h | 23 ++-
include/exec/cpu-common.h | 3 -
include/exec/exec-all.h | 6 +-
include/exec/memory-internal.h | 65 --------
include/hw/core/cpu.h | 2 -
include/qemu/compiler.h | 26 +++
accel/tcg/cputlb.c | 348 +++++++++++++++++++++++++----------------
accel/tcg/translate-all.c | 51 +++---
exec.c | 158 +------------------
hw/core/cpu.c | 1 -
memory.c | 20 ---
trace-events | 4 +-
13 files changed, 288 insertions(+), 427 deletions(-)
next reply other threads:[~2019-09-25 18:48 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 18:45 Richard Henderson [this message]
2019-09-25 18:45 ` [PULL 01/16] exec: Use TARGET_PAGE_BITS_MIN for TLB flags Richard Henderson
2019-09-25 18:45 ` [PULL 02/16] cputlb: Disable __always_inline__ without optimization Richard Henderson
2019-09-25 18:45 ` [PULL 03/16] qemu/compiler.h: Add qemu_build_not_reached Richard Henderson
2019-09-25 18:45 ` [PULL 04/16] cputlb: Use qemu_build_not_reached in load/store_helpers Richard Henderson
2019-09-25 18:45 ` [PULL 05/16] cputlb: Split out load/store_memop Richard Henderson
2019-09-25 18:45 ` [PULL 06/16] cputlb: Introduce TLB_BSWAP Richard Henderson
2019-09-25 18:45 ` [PULL 07/16] exec: Adjust notdirty tracing Richard Henderson
2019-09-25 18:45 ` [PULL 08/16] cputlb: Move ROM handling from I/O path to TLB path Richard Henderson
2019-09-25 18:45 ` [PULL 09/16] cputlb: Move NOTDIRTY " Richard Henderson
2019-09-25 18:45 ` [PULL 10/16] cputlb: Partially inline memory_region_section_get_iotlb Richard Henderson
2019-09-25 18:45 ` [PULL 11/16] cputlb: Merge and move memory_notdirty_write_{prepare, complete} Richard Henderson
2019-09-25 18:45 ` [PULL 12/16] cputlb: Handle TLB_NOTDIRTY in probe_access Richard Henderson
2019-09-25 18:45 ` [PULL 13/16] cputlb: Remove cpu->mem_io_vaddr Richard Henderson
2019-09-25 18:45 ` [PULL 14/16] cputlb: Remove tb_invalidate_phys_page_range is_cpu_write_access Richard Henderson
2019-09-25 18:45 ` [PULL 15/16] cputlb: Pass retaddr to tb_invalidate_phys_page_fast Richard Henderson
2019-09-25 18:45 ` [PULL 16/16] cputlb: Pass retaddr to tb_check_watchpoint Richard Henderson
2019-09-27 14:43 ` [PULL 00/16] tcg patch queue Peter Maydell
2020-01-22 2:49 Richard Henderson
2020-01-23 13:41 ` Peter Maydell
2023-06-20 8:25 Richard Henderson
2023-06-20 9:52 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190925184548.30673-1-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).