From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, UNWANTED_LANGUAGE_BODY autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D6919C4360C for ; Thu, 10 Oct 2019 13:28:01 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id ADCEE206B6 for ; Thu, 10 Oct 2019 13:28:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org ADCEE206B6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39510 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIYU4-0006Ua-EC for qemu-devel@archiver.kernel.org; Thu, 10 Oct 2019 09:28:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40514) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIYJ6-0000JB-PT for qemu-devel@nongnu.org; Thu, 10 Oct 2019 09:16:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIYJ5-0002By-Fu for qemu-devel@nongnu.org; Thu, 10 Oct 2019 09:16:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51874) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIYJ0-0002A2-Tm; Thu, 10 Oct 2019 09:16:35 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EF56A8D5D84; Thu, 10 Oct 2019 13:16:33 +0000 (UTC) Received: from x1w.redhat.com (unknown [10.40.205.241]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6EA79600C4; Thu, 10 Oct 2019 13:16:13 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Eduardo Habkost , qemu-devel@nongnu.org Subject: [PATCH v3 3/8] hw/ide/piix: Convert reset handler to DeviceReset Date: Thu, 10 Oct 2019 15:15:22 +0200 Message-Id: <20191010131527.32513-4-philmd@redhat.com> In-Reply-To: <20191010131527.32513-1-philmd@redhat.com> References: <20191010131527.32513-1-philmd@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.69]); Thu, 10 Oct 2019 13:16:34 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Aleksandar Markovic , qemu-block@nongnu.org, "Michael S. Tsirkin" , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Li Qiang , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Igor Mammedov , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , John Snow Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The PIIX/IDE is a PCI device within a PIIX chipset, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- v3: Also convert PIIX4 (Li Qiang) --- hw/ide/piix.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index fba6bc8bff..db313dd3b1 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -30,7 +30,6 @@ #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" #include "sysemu/dma.h" -#include "sysemu/reset.h" =20 #include "hw/ide/pci.h" #include "trace.h" @@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d) } } =20 -static void piix3_reset(void *opaque) +static void piix_ide_reset(DeviceState *dev) { - PCIIDEState *d =3D opaque; + PCIIDEState *d =3D PCI_IDE(dev); PCIDevice *pd =3D PCI_DEVICE(d); uint8_t *pci_conf =3D pd->config; int i; @@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Erro= r **errp) =20 pci_conf[PCI_CLASS_PROG] =3D 0x80; // legacy ATA mode =20 - qemu_register_reset(piix3_reset, d); - bmdma_setup_bar(d); pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); =20 @@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass, = void *data) DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 + dc->reset =3D piix_ide_reset; k->realize =3D pci_piix_ide_realize; k->exit =3D pci_piix_ide_exitfn; k->vendor_id =3D PCI_VENDOR_ID_INTEL; @@ -273,6 +271,7 @@ static void piix4_ide_class_init(ObjectClass *klass, = void *data) DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 + dc->reset =3D piix_ide_reset; k->realize =3D pci_piix_ide_realize; k->exit =3D pci_piix_ide_exitfn; k->vendor_id =3D PCI_VENDOR_ID_INTEL; --=20 2.21.0