From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40B37C432C0 for ; Sun, 1 Dec 2019 12:22:48 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0F4A72071F for ; Sun, 1 Dec 2019 12:22:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0F4A72071F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:50842 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ibOFS-0004B5-St for qemu-devel@archiver.kernel.org; Sun, 01 Dec 2019 07:22:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:43660) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ibODi-0002CL-Un for qemu-devel@nongnu.org; Sun, 01 Dec 2019 07:21:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ibODg-0002yb-48 for qemu-devel@nongnu.org; Sun, 01 Dec 2019 07:20:58 -0500 Received: from inca-roads.misterjones.org ([213.251.177.50]:37999) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ibODf-0002vP-SF for qemu-devel@nongnu.org; Sun, 01 Dec 2019 07:20:56 -0500 Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by cheepnis.misterjones.org with esmtpsa (TLSv1.2:DHE-RSA-AES128-GCM-SHA256:128) (Exim 4.80) (envelope-from ) id 1ibODW-0007WK-4r; Sun, 01 Dec 2019 13:20:46 +0100 From: Marc Zyngier To: qemu-devel@nongnu.org Subject: [PATCH v2 0/5] target/arm: More EL2 trapping fixes Date: Sun, 1 Dec 2019 12:20:13 +0000 Message-Id: <20191201122018.25808-1-maz@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: qemu-devel@nongnu.org, kvmarm@lists.cs.columbia.edu, peter.maydell@linaro.org, richard.henderson@linaro.org, edgar.iglesias@xilinx.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 213.251.177.50 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E. Iglesias" , Peter Maydell , Richard Henderson , kvmarm@lists.cs.columbia.edu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hi all, This series is a follow-up on [1], which tried to address the remaining missing HCR_EL2.TIDx traps. I've hopefully now adressed the comments that Peter and Edgar raised. I've also tried to tackle missing traps generated by HSTR_EL2, which got completely ignored so far. Note that this results in the use of a new TB bit, which I understand is a rare resource. I'd welcome comments on how to handle it differently if at all possible. Finally, and as a bonus non-feature, I've added support for the missing Jazelle registers, giving me the opportunity to allow trapping of JIDR to EL2 using HCR_EL2.TID0. Yay, Christmas! ;-) I'm now going back to kernel stuff. I swear! [1] https://patchew.org/QEMU/20191128161718.24361-1-maz@kernel.org/ Marc Zyngier (5): target/arm: Honor HCR_EL2.TID2 trapping requirements target/arm: Honor HCR_EL2.TID1 trapping requirements target/arm: Handle trapping to EL2 of AArch32 VMRS instructions target/arm: Handle AArch32 CP15 trapping via HSTR_EL2 target/arm: Add support for missing Jazelle system registers target/arm/cpu.h | 2 + target/arm/helper-a64.h | 2 + target/arm/helper.c | 100 ++++++++++++++++++++++++++++++--- target/arm/op_helper.c | 21 +++++++ target/arm/translate-vfp.inc.c | 18 +++++- target/arm/translate.c | 3 +- target/arm/translate.h | 2 + target/arm/vfp_helper.c | 29 ++++++++++ 8 files changed, 165 insertions(+), 12 deletions(-) -- 2.20.1