From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
"Alistair Francis" <alistair.francis@wdc.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PULL 08/16] cputlb: Make tlb_n_entries private to cputlb.c
Date: Tue, 21 Jan 2020 16:49:38 -1000 [thread overview]
Message-ID: <20200122024946.28484-9-richard.henderson@linaro.org> (raw)
In-Reply-To: <20200122024946.28484-1-richard.henderson@linaro.org>
There are no users of this function outside cputlb.c,
and its interface will change in the next patch.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/cpu_ldst.h | 5 -----
accel/tcg/cputlb.c | 5 +++++
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h
index a46116167c..53de19753a 100644
--- a/include/exec/cpu_ldst.h
+++ b/include/exec/cpu_ldst.h
@@ -234,11 +234,6 @@ static inline uintptr_t tlb_index(CPUArchState *env, uintptr_t mmu_idx,
return (addr >> TARGET_PAGE_BITS) & size_mask;
}
-static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx)
-{
- return (env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS) + 1;
-}
-
/* Find the TLB entry corresponding to the mmu_idx + address pair. */
static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx,
target_ulong addr)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 3a4881cf69..500c56d74d 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -80,6 +80,11 @@ QEMU_BUILD_BUG_ON(sizeof(target_ulong) > sizeof(run_on_cpu_data));
QEMU_BUILD_BUG_ON(NB_MMU_MODES > 16);
#define ALL_MMUIDX_BITS ((1 << NB_MMU_MODES) - 1)
+static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx)
+{
+ return (env_tlb(env)->f[mmu_idx].mask >> CPU_TLB_ENTRY_BITS) + 1;
+}
+
static inline size_t sizeof_tlb(CPUArchState *env, uintptr_t mmu_idx)
{
return env_tlb(env)->f[mmu_idx].mask + (1 << CPU_TLB_ENTRY_BITS);
--
2.20.1
next prev parent reply other threads:[~2020-01-22 3:00 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-22 2:49 [PULL 00/16] tcg patch queue Richard Henderson
2020-01-22 2:49 ` [PULL 01/16] cputlb: Handle NB_MMU_MODES > TARGET_PAGE_BITS_MIN Richard Henderson
2020-01-22 2:49 ` [PULL 02/16] util/cacheinfo: fix crash when compiling with uClibc Richard Henderson
2020-01-22 2:49 ` [PULL 03/16] vl: Remove unused variable in configure_accelerators Richard Henderson
2020-01-22 2:49 ` [PULL 04/16] vl: Reduce scope of variables " Richard Henderson
2020-01-22 2:49 ` [PULL 05/16] vl: Remove useless test " Richard Henderson
2020-01-22 2:49 ` [PULL 06/16] vl: Only choose enabled accelerators " Richard Henderson
2020-01-22 2:49 ` [PULL 07/16] cputlb: Merge tlb_table_flush_by_mmuidx into tlb_flush_one_mmuidx_locked Richard Henderson
2020-01-22 2:49 ` Richard Henderson [this message]
2020-01-22 2:49 ` [PULL 09/16] cputlb: Pass CPUTLBDescFast to tlb_n_entries and sizeof_tlb Richard Henderson
2020-01-22 2:49 ` [PULL 10/16] cputlb: Hoist tlb portions in tlb_mmu_resize_locked Richard Henderson
2020-01-22 2:49 ` [PULL 11/16] cputlb: Hoist tlb portions in tlb_flush_one_mmuidx_locked Richard Henderson
2020-01-22 2:49 ` [PULL 12/16] cputlb: Split out tlb_mmu_flush_locked Richard Henderson
2020-01-22 2:49 ` [PULL 13/16] cputlb: Partially merge tlb_dyn_init into tlb_init Richard Henderson
2020-01-22 2:49 ` [PULL 14/16] cputlb: Initialize tlbs as flushed Richard Henderson
2020-01-22 2:49 ` [PULL 15/16] cputlb: Hoist timestamp outside of loops over tlbs Richard Henderson
2020-01-22 2:49 ` [PULL 16/16] scripts/git.orderfile: Display decodetree before C source Richard Henderson
2020-01-23 13:41 ` [PULL 00/16] tcg patch queue Peter Maydell
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