From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 04/26] hw/arm: ast2600: Wire up the eMMC controller
Date: Thu, 30 Jan 2020 16:15:11 +0000 [thread overview]
Message-ID: <20200130161533.8180-5-peter.maydell@linaro.org> (raw)
In-Reply-To: <20200130161533.8180-1-peter.maydell@linaro.org>
From: Andrew Jeffery <andrew@aj.id.au>
Initialise another SDHCI model instance for the AST2600's eMMC
controller and use the SDHCI's num_slots value introduced previously to
determine whether we should create an SD card instance for the new slot.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20200114103433.30534-3-clg@kaod.org
[ clg : - removed ternary operator from sdhci_attach_drive()
- renamed SDHCI objects with a '-controller' prefix ]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/aspeed_soc.h | 2 ++
hw/arm/aspeed.c | 26 +++++++++++++++++---------
hw/arm/aspeed_ast2600.c | 29 ++++++++++++++++++++++++++---
3 files changed, 45 insertions(+), 12 deletions(-)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index e84380984f7..90ac7f7ffa3 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -57,6 +57,7 @@ typedef struct AspeedSoCState {
AspeedGPIOState gpio;
AspeedGPIOState gpio_1_8v;
AspeedSDHCIState sdhci;
+ AspeedSDHCIState emmc;
} AspeedSoCState;
#define TYPE_ASPEED_SOC "aspeed-soc"
@@ -126,6 +127,7 @@ enum {
ASPEED_MII4,
ASPEED_SDRAM,
ASPEED_XDMA,
+ ASPEED_EMMC,
};
#endif /* ASPEED_SOC_H */
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 4174e313cae..8702256af1b 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -171,6 +171,19 @@ static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
}
}
+static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
+{
+ DeviceState *card;
+
+ card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
+ TYPE_SD_CARD);
+ if (dinfo) {
+ qdev_prop_set_drive(card, "drive", blk_by_legacy_dinfo(dinfo),
+ &error_fatal);
+ }
+ object_property_set_bool(OBJECT(card), true, "realized", &error_fatal);
+}
+
static void aspeed_machine_init(MachineState *machine)
{
AspeedBoardState *bmc;
@@ -264,16 +277,11 @@ static void aspeed_machine_init(MachineState *machine)
}
for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {
- SDHCIState *sdhci = &bmc->soc.sdhci.slots[i];
- DriveInfo *dinfo = drive_get_next(IF_SD);
- BlockBackend *blk;
- DeviceState *card;
+ sdhci_attach_drive(&bmc->soc.sdhci.slots[i], drive_get_next(IF_SD));
+ }
- blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL;
- card = qdev_create(qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
- TYPE_SD_CARD);
- qdev_prop_set_drive(card, "drive", blk, &error_fatal);
- object_property_set_bool(OBJECT(card), true, "realized", &error_fatal);
+ if (bmc->soc.emmc.num_slots) {
+ sdhci_attach_drive(&bmc->soc.emmc.slots[0], drive_get_next(IF_SD));
}
arm_load_kernel(ARM_CPU(first_cpu), machine, &aspeed_board_binfo);
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index fb73c4043ea..90cf1c755d3 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -46,6 +46,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
[ASPEED_ADC] = 0x1E6E9000,
[ASPEED_VIDEO] = 0x1E700000,
[ASPEED_SDHCI] = 0x1E740000,
+ [ASPEED_EMMC] = 0x1E750000,
[ASPEED_GPIO] = 0x1E780000,
[ASPEED_GPIO_1_8V] = 0x1E780800,
[ASPEED_RTC] = 0x1E781000,
@@ -64,6 +65,7 @@ static const hwaddr aspeed_soc_ast2600_memmap[] = {
#define ASPEED_SOC_AST2600_MAX_IRQ 128
+/* Shared Peripheral Interrupt values below are offset by -32 from datasheet */
static const int aspeed_soc_ast2600_irqmap[] = {
[ASPEED_UART1] = 47,
[ASPEED_UART2] = 48,
@@ -77,6 +79,7 @@ static const int aspeed_soc_ast2600_irqmap[] = {
[ASPEED_ADC] = 78,
[ASPEED_XDMA] = 6,
[ASPEED_SDHCI] = 43,
+ [ASPEED_EMMC] = 15,
[ASPEED_GPIO] = 40,
[ASPEED_GPIO_1_8V] = 11,
[ASPEED_RTC] = 13,
@@ -196,16 +199,26 @@ static void aspeed_soc_ast2600_init(Object *obj)
sysbus_init_child_obj(obj, "gpio_1_8v", OBJECT(&s->gpio_1_8v),
sizeof(s->gpio_1_8v), typename);
- sysbus_init_child_obj(obj, "sdc", OBJECT(&s->sdhci), sizeof(s->sdhci),
- TYPE_ASPEED_SDHCI);
+ sysbus_init_child_obj(obj, "sd-controller", OBJECT(&s->sdhci),
+ sizeof(s->sdhci), TYPE_ASPEED_SDHCI);
object_property_set_int(OBJECT(&s->sdhci), 2, "num-slots", &error_abort);
/* Init sd card slot class here so that they're under the correct parent */
for (i = 0; i < ASPEED_SDHCI_NUM_SLOTS; ++i) {
- sysbus_init_child_obj(obj, "sdhci[*]", OBJECT(&s->sdhci.slots[i]),
+ sysbus_init_child_obj(obj, "sd-controller.sdhci[*]",
+ OBJECT(&s->sdhci.slots[i]),
sizeof(s->sdhci.slots[i]), TYPE_SYSBUS_SDHCI);
}
+
+ sysbus_init_child_obj(obj, "emmc-controller", OBJECT(&s->emmc),
+ sizeof(s->emmc), TYPE_ASPEED_SDHCI);
+
+ object_property_set_int(OBJECT(&s->emmc), 1, "num-slots", &error_abort);
+
+ sysbus_init_child_obj(obj, "emmc-controller.sdhci",
+ OBJECT(&s->emmc.slots[0]), sizeof(s->emmc.slots[0]),
+ TYPE_SYSBUS_SDHCI);
}
/*
@@ -497,6 +510,16 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
sc->memmap[ASPEED_SDHCI]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
aspeed_soc_get_irq(s, ASPEED_SDHCI));
+
+ /* eMMC */
+ object_property_set_bool(OBJECT(&s->emmc), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->emmc), 0, sc->memmap[ASPEED_EMMC]);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->emmc), 0,
+ aspeed_soc_get_irq(s, ASPEED_EMMC));
}
static void aspeed_soc_ast2600_class_init(ObjectClass *oc, void *data)
--
2.20.1
next prev parent reply other threads:[~2020-01-30 16:19 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-30 16:15 [PULL 00/26] target-arm queue Peter Maydell
2020-01-30 16:15 ` [PULL 01/26] hw/core/or-irq: Fix incorrect assert forbidding num-lines == MAX_OR_LINES Peter Maydell
2020-01-30 16:15 ` [PULL 02/26] target/arm/arm-semi: Don't let the guest close stdin/stdout/stderr Peter Maydell
2020-01-30 16:15 ` [PULL 03/26] hw/sd: Configure number of slots exposed by the ASPEED SDHCI model Peter Maydell
2020-01-30 16:15 ` Peter Maydell [this message]
2020-01-30 16:15 ` [PULL 05/26] ftgmac100: check RX and TX buffer alignment Peter Maydell
2020-01-30 16:15 ` [PULL 06/26] hw/arm/aspeed: add a 'execute-in-place' property to boot directly from CE0 Peter Maydell
2020-01-30 16:15 ` [PULL 07/26] misc/pca9552: Add qom set and get Peter Maydell
2020-01-30 16:15 ` [PULL 08/26] hw/arm/raspi: Remove obsolete use of -smp to set the soc 'enabled-cpus' Peter Maydell
2020-01-30 16:15 ` [PULL 09/26] add device_legacy_reset function to prepare for reset api change Peter Maydell
2020-01-30 16:15 ` [PULL 10/26] hw/core/qdev: add trace events to help with resettable transition Peter Maydell
2020-01-30 16:15 ` [PULL 11/26] hw/core: create Resettable QOM interface Peter Maydell
2020-01-30 16:15 ` [PULL 12/26] hw/core: add Resettable support to BusClass and DeviceClass Peter Maydell
2020-01-30 16:15 ` [PULL 13/26] hw/core/resettable: add support for changing parent Peter Maydell
2020-01-30 16:15 ` [PULL 14/26] hw/core/qdev: handle parent bus change regarding resettable Peter Maydell
2020-01-30 16:15 ` [PULL 15/26] hw/core/qdev: update hotplug reset " Peter Maydell
2020-01-30 16:15 ` [PULL 16/26] hw/core: deprecate old reset functions and introduce new ones Peter Maydell
2020-01-30 16:15 ` [PULL 17/26] docs/devel/reset.rst: add doc about Resettable interface Peter Maydell
2020-01-30 16:15 ` [PULL 18/26] vl: replace deprecated qbus_reset_all registration Peter Maydell
2020-01-30 16:15 ` [PULL 19/26] hw/s390x/ipl: replace deprecated qdev_reset_all registration Peter Maydell
2020-01-30 16:15 ` [PULL 20/26] hw/intc/arm_gicv3_kvm: Stop wrongly programming GICR_PENDBASER.PTZ bit Peter Maydell
2020-01-30 16:15 ` [PULL 21/26] target/arm/kvm: trivial: Clean up header documentation Peter Maydell
2020-01-30 16:15 ` [PULL 22/26] hw/arm/virt: Add missing 5.0 options call to 4.2 options Peter Maydell
2020-01-30 16:15 ` [PULL 23/26] target/arm/kvm64: kvm64 cpus have timer registers Peter Maydell
2020-01-30 16:15 ` [PULL 24/26] tests/arm-cpu-features: Check feature default values Peter Maydell
2020-01-30 16:15 ` [PULL 25/26] target/arm/kvm: Implement virtual time adjustment Peter Maydell
2020-01-30 16:15 ` [PULL 26/26] target/arm/cpu: Add the kvm-no-adjvtime CPU property Peter Maydell
2020-01-30 19:05 ` [PULL 00/26] target-arm queue Peter Maydell
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