From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Andrew Baumann" <Andrew.Baumann@microsoft.com>,
qemu-arm@nongnu.org, "Igor Mammedov" <imammedo@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [PATCH 03/12] hw/arm/raspi: Introduce RaspiProcessorId enum
Date: Sat, 15 Feb 2020 20:15:34 +0100 [thread overview]
Message-ID: <20200215191543.3235-4-f4bug@amsat.org> (raw)
In-Reply-To: <20200215191543.3235-1-f4bug@amsat.org>
As we only support a reduced set of the REV_CODE_PROCESSOR id
encoded in the board revision, define the PROCESSOR_ID values
as an enum. We can simplify the board_soc_type and cores_count
methods.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/raspi.c | 45 +++++++++++++++++++++------------------------
1 file changed, 21 insertions(+), 24 deletions(-)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 81cc5824c4..aa0a7e6276 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -69,16 +69,33 @@ FIELD(REV_CODE, MANUFACTURER, 16, 4);
FIELD(REV_CODE, MEMORY_SIZE, 20, 3);
FIELD(REV_CODE, STYLE, 23, 1);
+typedef enum RaspiProcessorId {
+ PROCESSOR_ID_BCM2836 = 1,
+ PROCESSOR_ID_BCM2837 = 2,
+} RaspiProcessorId;
+
+static const struct {
+ const char *type;
+ int cores_count;
+} soc_property[] = {
+ [PROCESSOR_ID_BCM2836] = {TYPE_BCM2836, BCM283X_NCPUS},
+ [PROCESSOR_ID_BCM2837] = {TYPE_BCM2837, BCM283X_NCPUS},
+};
+
static uint64_t board_ram_size(uint32_t board_rev)
{
assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
return 256 * MiB << FIELD_EX32(board_rev, REV_CODE, MEMORY_SIZE);
}
-static int board_processor_id(uint32_t board_rev)
+static RaspiProcessorId board_processor_id(uint32_t board_rev)
{
+ int proc_id = FIELD_EX32(board_rev, REV_CODE, PROCESSOR);;
+
assert(FIELD_EX32(board_rev, REV_CODE, STYLE)); /* Only new style */
- return FIELD_EX32(board_rev, REV_CODE, PROCESSOR);
+ assert(proc_id < ARRAY_SIZE(soc_property) && soc_property[proc_id].type);
+
+ return proc_id;
}
static int board_version(uint32_t board_rev)
@@ -88,32 +105,12 @@ static int board_version(uint32_t board_rev)
static const char *board_soc_type(uint32_t board_rev)
{
- static const char *soc_types[] = {
- NULL, TYPE_BCM2836, TYPE_BCM2837,
- };
- int proc_id = board_processor_id(board_rev);
-
- if (proc_id >= ARRAY_SIZE(soc_types) || !soc_types[proc_id]) {
- error_report("Unsupported processor id '%d' (board revision: 0x%x)",
- proc_id, board_rev);
- exit(1);
- }
- return soc_types[proc_id];
+ return soc_property[board_processor_id(board_rev)].type;
}
static int cores_count(uint32_t board_rev)
{
- static const int soc_cores_count[] = {
- 0, BCM283X_NCPUS, BCM283X_NCPUS,
- };
- int proc_id = board_processor_id(board_rev);
-
- if (proc_id >= ARRAY_SIZE(soc_cores_count) || !soc_cores_count[proc_id]) {
- error_report("Unsupported processor id '%d' (board revision: 0x%x)",
- proc_id, board_rev);
- exit(1);
- }
- return soc_cores_count[proc_id];
+ return soc_property[board_processor_id(board_rev)].cores_count;
}
static const char *board_type(uint32_t board_rev)
--
2.21.1
next prev parent reply other threads:[~2020-02-15 19:18 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-15 19:15 [PATCH 00/12] hw/arm: Add raspi0 and raspi1 machines Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 01/12] hw/arm/raspi: Remove ignore_memory_transaction_failures on the raspi2 Philippe Mathieu-Daudé
2020-02-16 2:16 ` Richard Henderson
2020-02-15 19:15 ` [PATCH 02/12] hw/arm/raspi: Avoid using TypeInfo::class_data pointer Philippe Mathieu-Daudé
2020-02-16 2:19 ` Richard Henderson
2020-02-15 19:15 ` Philippe Mathieu-Daudé [this message]
2020-02-15 19:15 ` [PATCH 04/12] hw/arm/raspi: Remove use of the 'version' value in the board code Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 05/12] hw/arm/bcm2836: Restrict BCM283XClass declaration to C source Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 06/12] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 07/12] hw/arm/bcm2836: Introduce BCM283XClass::core_count Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 08/12] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 09/12] hw/arm/bcm2836: Split out common realize() code Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 10/12] hw/arm/bcm2836: Introduce the BCM2835 SoC Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 11/12] hw/arm/raspi: Add the Raspberry Pi B+ machine Philippe Mathieu-Daudé
2020-02-15 19:15 ` [PATCH 12/12] hw/arm/raspi: Add the Raspberry Pi Zero machine Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200215191543.3235-4-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=Andrew.Baumann@microsoft.com \
--cc=imammedo@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=philmd@redhat.com \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).