On Tue, Feb 18, 2020 at 05:17:17PM +0100, Julia Suvorova wrote:
>Make hot-plug/hot-unplug on PCIe Root Ports optional to allow libvirt
>to manage it and restrict unplug for the entire machine. This is going
>to prevent user-initiated unplug in guests (Windows mostly).
>Usage:
>    -device pcie-root-port,disable-hotplug=true,...
>
>Discussion related:
>    https://lists.gnu.org/archive/html/qemu-devel/2020-02/msg00530.html
>
>Signed-off-by: Julia Suvorova <jusual@redhat.com>
>---
> hw/core/machine.c                  | 1 +
> hw/pci-bridge/pcie_root_port.c     | 3 ++-
> hw/pci-bridge/xio3130_downstream.c | 2 +-
> hw/pci/pcie.c                      | 8 ++++++--
> include/hw/pci/pcie.h              | 2 +-
> include/hw/pci/pcie_port.h         | 1 +
> 6 files changed, 12 insertions(+), 5 deletions(-)
>
>diff --git a/hw/core/machine.c b/hw/core/machine.c
>index 84812a1d1c..5ff698ac3c 100644
>--- a/hw/core/machine.c
>+++ b/hw/core/machine.c
>@@ -36,6 +36,7 @@ GlobalProperty hw_compat_4_2[] = {
>     { "usb-redir", "suppress-remote-wake", "off" },
>     { "qxl", "revision", "4" },
>     { "qxl-vga", "revision", "4" },
>+    { "pcie-root-port-base", "disable-hotplug", "false" },
> };
> const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
>
>diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c
>index 0ba4e4dea4..d6a080bee8 100644
>--- a/hw/pci-bridge/pcie_root_port.c
>+++ b/hw/pci-bridge/pcie_root_port.c
>@@ -94,7 +94,7 @@ static void rp_realize(PCIDevice *d, Error **errp)
>
>     pcie_cap_arifwd_init(d);
>     pcie_cap_deverr_init(d);
>-    pcie_cap_slot_init(d, s->slot);
>+    pcie_cap_slot_init(d, s);
>     pcie_cap_root_init(d);
>
>     pcie_chassis_create(s->chassis);
>@@ -147,6 +147,7 @@ static Property rp_props[] = {
>     DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
>                     QEMU_PCIE_SLTCAP_PCP_BITNR, true),
>     DEFINE_PROP_BOOL("disable-acs", PCIESlot, disable_acs, false),
>+    DEFINE_PROP_BOOL("disable-hotplug", PCIESlot, disable_hotplug, false),
>     DEFINE_PROP_END_OF_LIST()
> };
>
>diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c
>index 153a4acad2..04aae72cd6 100644
>--- a/hw/pci-bridge/xio3130_downstream.c
>+++ b/hw/pci-bridge/xio3130_downstream.c
>@@ -94,7 +94,7 @@ static void xio3130_downstream_realize(PCIDevice *d, Error **errp)
>     }
>     pcie_cap_flr_init(d);
>     pcie_cap_deverr_init(d);
>-    pcie_cap_slot_init(d, s->slot);
>+    pcie_cap_slot_init(d, s);
>     pcie_cap_arifwd_init(d);
>

The corresponding entry in xio3130_downstream_props[] is missing.

>     pcie_chassis_create(s->chassis);

Jano