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[88.21.202.78]) by smtp.gmail.com with ESMTPSA id t13sm3947679wrw.19.2020.02.21.05.25.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Feb 2020 05:25:54 -0800 (PST) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 2/3] hw/scsi/esp: Let ESPDMAMemoryReadWriteFunc take void pointer and size_t Date: Fri, 21 Feb 2020 14:25:49 +0100 Message-Id: <20200221132550.22156-3-philmd@redhat.com> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200221132550.22156-1-philmd@redhat.com> References: <20200221132550.22156-1-philmd@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8; text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.120 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Peter Maydell , Jason Wang , Mark Cave-Ayland , Laurent Vivier , Paolo Bonzini , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The ESPDMAMemoryReadWriteFunc handlers end calling dma_memory_read/write, which both take void pointers (since introduced in commit d86a77f8). The ESPDMAMemoryReadWriteFunc handlers can take a void pointer too. All calls to these handlers in hw/scsi/esp.c use an unsigned length. Use size_t type. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/hw/scsi/esp.h | 2 +- hw/dma/sparc32_dma.c | 4 ++-- hw/scsi/esp-pci.c | 6 +++--- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/hw/scsi/esp.h b/include/hw/scsi/esp.h index 6ba47dac41..fff0ebc4d4 100644 --- a/include/hw/scsi/esp.h +++ b/include/hw/scsi/esp.h @@ -6,7 +6,7 @@ =20 /* esp.c */ #define ESP_MAX_DEVS 7 -typedef void (*ESPDMAMemoryReadWriteFunc)(void *opaque, uint8_t *buf, int = len); +typedef void (*ESPDMAMemoryReadWriteFunc)(void *opaque, void *buf, size_t = len); =20 #define ESP_REGS 16 #define TI_BUFSZ 16 diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index c9e313938c..fbe58b8fea 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -142,7 +142,7 @@ static void dma_set_irq(void *opaque, int irq, int leve= l) } } =20 -static void espdma_memory_read(void *opaque, uint8_t *buf, int len) +static void espdma_memory_read(void *opaque, void *buf, size_t len) { DMADeviceState *s =3D opaque; IOMMUState *is =3D (IOMMUState *)s->iommu; @@ -152,7 +152,7 @@ static void espdma_memory_read(void *opaque, uint8_t *b= uf, int len) s->dmaregs[1] +=3D len; } =20 -static void espdma_memory_write(void *opaque, uint8_t *buf, int len) +static void espdma_memory_write(void *opaque, void *buf, size_t len) { DMADeviceState *s =3D opaque; IOMMUState *is =3D (IOMMUState *)s->iommu; diff --git a/hw/scsi/esp-pci.c b/hw/scsi/esp-pci.c index d5a1f9e017..8f11c4a2d2 100644 --- a/hw/scsi/esp-pci.c +++ b/hw/scsi/esp-pci.c @@ -242,7 +242,7 @@ static uint64_t esp_pci_io_read(void *opaque, hwaddr ad= dr, return ret; } =20 -static void esp_pci_dma_memory_rw(PCIESPState *pci, uint8_t *buf, int len, +static void esp_pci_dma_memory_rw(PCIESPState *pci, void *buf, size_t len, DMADirection dir) { dma_addr_t addr; @@ -278,13 +278,13 @@ static void esp_pci_dma_memory_rw(PCIESPState *pci, u= int8_t *buf, int len, } } =20 -static void esp_pci_dma_memory_read(void *opaque, uint8_t *buf, int len) +static void esp_pci_dma_memory_read(void *opaque, void *buf, size_t len) { PCIESPState *pci =3D opaque; esp_pci_dma_memory_rw(pci, buf, len, DMA_DIRECTION_TO_DEVICE); } =20 -static void esp_pci_dma_memory_write(void *opaque, uint8_t *buf, int len) +static void esp_pci_dma_memory_write(void *opaque, void *buf, size_t len) { PCIESPState *pci =3D opaque; esp_pci_dma_memory_rw(pci, buf, len, DMA_DIRECTION_FROM_DEVICE); --=20 2.21.1