From: Peter Xu <peterx@redhat.com>
To: Liu Yi L <yi.l.liu@intel.com>
Cc: jean-philippe@linaro.org, kevin.tian@intel.com,
Jacob Pan <jacob.jun.pan@linux.intel.com>,
Yi Sun <yi.y.sun@linux.intel.com>,
Eduardo Habkost <ehabkost@redhat.com>,
kvm@vger.kernel.org, mst@redhat.com, jun.j.tian@intel.com,
qemu-devel@nongnu.org, eric.auger@redhat.com,
alex.williamson@redhat.com, pbonzini@redhat.com,
hao.wu@intel.com, yi.y.sun@intel.com,
Richard Henderson <rth@twiddle.net>,
david@gibson.dropbear.id.au
Subject: Re: [PATCH v1 17/22] intel_iommu: do not pass down pasid bind for PASID #0
Date: Tue, 24 Mar 2020 14:13:26 -0400 [thread overview]
Message-ID: <20200324181326.GB127076@xz-x1> (raw)
In-Reply-To: <1584880579-12178-18-git-send-email-yi.l.liu@intel.com>
On Sun, Mar 22, 2020 at 05:36:14AM -0700, Liu Yi L wrote:
> RID_PASID field was introduced in VT-d 3.0 spec, it is used
> for DMA requests w/o PASID in scalable mode VT-d. It is also
> known as IOVA. And in VT-d 3.1 spec, there is definition on it:
>
> "Implementations not supporting RID_PASID capability
> (ECAP_REG.RPS is 0b), use a PASID value of 0 to perform
> address translation for requests without PASID."
>
> This patch adds a check against the PASIDs which are going to be
> bound to device. For PASID #0, it is not necessary to pass down
> pasid bind request for it since PASID #0 is used as RID_PASID for
> DMA requests without pasid. Further reason is current Intel vIOMMU
> supports gIOVA by shadowing guest 2nd level page table. However,
> in future, if guest IOMMU driver uses 1st level page table to store
> IOVA mappings, then guest IOVA support will also be done via nested
> translation. When gIOVA is over FLPT, then vIOMMU should pass down
> the pasid bind request for PASID #0 to host, host needs to bind the
> guest IOVA page table to a proper PASID. e.g PASID value in RID_PASID
> field for PF/VF if ECAP_REG.RPS is clear or default PASID for ADI
> (Assignable Device Interface in Scalable IOV solution).
>
> IOVA over FLPT support on Intel VT-d:
> https://lkml.org/lkml/2019/9/23/297
>
> Cc: Kevin Tian <kevin.tian@intel.com>
> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Cc: Peter Xu <peterx@redhat.com>
> Cc: Yi Sun <yi.y.sun@linux.intel.com>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Eduardo Habkost <ehabkost@redhat.com>
> Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
> ---
> hw/i386/intel_iommu.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 1e0ccde..b007715 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -1886,6 +1886,16 @@ static int vtd_bind_guest_pasid(IntelIOMMUState *s, VTDBus *vtd_bus,
> struct iommu_gpasid_bind_data *g_bind_data;
> int ret = -1;
>
> + if (pasid < VTD_MIN_HPASID) {
> + /*
> + * If pasid < VTD_HPASID_MIN, this pasid is not allocated
s/VTD_HPASID_MIN/VTD_MIN_HPASID/.
> + * from host. No need to pass down the changes on it to host.
> + * TODO: when IOVA over FLPT is ready, this switch should be
> + * refined.
What will happen if without this patch? Is it a must?
> + */
> + return 0;
> + }
> +
> vtd_dev_icx = vtd_bus->dev_icx[devfn];
> if (!vtd_dev_icx) {
> return -EINVAL;
> --
> 2.7.4
>
--
Peter Xu
next prev parent reply other threads:[~2020-03-24 18:14 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-22 12:35 [PATCH v1 00/22] intel_iommu: expose Shared Virtual Addressing to VMs Liu Yi L
2020-03-22 12:35 ` [PATCH v1 01/22] scripts/update-linux-headers: Import iommu.h Liu Yi L
2020-03-22 12:35 ` [PATCH v1 02/22] header file update VFIO/IOMMU vSVA APIs Liu Yi L
2020-03-29 16:32 ` Auger Eric
2020-03-30 7:06 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 03/22] vfio: check VFIO_TYPE1_NESTING_IOMMU support Liu Yi L
2020-03-22 12:36 ` [PATCH v1 04/22] hw/iommu: introduce HostIOMMUContext Liu Yi L
2020-03-23 20:58 ` Peter Xu
2020-03-24 10:00 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 05/22] hw/pci: modify pci_setup_iommu() to set PCIIOMMUOps Liu Yi L
2020-03-22 12:36 ` [PATCH v1 06/22] hw/pci: introduce pci_device_set/unset_iommu_context() Liu Yi L
2020-03-23 21:15 ` Peter Xu
2020-03-24 10:02 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 07/22] intel_iommu: add set/unset_iommu_context callback Liu Yi L
2020-03-23 21:29 ` Peter Xu
2020-03-24 11:15 ` Liu, Yi L
2020-03-24 15:24 ` Peter Xu
2020-03-25 9:37 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 08/22] vfio: init HostIOMMUContext per-container Liu Yi L
[not found] ` <20200323213943.GR127076@xz-x1>
2020-03-24 13:03 ` Liu, Yi L
2020-03-24 14:45 ` Peter Xu
2020-03-25 9:30 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 09/22] vfio/common: check PASID alloc/free availability Liu Yi L
2020-03-23 22:06 ` Peter Xu
2020-03-24 11:18 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 10/22] intel_iommu: add virtual command capability support Liu Yi L
2020-03-22 12:36 ` [PATCH v1 11/22] intel_iommu: process PASID cache invalidation Liu Yi L
2020-03-22 12:36 ` [PATCH v1 12/22] intel_iommu: add PASID cache management infrastructure Liu Yi L
2020-03-24 17:32 ` Peter Xu
2020-03-25 12:20 ` Liu, Yi L
2020-03-25 14:52 ` Peter Xu
2020-03-26 6:15 ` Liu, Yi L
2020-03-26 13:57 ` Liu, Yi L
2020-03-26 15:53 ` Peter Xu
2020-03-27 1:33 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 13/22] vfio: add bind stage-1 page table support Liu Yi L
2020-03-24 17:41 ` Peter Xu
2020-03-25 9:49 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 14/22] intel_iommu: bind/unbind guest page table to host Liu Yi L
2020-03-24 17:46 ` Peter Xu
2020-03-25 12:42 ` Liu, Yi L
2020-03-25 14:56 ` Peter Xu
2020-03-26 3:04 ` Liu, Yi L
2020-03-25 12:47 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 15/22] intel_iommu: replay guest pasid bindings " Liu Yi L
2020-03-24 18:00 ` Peter Xu
2020-03-25 13:14 ` Liu, Yi L
2020-03-25 15:06 ` Peter Xu
2020-03-26 3:17 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 16/22] intel_iommu: replay pasid binds after context cache invalidation Liu Yi L
2020-03-24 18:07 ` Peter Xu
2020-03-25 13:18 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 17/22] intel_iommu: do not pass down pasid bind for PASID #0 Liu Yi L
2020-03-24 18:13 ` Peter Xu [this message]
2020-03-25 10:42 ` Liu, Yi L
2020-03-25 15:12 ` Peter Xu
2020-03-26 2:42 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 18/22] vfio: add support for flush iommu stage-1 cache Liu Yi L
2020-03-24 18:19 ` Peter Xu
2020-03-25 10:40 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 19/22] intel_iommu: process PASID-based iotlb invalidation Liu Yi L
2020-03-24 18:26 ` Peter Xu
2020-03-25 13:36 ` Liu, Yi L
2020-03-25 15:15 ` Peter Xu
2020-03-29 11:17 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 20/22] intel_iommu: propagate PASID-based iotlb invalidation to host Liu Yi L
2020-03-24 18:34 ` Peter Xu
2020-03-25 13:21 ` Liu, Yi L
2020-03-26 5:41 ` Liu, Yi L
2020-03-26 13:02 ` Peter Xu
2020-03-26 13:22 ` Peter Xu
2020-03-26 13:33 ` Liu, Yi L
2020-03-26 13:23 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 21/22] intel_iommu: process PASID-based Device-TLB invalidation Liu Yi L
2020-03-24 18:36 ` Peter Xu
2020-03-25 9:19 ` Liu, Yi L
2020-03-22 12:36 ` [PATCH v1 22/22] intel_iommu: modify x-scalable-mode to be string option Liu Yi L
2020-03-24 18:39 ` Peter Xu
2020-03-25 13:22 ` Liu, Yi L
2020-03-22 13:25 ` [PATCH v1 00/22] intel_iommu: expose Shared Virtual Addressing to VMs no-reply
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