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Thu, 26 Mar 2020 06:02:52 -0700 (PDT) Date: Thu, 26 Mar 2020 09:02:48 -0400 From: Peter Xu To: "Liu, Yi L" Subject: Re: [PATCH v1 20/22] intel_iommu: propagate PASID-based iotlb invalidation to host Message-ID: <20200326130248.GB422390@xz-x1> References: <1584880579-12178-1-git-send-email-yi.l.liu@intel.com> <1584880579-12178-21-git-send-email-yi.l.liu@intel.com> <20200324183423.GE127076@xz-x1> MIME-Version: 1.0 In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Content-Disposition: inline X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 63.128.21.74 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "jean-philippe@linaro.org" , "Tian, Kevin" , Jacob Pan , Yi Sun , Eduardo Habkost , "kvm@vger.kernel.org" , "mst@redhat.com" , "Tian, Jun J" , "qemu-devel@nongnu.org" , "eric.auger@redhat.com" , "alex.williamson@redhat.com" , "pbonzini@redhat.com" , "Wu, Hao" , "Sun, Yi Y" , Richard Henderson , "david@gibson.dropbear.id.au" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Mar 26, 2020 at 05:41:39AM +0000, Liu, Yi L wrote: > > From: Liu, Yi L > > Sent: Wednesday, March 25, 2020 9:22 PM > > To: 'Peter Xu' > > Subject: RE: [PATCH v1 20/22] intel_iommu: propagate PASID-based iotlb > > invalidation to host > >=20 > > > From: Peter Xu > > > Sent: Wednesday, March 25, 2020 2:34 AM > > > To: Liu, Yi L > > > Subject: Re: [PATCH v1 20/22] intel_iommu: propagate PASID-based iotl= b > > > invalidation to host > > > > > > On Sun, Mar 22, 2020 at 05:36:17AM -0700, Liu Yi L wrote: > > > > This patch propagates PASID-based iotlb invalidation to host. > > > > > > > > Intel VT-d 3.0 supports nested translation in PASID granular. > > > > Guest SVA support could be implemented by configuring nested > > > > translation on specific PASID. This is also known as dual stage DMA > > > > translation. > > > > > > > > Under such configuration, guest owns the GVA->GPA translation which > > > > is configured as first level page table in host side for a specific > > > > pasid, and host owns GPA->HPA translation. As guest owns first leve= l > > > > translation table, piotlb invalidation should be propagated to host > > > > since host IOMMU will cache first level page table related mappings > > > > during DMA address translation. > > > > > > > > This patch traps the guest PASID-based iotlb flush and propagate it > > > > to host. > > > > > > > > Cc: Kevin Tian > > > > Cc: Jacob Pan > > > > Cc: Peter Xu > > > > Cc: Yi Sun > > > > Cc: Paolo Bonzini > > > > Cc: Richard Henderson > > > > Cc: Eduardo Habkost > > > > Signed-off-by: Liu Yi L > > > > --- > > > > hw/i386/intel_iommu.c | 139 > > > +++++++++++++++++++++++++++++++++++++++++ > > > > hw/i386/intel_iommu_internal.h | 7 +++ > > > > 2 files changed, 146 insertions(+) > > > > > > > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index > > > > b9ac07d..10d314d 100644 > > > > --- a/hw/i386/intel_iommu.c > > > > +++ b/hw/i386/intel_iommu.c > > > > @@ -3134,15 +3134,154 @@ static bool > > > vtd_process_pasid_desc(IntelIOMMUState *s, > > > > return (ret =3D=3D 0) ? true : false; } > > > > > > > > +/** > > > > + * Caller of this function should hold iommu_lock. > > > > + */ > > > > +static void vtd_invalidate_piotlb(IntelIOMMUState *s, > > > > + VTDBus *vtd_bus, > > > > + int devfn, > > > > + DualIOMMUStage1Cache > > > > +*stage1_cache) { > > > > + VTDHostIOMMUContext *vtd_dev_icx; > > > > + HostIOMMUContext *host_icx; > > > > + > > > > + vtd_dev_icx =3D vtd_bus->dev_icx[devfn]; > > > > + if (!vtd_dev_icx) { > > > > + goto out; > > > > + } > > > > + host_icx =3D vtd_dev_icx->host_icx; > > > > + if (!host_icx) { > > > > + goto out; > > > > + } > > > > + if (host_iommu_ctx_flush_stage1_cache(host_icx, stage1_cache))= { > > > > + error_report("Cache flush failed"); > > > > > > I think this should not easily be triggered by the guest, but just in > > > case... Let's use > > > error_report_once() to be safe. > >=20 > > Agreed. > >=20 > > > > + } > > > > +out: > > > > + return; > > > > +} > > > > + > > > > +static inline bool vtd_pasid_cache_valid( > > > > + VTDPASIDAddressSpace *vtd_pasid_as) { > > > > + return vtd_pasid_as->iommu_state && ^^^^^^^^^^^^^^^^^^^^^^^^^ > > > > > > This check can be dropped because always true? > > > > > > If you agree with both the changes, please add: > > > > > > Reviewed-by: Peter Xu > >=20 > > I think the code should ensure all the pasid_as in hash table is valid.= And we can > > since all the operations are under protection of iommu_lock. > >=20 > Peter, >=20 > I think my reply was wrong. pasid_as in has table may be stale since > the per pasid_as cache_gen may be not identical with the cache_gen > in iommu_state. e.g. vtd_pasid_cache_reset() only increases the > cache_gen in iommu_state. So there will be pasid_as in hash table > which has cached pasid entry but its cache_gen is not equal to the > one in iommu_state. For such pasid_as, we should treat it as stale. > So I guess the vtd_pasid_cache_valid() is still necessary. I guess you misread my comment. :) I was saying the "vtd_pasid_as->iommu_state" check is not needed, because iommu_state was always set if the address space is created. vtd_pasid_cache_valid() is needed. Also, please double confirm that vtd_pasid_cache_reset() should drop all the address spaces (as I think it should), not "only increase the cache_gen". IMHO you should only increase the cache_gen in the PSI hook (vtd_pasid_cache_psi()) only. Thanks, --=20 Peter Xu