From: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
To: qemu-devel@nongnu.org
Cc: aleksandar.rikalo@syrmia.com,
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Subject: [PATCH v6 19/21] target/mips: msa: Split helpers for MSUBV.<B|H|W|D>
Date: Mon, 18 May 2020 22:09:18 +0200 [thread overview]
Message-ID: <20200518200920.17344-20-aleksandar.qemu.devel@gmail.com> (raw)
In-Reply-To: <20200518200920.17344-1-aleksandar.qemu.devel@gmail.com>
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
---
target/mips/helper.h | 6 ++-
target/mips/msa_helper.c | 79 ++++++++++++++++++++++++++++++++++++----
target/mips/translate.c | 19 ++++++++--
3 files changed, 93 insertions(+), 11 deletions(-)
diff --git a/target/mips/helper.h b/target/mips/helper.h
index e479a22559..7ca0036807 100644
--- a/target/mips/helper.h
+++ b/target/mips/helper.h
@@ -955,6 +955,11 @@ DEF_HELPER_4(msa_maddv_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_maddv_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_maddv_d, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_msubv_b, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_msubv_h, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_msubv_w, void, env, i32, i32, i32)
+DEF_HELPER_4(msa_msubv_d, void, env, i32, i32, i32)
+
DEF_HELPER_4(msa_asub_s_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_asub_s_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_asub_s_w, void, env, i32, i32, i32)
@@ -1074,7 +1079,6 @@ DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subsuu_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_mulv_df, void, env, i32, i32, i32, i32)
-DEF_HELPER_5(msa_msubv_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_dotp_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_dotp_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_dpadd_s_df, void, env, i32, i32, i32, i32)
diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 6af9d3b752..a0aac3ee10 100644
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -2955,6 +2955,78 @@ void helper_msa_maddv_d(CPUMIPSState *env,
pwd->d[1] = msa_maddv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
}
+static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
+ int64_t arg2)
+{
+ return dest - arg1 * arg2;
+}
+
+void helper_msa_msubv_b(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->b[0] = msa_msubv_df(DF_BYTE, pwt->b[0], pws->b[0], pwt->b[0]);
+ pwd->b[1] = msa_msubv_df(DF_BYTE, pwt->b[1], pws->b[1], pwt->b[1]);
+ pwd->b[2] = msa_msubv_df(DF_BYTE, pwt->b[2], pws->b[2], pwt->b[2]);
+ pwd->b[3] = msa_msubv_df(DF_BYTE, pwt->b[3], pws->b[3], pwt->b[3]);
+ pwd->b[4] = msa_msubv_df(DF_BYTE, pwt->b[4], pws->b[4], pwt->b[4]);
+ pwd->b[5] = msa_msubv_df(DF_BYTE, pwt->b[5], pws->b[5], pwt->b[5]);
+ pwd->b[6] = msa_msubv_df(DF_BYTE, pwt->b[6], pws->b[6], pwt->b[6]);
+ pwd->b[7] = msa_msubv_df(DF_BYTE, pwt->b[7], pws->b[7], pwt->b[7]);
+ pwd->b[8] = msa_msubv_df(DF_BYTE, pwt->b[8], pws->b[8], pwt->b[8]);
+ pwd->b[9] = msa_msubv_df(DF_BYTE, pwt->b[9], pws->b[9], pwt->b[9]);
+ pwd->b[10] = msa_msubv_df(DF_BYTE, pwt->b[10], pws->b[10], pwt->b[10]);
+ pwd->b[11] = msa_msubv_df(DF_BYTE, pwt->b[11], pws->b[11], pwt->b[11]);
+ pwd->b[12] = msa_msubv_df(DF_BYTE, pwt->b[12], pws->b[12], pwt->b[12]);
+ pwd->b[13] = msa_msubv_df(DF_BYTE, pwt->b[13], pws->b[13], pwt->b[13]);
+ pwd->b[14] = msa_msubv_df(DF_BYTE, pwt->b[14], pws->b[14], pwt->b[14]);
+ pwd->b[15] = msa_msubv_df(DF_BYTE, pwt->b[15], pws->b[15], pwt->b[15]);
+}
+
+void helper_msa_msubv_h(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->h[0] = msa_msubv_df(DF_HALF, pwd->h[0], pws->h[0], pwt->h[0]);
+ pwd->h[1] = msa_msubv_df(DF_HALF, pwd->h[1], pws->h[1], pwt->h[1]);
+ pwd->h[2] = msa_msubv_df(DF_HALF, pwd->h[2], pws->h[2], pwt->h[2]);
+ pwd->h[3] = msa_msubv_df(DF_HALF, pwd->h[3], pws->h[3], pwt->h[3]);
+ pwd->h[4] = msa_msubv_df(DF_HALF, pwd->h[4], pws->h[4], pwt->h[4]);
+ pwd->h[5] = msa_msubv_df(DF_HALF, pwd->h[5], pws->h[5], pwt->h[5]);
+ pwd->h[6] = msa_msubv_df(DF_HALF, pwd->h[6], pws->h[6], pwt->h[6]);
+ pwd->h[7] = msa_msubv_df(DF_HALF, pwd->h[7], pws->h[7], pwt->h[7]);
+}
+
+void helper_msa_msubv_w(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->w[0] = msa_msubv_df(DF_WORD, pwd->w[0], pws->w[0], pwt->w[0]);
+ pwd->w[1] = msa_msubv_df(DF_WORD, pwd->w[1], pws->w[1], pwt->w[1]);
+ pwd->w[2] = msa_msubv_df(DF_WORD, pwd->w[2], pws->w[2], pwt->w[2]);
+ pwd->w[3] = msa_msubv_df(DF_WORD, pwd->w[3], pws->w[3], pwt->w[3]);
+}
+
+void helper_msa_msubv_d(CPUMIPSState *env,
+ uint32_t wd, uint32_t ws, uint32_t wt)
+{
+ wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
+ wr_t *pws = &(env->active_fpu.fpr[ws].wr);
+ wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
+
+ pwd->d[0] = msa_msubv_df(DF_DOUBLE, pwd->d[0], pws->d[0], pwt->d[0]);
+ pwd->d[1] = msa_msubv_df(DF_DOUBLE, pwd->d[1], pws->d[1], pwt->d[1]);
+}
+
/*
* Int Subtract
@@ -4886,12 +4958,6 @@ void helper_msa_sld_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
msa_sld_df(df, pwd, pws, env->active_tc.gpr[rt]);
}
-static inline int64_t msa_msubv_df(uint32_t df, int64_t dest, int64_t arg1,
- int64_t arg2)
-{
- return dest - arg1 * arg2;
-}
-
static inline int64_t msa_dpadd_s_df(uint32_t df, int64_t dest, int64_t arg1,
int64_t arg2)
{
@@ -5066,7 +5132,6 @@ void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, uint32_t wd, \
} \
}
-MSA_TEROP_DF(msubv)
MSA_TEROP_DF(dpadd_s)
MSA_TEROP_DF(dpadd_u)
MSA_TEROP_DF(dpsub_s)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 42f2a759e5..6b6a92a84f 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -29073,6 +29073,22 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
break;
}
break;
+ case OPC_MSUBV_df:
+ switch (df) {
+ case DF_BYTE:
+ gen_helper_msa_msubv_b(cpu_env, twd, tws, twt);
+ break;
+ case DF_HALF:
+ gen_helper_msa_msubv_h(cpu_env, twd, tws, twt);
+ break;
+ case DF_WORD:
+ gen_helper_msa_msubv_w(cpu_env, twd, tws, twt);
+ break;
+ case DF_DOUBLE:
+ gen_helper_msa_msubv_d(cpu_env, twd, tws, twt);
+ break;
+ }
+ break;
case OPC_ASUB_S_df:
switch (df) {
case DF_BYTE:
@@ -29305,9 +29321,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_SUBSUS_U_df:
gen_helper_msa_subsus_u_df(cpu_env, tdf, twd, tws, twt);
break;
- case OPC_MSUBV_df:
- gen_helper_msa_msubv_df(cpu_env, tdf, twd, tws, twt);
- break;
case OPC_SUBSUU_S_df:
gen_helper_msa_subsuu_s_df(cpu_env, tdf, twd, tws, twt);
break;
--
2.20.1
next prev parent reply other threads:[~2020-05-18 20:27 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-18 20:08 [PATCH v6 00/21] target/mips: MSA, FPU and other cleanups and improvements Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 01/21] target/mips: fpu: Demacro ADD.<D|S|PS> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 02/21] target/mips: fpu: Demacro SUB.<D|S|PS> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 03/21] target/mips: fpu: Demacro MUL.<D|S|PS> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 04/21] target/mips: fpu: Demacro DIV.<D|S|PS> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 05/21] target/mips: fpu: Remove now unused macro FLOAT_BINOP Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 06/21] target/mips: fpu: Demacro MADD.<D|S|PS> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 07/21] target/mips: fpu: Demacro MSUB.<D|S|PS> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 08/21] target/mips: fpu: Demacro NMADD.<D|S|PS> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 09/21] target/mips: fpu: Demacro NMSUB.<D|S|PS> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 10/21] target/mips: fpu: Remove now unused UNFUSED_FMA and FLOAT_FMA macros Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 11/21] target/mips: fpu: Demacro CLASS.<D|S> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 12/21] target/mips: fpu: Remove now unused FLOAT_CLASS macro Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 13/21] target/mips: fpu: Demacro RINT.<D|S> Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 14/21] target/mips: fpu: Remove now unused FLOAT_RINT macro Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 15/21] target/mips: fpu: Name better paired-single variables Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 16/21] target/mips: fpu: Refactor conversion from ieee to mips exception flags Aleksandar Markovic
2020-05-18 20:09 ` [PATCH v6 17/21] MAINTAINERS: Change Aleksandar Rikalo's email address Aleksandar Markovic
2020-05-26 7:44 ` Philippe Mathieu-Daudé
2020-05-18 20:09 ` [PATCH v6 18/21] target/mips: msa: Split helpers for MADDV.<B|H|W|D> Aleksandar Markovic
2020-05-18 20:09 ` Aleksandar Markovic [this message]
2020-05-18 20:09 ` [PATCH v6 20/21] hw/mips: Add some logging for bad register offset cases Aleksandar Markovic
2020-05-26 7:42 ` Philippe Mathieu-Daudé
2020-05-26 10:05 ` Aleksandar Markovic
2020-05-26 10:38 ` Philippe Mathieu-Daudé
2020-05-26 10:46 ` Aleksandar Markovic
2020-05-27 7:52 ` Philippe Mathieu-Daudé
2020-05-18 20:09 ` [PATCH v6 21/21] hw/mips: Rename malta/mipssim/r4k/jazz files in hw/mips Aleksandar Markovic
2020-05-26 7:44 ` Philippe Mathieu-Daudé
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