From: Stephen Long <steplong@quicinc.com>
To: <qemu-devel@nongnu.org>
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org
Subject: [RISU PATCH v2 16/22] sve2.risu: Add patterns for integer multiply-add (unpredicated) ops
Date: Thu, 21 May 2020 12:25:05 -0700 [thread overview]
Message-ID: <20200521192511.6623-17-steplong@quicinc.com> (raw)
In-Reply-To: <20200521192511.6623-1-steplong@quicinc.com>
Signed-off-by: Stephen Long <steplong@quicinc.com>
---
sve2.risu | 41 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/sve2.risu b/sve2.risu
index c48717b..8602059 100755
--- a/sve2.risu
+++ b/sve2.risu
@@ -25,6 +25,47 @@ URSHR A64_V 00000100 tszh:2 00 1101 100 pg:3 tszl:2 imm3:3 zdn:5 \
SQSHLU A64_V 00000100 tszh:2 00 1111 100 pg:3 tszl:2 imm3:3 zdn:5 \
!constraints { !($tszh == 0 && $tszl == 0); }
+# Integer Multiply-Add (Unpredicated)
+CDOT A64_V 01000100 size:2 0 zm:5 0001 rot:2 zn:5 zda:5 \
+!constraints { $size > 1; }
+## saturating multiply-add interleaved long
+SQDMLALBT A64_V 01000100 size:2 0 zm:5 00001 0 zn:5 zda:5 \
+!constraints { $size != 0; }
+SQDMLSLBT A64_V 01000100 size:2 0 zm:5 00001 1 zn:5 zda:5 \
+!constraints { $size != 0; }
+## complex integer multiply-add
+CMLA A64_V 01000100 size:2 0 zm:5 001 0 rot:2 zn:5 zda:5
+SQRDCMLAH A64_V 01000100 size:2 0 zm:5 001 1 rot:2 zn:5 zda:5
+## integer multiply-add long
+SMLALB A64_V 01000100 size:2 0 zm:5 010 000 zn:5 zda:5 \
+!constraints { $size != 0; }
+SMLALT A64_V 01000100 size:2 0 zm:5 010 001 zn:5 zda:5 \
+!constraints { $size != 0; }
+UMLALB A64_V 01000100 size:2 0 zm:5 010 010 zn:5 zda:5 \
+!constraints { $size != 0; }
+UMLALT A64_V 01000100 size:2 0 zm:5 010 011 zn:5 zda:5 \
+!constraints { $size != 0; }
+SMLSLB A64_V 01000100 size:2 0 zm:5 010 100 zn:5 zda:5 \
+!constraints { $size != 0; }
+SMLSLT A64_V 01000100 size:2 0 zm:5 010 101 zn:5 zda:5 \
+!constraints { $size != 0; }
+UMLSLB A64_V 01000100 size:2 0 zm:5 010 110 zn:5 zda:5 \
+!constraints { $size != 0; }
+UMLSLT A64_V 01000100 size:2 0 zm:5 010 111 zn:5 zda:5 \
+!constraints { $size != 0; }
+## saturating multiply-add long
+SQDMLALB A64_V 01000100 size:2 0 zm:5 0110 00 zn:5 zda:5 \
+!constraints { $size != 0; }
+SQDMLALT A64_V 01000100 size:2 0 zm:5 0110 01 zn:5 zda:5 \
+!constraints { $size != 0; }
+SQDMLSLB A64_V 01000100 size:2 0 zm:5 0110 10 zn:5 zda:5 \
+!constraints { $size != 0; }
+SQDMLSLT A64_V 01000100 size:2 0 zm:5 0110 11 zn:5 zda:5 \
+!constraints { $size != 0; }
+## saturating multiply-add high
+SQRDMLAH A64_V 01000100 size:2 0 zm:5 01110 0 zn:5 zda:5
+SQRDMLSH A64_V 01000100 size:2 0 zm:5 01110 1 zn:5 zda:5
+
# Integer Multiply (Unpredicated)
## integer multiply vectors (unpredicated)
MUL A64_V 00000100 size:2 1 zm:5 0110 00 zn:5 zd:5
--
2.25.1
next prev parent reply other threads:[~2020-05-21 19:41 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-21 19:24 [RISU PATCH v2 00/22] Add risu patterns for SVE2 instructions Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 01/22] sve2.risu: Add patterns for floating-point pairwise ops Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 02/22] sve2.risu: Add patterns for integer multiply (unpredicated) ops Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 03/22] sve2.risu: Add patterns for integer (predicated) ops Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 04/22] sve2.risu: Add patterns for widening integer arithmetic ops Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 05/22] sve2.risu: Add patterns for misc ops Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 06/22] sve2.risu: Add patterns for accumulate ops Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 07/22] sve2.risu: Add patterns for narrowing ops Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 08/22] sve2.risu: Add patterns for character match insns Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 09/22] sve2.risu: Add patterns for histogram computation ops Stephen Long
2020-05-21 19:24 ` [RISU PATCH v2 10/22] sve2.risu: Add patterns for crypto operations Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 11/22] sve2.risu: Add patterns for bitwise shift (unpredicated) ops Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 12/22] sve2.risu: Add patterns for fp convert precision odd elems insns Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 13/22] sve2.risu: Add patterns for bitwise logical (unpredicated) ops Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 14/22] sve2.risu: Add patterns for fp unary ops (predicated) Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 15/22] sve2.risu: Add patterns for table lookup insns Stephen Long
2020-05-21 19:25 ` Stephen Long [this message]
2020-05-21 19:25 ` [RISU PATCH v2 17/22] sve2.risu: Add patterns for multiply (indexed) ops Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 18/22] sve2.risu: Add patterns for permute vector ops Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 19/22] sve2.risu: Add patterns for integer compare ops Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 20/22] sve2.risu: Add patterns for fp widening multiply-add ops Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 21/22] sve2.risu: Add patterns for gather load insns Stephen Long
2020-05-21 19:25 ` [RISU PATCH v2 22/22] sve2.risu: Add patterns for scatter store insns Stephen Long
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