From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Laurent Vivier" <lvivier@redhat.com>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
libvir-list@redhat.com, "Thomas Huth" <thuth@redhat.com>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Aleksandar Markovic" <aleksandar.qemu.devel@gmail.com>,
"Huacai Chen" <chenhc@lemote.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PULL 08/14] hw/pci-host/bonito: Set the Config register reset value with FIELD_DP32
Date: Tue, 26 May 2020 15:32:41 +0200 [thread overview]
Message-ID: <20200526133247.13066-9-f4bug@amsat.org> (raw)
In-Reply-To: <20200526133247.13066-1-f4bug@amsat.org>
Describe some bits of the Config registers fields with the
registerfields API. Use the FIELD_DP32() macro to set the
BONGENCFG register bits at reset.
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-id: <20200510210128.18343-12-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/bonito.c | 21 ++++++++++++++++++++-
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 20f2797a73..d0201ce59e 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -50,6 +50,7 @@
#include "sysemu/runstate.h"
#include "exec/address-spaces.h"
#include "hw/misc/unimp.h"
+#include "hw/registerfields.h"
/* #define DEBUG_BONITO */
@@ -112,8 +113,19 @@
/* Power on register */
#define BONITO_BONPONCFG (0x00 >> 2) /* 0x100 */
+
+/* PCI configuration register */
#define BONITO_BONGENCFG_OFFSET 0x4
#define BONITO_BONGENCFG (BONITO_BONGENCFG_OFFSET >> 2) /*0x104 */
+REG32(BONGENCFG, 0x104)
+FIELD(BONGENCFG, DEBUGMODE, 0, 1)
+FIELD(BONGENCFG, SNOOP, 1, 1)
+FIELD(BONGENCFG, CPUSELFRESET, 2, 1)
+FIELD(BONGENCFG, BYTESWAP, 6, 1)
+FIELD(BONGENCFG, UNCACHED, 7, 1)
+FIELD(BONGENCFG, PREFETCH, 8, 1)
+FIELD(BONGENCFG, WRITEBEHIND, 9, 1)
+FIELD(BONGENCFG, PCIQUEUE, 12, 1)
/* 2. IO & IDE configuration */
#define BONITO_IODEVCFG (0x08 >> 2) /* 0x108 */
@@ -577,11 +589,18 @@ static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
static void bonito_reset(void *opaque)
{
PCIBonitoState *s = opaque;
+ uint32_t val = 0;
/* set the default value of north bridge registers */
s->regs[BONITO_BONPONCFG] = 0xc40;
- s->regs[BONITO_BONGENCFG] = 0x1384;
+ val = FIELD_DP32(val, BONGENCFG, PCIQUEUE, 1);
+ val = FIELD_DP32(val, BONGENCFG, WRITEBEHIND, 1);
+ val = FIELD_DP32(val, BONGENCFG, PREFETCH, 1);
+ val = FIELD_DP32(val, BONGENCFG, UNCACHED, 1);
+ val = FIELD_DP32(val, BONGENCFG, CPUSELFRESET, 1);
+ s->regs[BONITO_BONGENCFG] = val;
+
s->regs[BONITO_IODEVCFG] = 0x2bff8010;
s->regs[BONITO_SDCFG] = 0x255e0091;
--
2.21.3
next prev parent reply other threads:[~2020-05-26 13:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-26 13:32 [PULL 00/14] mips-hw-next patches for 2020-05-26 Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 01/14] MAINTAINERS: Add Huacai Chen as fuloong2e co-maintainer Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 02/14] hw/pci-host: Use CONFIG_PCI_BONITO to select the Bonito North Bridge Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 03/14] hw/pci-host/bonito: Fix DPRINTF() format strings Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 04/14] hw/pci-host/bonito: Map peripheral using physical address Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 05/14] hw/pci-host/bonito: Map all the Bonito64 I/O range Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 06/14] hw/pci-host/bonito: Map the different PCI ranges more detailed Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 07/14] hw/pci-host/bonito: Better describe the I/O CS regions Philippe Mathieu-Daudé
2020-05-26 13:32 ` Philippe Mathieu-Daudé [this message]
2020-05-26 13:32 ` [PULL 09/14] hw/mips/fuloong2e: Move code and update a comment Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 10/14] hw/mips/fuloong2e: Fix typo in Fuloong machine name Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 11/14] hw/mips: Rename malta/mipssim/r4k/jazz files Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 12/14] hw/mips/malta: Add some logging for bad register offset cases Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 13/14] hw/mips/mips_int: De-duplicate KVM interrupt delivery Philippe Mathieu-Daudé
2020-05-26 13:32 ` [PULL 14/14] MAINTAINERS: Change Aleksandar Rikalo's email address Philippe Mathieu-Daudé
2020-05-27 15:13 ` [PULL 00/14] mips-hw-next patches for 2020-05-26 Peter Maydell
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