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Tsirkin" To: Jan Kiszka Subject: Re: [virtio-comment] Re: [RFC] ivshmem v2: Shared memory device specification Message-ID: <20200727101824-mutt-send-email-mst@kernel.org> References: <20200727091802-mutt-send-email-mst@kernel.org> <85f69f31-e4c6-e7af-1fa5-90e5a2c81ae8@siemens.com> <20200727095239-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 In-Reply-To: X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=207.211.31.81; envelope-from=mst@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/27 03:37:14 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jailhouse , liang yan , Alex =?iso-8859-1?Q?Benn=E9e?= , qemu-devel , "virtio-comment@lists.oasis-open.org" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Jul 27, 2020 at 04:17:06PM +0200, Jan Kiszka wrote: > On 27.07.20 15:56, Michael S. Tsirkin wrote: > > On Mon, Jul 27, 2020 at 03:39:32PM +0200, Jan Kiszka wrote: > > > On 27.07.20 15:20, Michael S. Tsirkin wrote: > > > > On Mon, May 25, 2020 at 09:58:28AM +0200, Jan Kiszka wrote: > > > > > #### Vendor Specific Capability (ID 09h) > > > > > > > > > > This capability must always be present. > > > > > > > > > > | Offset | Register | Content | > > > > > |-------:|:--------------------|:-----------------------------------------------| > > > > > | 00h | ID | 09h | > > > > > | 01h | Next Capability | Pointer to next capability or 00h | > > > > > | 02h | Length | 20h if Base Address is present, 18h otherwise | > > > > > | 03h | Privileged Control | Bit 0 (read/write): one-shot interrupt mode | > > > > > | | | Bits 1-7: Reserved (0 on read, writes ignored) | > > > > > | 04h | State Table Size | 32-bit size of read-only State Table | > > > > > | 08h | R/W Section Size | 64-bit size of common read/write section | > > > > > | 10h | Output Section Size | 64-bit size of output sections | > > > > > | 18h | Base Address | optional: 64-bit base address of shared memory | > > > > > > > > > > All registers are read-only. Writes are ignored, except to bit 0 of > > > > > the Privileged Control register. > > > > > > > > > > > > Is there value in making this follow the virtio vendor-specific > > > > capability format? That will cost several extra bytes - do you envision > > > > having many of these in the config space? > > > > > > Of course, this could be modeled with via virtio_pci_cap as well. Would add > > > 12 unused by bytes and one type byte. If it helps to make the device look > > > more virtio'ish, but I'm afraid there are more differences at PCI level. > > > > I guess it will be useful if we ever find it handy to make an ivshmem > > device also be a virtio device. Can't say why yet but if we don't care > > it vaguely seems kind of like a good idea. I guess it will also be handy > > if you ever need another vendor specific cap: you already get a way to > > identify it without breaking drivers. > > > > I can look into that. Those 12 wasted bytes are a bit ugly, but so far we > are not short on config space, even in the non-extended range. > > More problematic is that the existing specification of virtio_pci_cap > assumes that this describes a structure in a PCI resource, rather than even > being that data itself, and even a register (privileged control). > > Would it be possible to split the types into two ranges, one for the > existing structure, one for others - like ivshmem - that will only share the > cfg_type field? Sure. > > > > > I do not see a use case for having multiple of those caps above per device. > > > If someone comes around with a valid use case for having multiple, > > > non-consequitive shared memory regions for one device, we would need to add > > > registers for them. But that would also only work for non-BAR regions due to > > > limited BARs. > > > > > > OK, I guess this answers the below too. > > > > > > Also, do we want to define an extended capability format in case this > > > > is a pci extended capability? > > > > > > > > > > What would be the practical benefit? Do you see PCIe caps that could become > > > useful in virtual setups? > > > > So if we ever have a huge number of these caps, PCIe allows many more > > caps. > > > > > We don't do that for regular virtio devices > > > either, do we? > > > > We don't, there's a small number of these so we don't run out of config > > space. > > Right. But then it would not a be a problem to add PCIe (right before adding > it becomes impossible) and push new caps into the extended space. And all > that without breaking existing drivers. It's just a cap, and the spec so far > does not state that there must be no other cap, neither in current virtio > nor this ivshmem device. > > Jan Right. > -- > Siemens AG, Corporate Technology, CT RDA IOT SES-DE > Corporate Competence Center Embedded Linux