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c=relaxed/relaxed; d=lmichel.fr; s=pharaoh; t=1601726026; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=91TQFNV43aOMH4iXLd+vKMbxmiHWPTBV9D9iUJS+qd0=; b=G3/iuyi5JwmRsJXf58sOFP2cUrWrqJOhlGIJ6BDN2Dn2tJ9COPh7rNi5SL9Bw7iDKbDcKU 4Ia7EdFHK97y5AfrSkmqZEWmv1zyROMQwu1NGlelToizJ7N15v6Sz4wcGTzBxRzlQoeN7j I/Ve4raV94ACda/cpV5nc9PSt/slg3sdPsLtOT2ryguCuP/mwTu81xoDVM3Y72msTL7lMO sXmhtfmpmw6Ik3Eixm0szwLwtu92lHC7B5U3PdbG9eWXICkbglGy6LcdId0MX6oDTVjrLT qjIMlmYW9K3/DvQGTpQ4YBwoElYky6uB7YVYZo65KfudDtOzjynqu8A5zl+SPw== Date: Sat, 3 Oct 2020 13:54:44 +0200 From: Luc Michel To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Subject: Re: [PATCH 04/14] hw/arm/raspi: add a skeleton implementation of the cprman Message-ID: <20201003115444.m2woqcpit34vfv3u@sekoia-pc.home.lmichel.fr> References: <20200925101731.2159827-1-luc@lmichel.fr> <20200925101731.2159827-5-luc@lmichel.fr> <85ccb491-8d4a-caf3-595d-7415471f5dc7@amsat.org> <20200928084515.r7s3cl6jlzm465iw@sekoia-pc.home.lmichel.fr> <4aa9f0c3-dc4b-1e87-d601-87b0498de8b1@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; 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ORIGINATING; auth=pass smtp.auth=sekoia smtp.mailfrom=luc@lmichel.fr Received-SPF: pass client-ip=149.202.28.74; envelope-from=luc@lmichel.fr; helo=pharaoh.lmichel.fr X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/03 07:53:47 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Andrew Baumann Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 16:37 Fri 02 Oct , Philippe Mathieu-Daudé wrote: [snip] > >>> +struct BCM2835CprmanState { > >>> + /*< private >*/ > >>> + SysBusDevice parent_obj; > >>> + > >>> + /*< public >*/ > >>> + MemoryRegion iomem; > >>> + > >>> + uint32_t regs[CPRMAN_NUM_REGS]; > >>> + uint32_t xosc_freq; > >>> + > >>> + Clock *xosc; > > Isn't it xosc external to the CPRMAN? > Yes on real hardware I'm pretty sure it's the oscillator we can see on the board itself, near the SoC (on the bottom side). This is how I first planned to implement it. I then realized that would add complexity to the BCM2835Peripherals model for no good reasons IMHO (mainly because of migration). So at the end I put it inside the CPRMAN for simplicity, and added a property to set its frequency. > >>> +}; [snip] > >>> +static const MemoryRegionOps cprman_ops = { > >>> + .read = cprman_read, > >>> + .write = cprman_write, > >>> + .endianness = DEVICE_LITTLE_ENDIAN, > >>> + .valid = { > >>> + .min_access_size = 4, > >>> + .max_access_size = 4, > >> > >> I couldn't find this in the public datasheets (any pointer?). > >> > >> Since your implementation is 32bit, can you explicit .impl > >> min/max = 4? > > > > I could not find this information either, but I assumed this is the > > case, mainly because of the 'PASSWORD' field in all registers. > > Good point. Do you mind adding a comment about it here please? > OK > > > > Regarding .impl, I thought that having .valid was enough? > > Until we eventually figure out we can do 64-bit accesses, > so someone change .valid.max to 8 and your model is broken :/ OK, I'll add the .impl constraints. [snip] -- Luc