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[79.179.71.128]) by smtp.gmail.com with ESMTPSA id i1sm818343wrx.44.2020.10.05.10.46.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 05 Oct 2020 10:46:20 -0700 (PDT) Date: Mon, 5 Oct 2020 13:46:18 -0400 From: "Michael S. Tsirkin" To: andrew@daynix.com Subject: Re: [PATCH v3 2/2] hw/virtio-pci Added AER capability. Message-ID: <20201005134406-mutt-send-email-mst@kernel.org> References: <20201005115601.103791-1-andrew@daynix.com> <20201005115601.103791-3-andrew@daynix.com> MIME-Version: 1.0 In-Reply-To: <20201005115601.103791-3-andrew@daynix.com> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=mst@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=63.128.21.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/10/05 01:25:11 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.733, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, Oct 05, 2020 at 02:56:01PM +0300, andrew@daynix.com wrote: > From: Andrew > > Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1878465 That's a private bug - what information can you share about the motivation for the patch? > Added AER capability for virtio-pci devices. > Also added property for devices, by default AER is disabled. > > Signed-off-by: Andrew Melnychenko > --- > hw/virtio/virtio-pci.c | 16 ++++++++++++++++ > hw/virtio/virtio-pci.h | 4 ++++ > 2 files changed, 20 insertions(+) > > diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c > index ae60c1e249..e0a7936f9c 100644 > --- a/hw/virtio/virtio-pci.c > +++ b/hw/virtio/virtio-pci.c > @@ -1807,6 +1807,12 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) > */ > pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); > > + if (proxy->flags & VIRTIO_PCI_FLAG_AER) { > + pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset, > + PCI_ERR_SIZEOF, NULL); > + last_pcie_cap_offset += PCI_ERR_SIZEOF; > + } > + > if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { > /* Init error enabling flags */ > pcie_cap_deverr_init(pci_dev); > @@ -1848,7 +1854,15 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) > > static void virtio_pci_exit(PCIDevice *pci_dev) > { > + VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev); > + bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) && > + !pci_bus_is_root(pci_get_bus(pci_dev)); > + > msix_uninit_exclusive_bar(pci_dev); > + if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port && > + pci_is_express(pci_dev)) { > + pcie_aer_exit(pci_dev); > + } > } > > static void virtio_pci_reset(DeviceState *qdev) > @@ -1901,6 +1915,8 @@ static Property virtio_pci_properties[] = { > VIRTIO_PCI_FLAG_INIT_PM_BIT, true), > DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags, > VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), > + DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, > + VIRTIO_PCI_FLAG_AER_BIT, false), > DEFINE_PROP_END_OF_LIST(), > }; > Does management need ability to enable this capability? If yes let's cc them. If no let's rename to x-aer so we don't commit to a stable interface ... > diff --git a/hw/virtio/virtio-pci.h b/hw/virtio/virtio-pci.h > index 91096f0291..3986b4f0e3 100644 > --- a/hw/virtio/virtio-pci.h > +++ b/hw/virtio/virtio-pci.h > @@ -45,6 +45,7 @@ enum { > VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, > VIRTIO_PCI_FLAG_INIT_PM_BIT, > VIRTIO_PCI_FLAG_INIT_FLR_BIT, > + VIRTIO_PCI_FLAG_AER_BIT, > }; > > /* Need to activate work-arounds for buggy guests at vmstate load. */ > @@ -84,6 +85,9 @@ enum { > /* Init Function Level Reset capability */ > #define VIRTIO_PCI_FLAG_INIT_FLR (1 << VIRTIO_PCI_FLAG_INIT_FLR_BIT) > > +/* Advanced Error Reporting capability */ > +#define VIRTIO_PCI_FLAG_AER (1 << VIRTIO_PCI_FLAG_AER_BIT) > + > typedef struct { > MSIMessage msg; > int virq; > -- > 2.28.0