From: zhaolichang <zhaolichang@huawei.com>
To: <qemu-trivial@nongnu.org>
Cc: David Edmondson <david.edmondson@oracle.com>,
zhaolichang <zhaolichang@huawei.com>,
qemu-devel@nongnu.org, Philippe Mathieu-Daude <f4bug@amsat.org>
Subject: [PATCH V2 11/14] avr/: fix some comment spelling errors
Date: Fri, 9 Oct 2020 14:44:46 +0800 [thread overview]
Message-ID: <20201009064449.2336-12-zhaolichang@huawei.com> (raw)
In-Reply-To: <20201009064449.2336-1-zhaolichang@huawei.com>
I found that there are many spelling errors in the comments of qemu/target/avr.
I used spellcheck to check the spelling errors and found some errors in the folder.
Signed-off-by: zhaolichang <zhaolichang@huawei.com>
Reviewed-by: David Edmondson <david.edmondson@oracle.com>
Reviewed-by: Philippe Mathieu-Daude<f4bug@amsat.org>
---
target/avr/helper.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/avr/helper.c b/target/avr/helper.c
index d96d14372b..9f325bc1d8 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -97,7 +97,7 @@ int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf,
hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
- return addr; /* I assume 1:1 address correspondance */
+ return addr; /* I assume 1:1 address correspondence */
}
bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
@@ -298,7 +298,7 @@ void helper_outb(CPUAVRState *env, uint32_t port, uint32_t data)
}
/*
- * this function implements LD instruction when there is a posibility to read
+ * this function implements LD instruction when there is a possibility to read
* from a CPU register
*/
target_ulong helper_fullrd(CPUAVRState *env, uint32_t addr)
@@ -322,7 +322,7 @@ target_ulong helper_fullrd(CPUAVRState *env, uint32_t addr)
}
/*
- * this function implements ST instruction when there is a posibility to write
+ * this function implements ST instruction when there is a possibility to write
* into a CPU register
*/
void helper_fullwr(CPUAVRState *env, uint32_t data, uint32_t addr)
--
2.26.2.windows.1
next prev parent reply other threads:[~2020-10-09 7:06 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-09 6:44 [PATCH V2 00/14] fix some comment spelling errors zhaolichang
2020-10-09 6:44 ` [PATCH V2 01/14] cris/: " zhaolichang
2020-10-09 13:14 ` Eric Blake
2020-10-09 6:44 ` [PATCH V2 02/14] ppc/: " zhaolichang
2020-10-26 9:14 ` Thomas Huth
2020-10-26 10:04 ` Greg Kurz
2020-10-27 2:05 ` David Gibson
2020-10-27 2:07 ` David Gibson
2020-10-09 6:44 ` [PATCH V2 03/14] riscv/: " zhaolichang
2020-10-09 7:15 ` Bin Meng
2020-10-09 6:44 ` [PATCH V2 04/14] rx/: " zhaolichang
2020-10-26 22:14 ` Philippe Mathieu-Daudé
2020-10-09 6:44 ` [PATCH V2 05/14] tricore/: " zhaolichang
2020-10-09 6:44 ` [PATCH V2 06/14] mips/: " zhaolichang
2020-10-09 14:36 ` Philippe Mathieu-Daudé
2020-10-09 15:15 ` Philippe Mathieu-Daudé
2020-10-09 6:44 ` [PATCH V2 07/14] s390x/: " zhaolichang
2020-10-09 7:31 ` Thomas Huth
2020-10-09 6:44 ` [PATCH V2 08/14] m68k/: " zhaolichang
2020-12-12 17:10 ` Laurent Vivier
2020-12-12 17:56 ` Philippe Mathieu-Daudé
2020-12-12 19:58 ` Laurent Vivier
2020-12-12 20:04 ` Philippe Mathieu-Daudé
2020-10-09 6:44 ` [PATCH V2 09/14] sh4/: " zhaolichang
2020-10-25 0:37 ` Philippe Mathieu-Daudé
2020-10-09 6:44 ` [PATCH V2 10/14] i386/: " zhaolichang
2020-10-09 6:44 ` zhaolichang [this message]
2020-10-09 6:44 ` [PATCH V2 12/14] arm/: " zhaolichang
2020-10-09 6:44 ` [PATCH V2 13/14] alpha/: " zhaolichang
2020-10-09 6:44 ` [PATCH V2 14/14] target/: " zhaolichang
2020-10-09 7:12 ` [PATCH V2 00/14] " no-reply
[not found] ` <a5a68476-0ed8-08f9-f993-464317d798bf@huawei.com>
2020-10-20 6:42 ` Philippe Mathieu-Daudé
2020-10-29 2:22 ` Lichang Zhao
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