From: Alexey Baturo <baturo.alexey@gmail.com>
Cc: baturo.alexey@gmail.com, qemu-riscv@nongnu.org,
sagark@eecs.berkeley.edu, kbastian@mail.uni-paderborn.de,
richard.henderson@linaro.org, qemu-devel@nongnu.org,
space.monkey.delivers@gmail.com, Alistair.Francis@wdc.com,
kupokupokupopo@gmail.com, palmer@dabbelt.com
Subject: [PATCH v4 0/5] RISC-V Pointer Masking implementation
Date: Sat, 17 Oct 2020 10:11:49 +0300 [thread overview]
Message-ID: <20201017071154.20642-1-space.monkey.delivers@gmail.com> (raw)
Hi folks,
Addressing code style issues that were found by patchew.
Also big thanks to Richard Henderson for reviewing the series and giving great comments!
Thanks
Alexey Baturo (4):
[RISCV_PM] Add J-extension into RISC-V
[RISCV_PM] Support CSRs required for RISC-V PM extension except for
ones in hypervisor mode
[RISCV_PM] Print new PM CSRs in QEMU logs
[RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of
instructions
Anatoly Parshintsev (1):
[RISCV_PM] Implement address masking functions required for RISC-V
Pointer Masking extension
target/riscv/cpu.c | 30 +++
target/riscv/cpu.h | 33 +++
target/riscv/cpu_bits.h | 66 ++++++
target/riscv/csr.c | 271 ++++++++++++++++++++++++
target/riscv/insn_trans/trans_rva.c.inc | 3 +
target/riscv/insn_trans/trans_rvd.c.inc | 2 +
target/riscv/insn_trans/trans_rvf.c.inc | 2 +
target/riscv/insn_trans/trans_rvi.c.inc | 2 +
target/riscv/translate.c | 44 ++++
9 files changed, 453 insertions(+)
--
2.20.1
next reply other threads:[~2020-10-17 7:13 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-17 7:11 Alexey Baturo [this message]
2020-10-17 7:11 ` [PATCH v4 1/5] [RISCV_PM] Add J-extension into RISC-V Alexey Baturo
2020-10-21 20:22 ` Alistair Francis
2020-10-17 7:11 ` [PATCH v4 2/5] [RISCV_PM] Support CSRs required for RISC-V PM extension except for ones in hypervisor mode Alexey Baturo
2020-10-17 7:11 ` [PATCH v4 3/5] [RISCV_PM] Print new PM CSRs in QEMU logs Alexey Baturo
2020-10-17 7:11 ` [PATCH v4 4/5] [RISCV_PM] Support pointer masking for RISC-V for i/c/f/d/a types of instructions Alexey Baturo
2020-10-17 7:11 ` [PATCH v4 5/5] [RISCV_PM] Implement address masking functions required for RISC-V Pointer Masking extension Alexey Baturo
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