From: Andrew Jones <drjones@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Marc Zyngier <maz@kernel.org>,
xu910121@sina.com, qemu-devel <qemu-devel@nongnu.org>,
kvmarm <kvmarm@lists.cs.columbia.edu>,
"Dave.Martin" <dave.martin@arm.com>
Subject: Re: Kernel patch cases qemu live migration failed.
Date: Mon, 19 Oct 2020 11:25:25 +0200 [thread overview]
Message-ID: <20201019092525.ekvgbcwwtm63pueu@kamzik.brq.redhat.com> (raw)
In-Reply-To: <CAFEAcA-LBmbjp-Teb35f=O-1QtMLd8bAuq5XaCz9URdQZ1jxow@mail.gmail.com>
On Thu, Oct 15, 2020 at 03:57:02PM +0100, Peter Maydell wrote:
> On Thu, 15 Oct 2020 at 15:41, Andrew Jones <drjones@redhat.com> wrote:
> > The reporter states neither the source nor destination hardware supports
> > SVE. My guess is that what's happening is the reserved ID register
> > ID_UNALLOCATED(4,4) was showing up in the KVM_GET_REG_LIST count on
> > the old kernel, but the new kernel filters it out. Maybe it is a
> > bug to filter it out of the count, as it's a reserved ID register and
> > I suppose the other reserved ID registers are still showing up?
>
> Yeah, RES0 ID registers should show up in the list, because otherwise
> userspace has to annoyingly special case them when the architecture
> eventually defines behaviour for them.
>
> Dave's comment in the kernel commit message
> # ID_AA64ZFR0_EL1 is RO-RAZ for MRS/MSR when SVE is disabled for the
> # guest, but for compatibility with non-SVE aware KVM implementations
> # the register should not be enumerated at all for KVM_GET_REG_LIST
> # in this case.
> seems wrong to me -- for compatibility the register should remain
> present and behave as RAZ/WI if SVE is disabled in the guest,
> the same way it was before the kernel/KVM knew about SVE at all.
Yup, I agree with you and I'll try writing a patch for this.
Thanks,
drew
next prev parent reply other threads:[~2020-10-19 9:26 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-15 4:06 Kernel patch cases qemu live migration failed 张东旭
2020-10-15 11:26 ` Marc Zyngier
2020-10-15 13:35 ` Andrew Jones
2020-10-15 13:52 ` Marc Zyngier
2020-10-15 14:41 ` Andrew Jones
2020-10-15 14:57 ` Peter Maydell
2020-10-19 9:25 ` Andrew Jones [this message]
2020-10-19 11:32 ` Dave Martin
2020-10-19 11:43 ` Peter Maydell
2020-10-19 13:40 ` Andrew Jones
2020-10-19 14:18 ` Peter Maydell
2020-10-19 14:58 ` Dave Martin
2020-10-19 15:23 ` Andrew Jones
2020-10-19 16:36 ` Dave Martin
2020-10-15 13:26 ` Andrew Jones
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