From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Luc Michel" <luc@lmichel.fr>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Andrew Baumann" <Andrew.Baumann@microsoft.com>,
qemu-arm@nongnu.org, "Luc Michel" <luc.michel@greensocs.com>
Subject: [PATCH v4 3/9] hw/arm/bcm2836: Introduce BCM283XClass::core_count
Date: Sat, 24 Oct 2020 19:01:21 +0200 [thread overview]
Message-ID: <20201024170127.3592182-4-f4bug@amsat.org> (raw)
In-Reply-To: <20201024170127.3592182-1-f4bug@amsat.org>
The BCM2835 has only one core. Introduce the core_count field to
be able to use values different than BCM283X_NCPUS (4).
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/bcm2836.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 8f921d8e904..c5d46a8e805 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -23,6 +23,7 @@ typedef struct BCM283XClass {
/*< public >*/
const char *name;
const char *cpu_type;
+ unsigned core_count;
hwaddr peri_base; /* Peripheral base address seen by the CPU */
hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
int clusterid;
@@ -39,7 +40,7 @@ static void bcm2836_init(Object *obj)
BCM283XClass *bc = BCM283X_GET_CLASS(obj);
int n;
- for (n = 0; n < BCM283X_NCPUS; n++) {
+ for (n = 0; n < bc->core_count; n++) {
object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
bc->cpu_type);
}
@@ -149,6 +150,7 @@ static void bcm2836_class_init(ObjectClass *oc, void *data)
BCM283XClass *bc = BCM283X_CLASS(oc);
bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
+ bc->core_count = BCM283X_NCPUS;
bc->peri_base = 0x3f000000;
bc->ctrl_base = 0x40000000;
bc->clusterid = 0xf;
@@ -163,6 +165,7 @@ static void bcm2837_class_init(ObjectClass *oc, void *data)
BCM283XClass *bc = BCM283X_CLASS(oc);
bc->cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
+ bc->core_count = BCM283X_NCPUS;
bc->peri_base = 0x3f000000;
bc->ctrl_base = 0x40000000;
bc->clusterid = 0x0;
--
2.26.2
next prev parent reply other threads:[~2020-10-24 17:06 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-24 17:01 [PATCH v4 0/9] hw/arm: Add raspi Zero, 1A+ and 3A+ machines Philippe Mathieu-Daudé
2020-10-24 17:01 ` [PATCH v4 1/9] hw/arm/bcm2836: Restrict BCM283XInfo declaration to C source Philippe Mathieu-Daudé
2020-10-24 17:01 ` [PATCH v4 2/9] hw/arm/bcm2836: QOM'ify more by adding class_init() to each SoC type Philippe Mathieu-Daudé
2020-10-24 17:01 ` Philippe Mathieu-Daudé [this message]
2020-10-24 17:01 ` [PATCH v4 4/9] hw/arm/bcm2836: Only provide "enabled-cpus" property to multicore SoCs Philippe Mathieu-Daudé
2020-10-24 17:01 ` [PATCH v4 5/9] hw/arm/bcm2836: Split out common realize() code Philippe Mathieu-Daudé
2020-10-24 17:01 ` [PATCH v4 6/9] hw/arm/bcm2836: Introduce the BCM2835 SoC Philippe Mathieu-Daudé
2020-10-24 17:01 ` [PATCH v4 7/9] hw/arm/raspi: Add the Raspberry Pi A+ machine Philippe Mathieu-Daudé
2020-10-24 17:01 ` [PATCH v4 8/9] hw/arm/raspi: Add the Raspberry Pi Zero machine Philippe Mathieu-Daudé
2020-10-24 17:01 ` [PATCH v4 9/9] hw/arm/raspi: Add the Raspberry Pi 3 model A+ Philippe Mathieu-Daudé
2020-10-26 17:22 ` [PATCH v4 0/9] hw/arm: Add raspi Zero, 1A+ and 3A+ machines Peter Maydell
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