From: remi.denis.courmont@huawei.com
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org
Subject: [PATCH 07/18] target/arm: add 64-bit S-EL2 to EL exception table
Date: Fri, 18 Dec 2020 12:37:48 +0200 [thread overview]
Message-ID: <20201218103759.19929-7-remi.denis.courmont@huawei.com> (raw)
In-Reply-To: <3337797.iIbC2pHGDl@basile.remlab.net>
From: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
With the ARMv8.4-SEL2 extension, EL2 is a legal exception level in
secure mode, though it can only be AArch64.
This patch adds the target EL for exceptions from 64-bit S-EL2.
It also fixes the target EL to EL2 when HCR.{A,F,I}MO are set in secure
mode. Those values were never used in practice as the effective value of
HCR was always 0 in secure mode.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
---
target/arm/helper.c | 10 +++++-----
target/arm/op_helper.c | 4 ++--
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index b85c1bf9d8..99adac5cc1 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9005,13 +9005,13 @@ static const int8_t target_el_table[2][2][2][2][2][4] = {
{{/* 0 1 1 0 */{ 3, 3, 3, -1 },{ 3, -1, -1, 3 },},
{/* 0 1 1 1 */{ 3, 3, 3, -1 },{ 3, -1, -1, 3 },},},},},
{{{{/* 1 0 0 0 */{ 1, 1, 2, -1 },{ 1, 1, -1, 1 },},
- {/* 1 0 0 1 */{ 2, 2, 2, -1 },{ 1, 1, -1, 1 },},},
- {{/* 1 0 1 0 */{ 1, 1, 1, -1 },{ 1, 1, -1, 1 },},
- {/* 1 0 1 1 */{ 2, 2, 2, -1 },{ 1, 1, -1, 1 },},},},
+ {/* 1 0 0 1 */{ 2, 2, 2, -1 },{ 2, 2, -1, 1 },},},
+ {{/* 1 0 1 0 */{ 1, 1, 1, -1 },{ 1, 1, 1, 1 },},
+ {/* 1 0 1 1 */{ 2, 2, 2, -1 },{ 2, 2, 2, 1 },},},},
{{{/* 1 1 0 0 */{ 3, 3, 3, -1 },{ 3, 3, -1, 3 },},
{/* 1 1 0 1 */{ 3, 3, 3, -1 },{ 3, 3, -1, 3 },},},
- {{/* 1 1 1 0 */{ 3, 3, 3, -1 },{ 3, 3, -1, 3 },},
- {/* 1 1 1 1 */{ 3, 3, 3, -1 },{ 3, 3, -1, 3 },},},},},
+ {{/* 1 1 1 0 */{ 3, 3, 3, -1 },{ 3, 3, 3, 3 },},
+ {/* 1 1 1 1 */{ 3, 3, 3, -1 },{ 3, 3, 3, 3 },},},},},
};
/*
diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c
index ff91fe6121..5e0f123043 100644
--- a/target/arm/op_helper.c
+++ b/target/arm/op_helper.c
@@ -652,10 +652,10 @@ void HELPER(access_check_cp_reg)(CPUARMState *env, void *rip, uint32_t syndrome,
target_el = exception_target_el(env);
break;
case CP_ACCESS_TRAP_EL2:
- /* Requesting a trap to EL2 when we're in EL3 or S-EL0/1 is
+ /* Requesting a trap to EL2 when we're in EL3 is
* a bug in the access function.
*/
- assert(!arm_is_secure(env) && arm_current_el(env) != 3);
+ assert(arm_current_el(env) != 3);
target_el = 2;
break;
case CP_ACCESS_TRAP_EL3:
--
2.29.2
next prev parent reply other threads:[~2020-12-18 10:48 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-18 10:37 [PATCHv4 00/18] ARMv8.4-A Secure EL2 Rémi Denis-Courmont
2020-12-18 10:37 ` [PATCH 01/18] target/arm: remove redundant tests remi.denis.courmont
2020-12-18 10:37 ` [PATCH 02/18] target/arm: add arm_is_el2_enabled() helper remi.denis.courmont
2020-12-18 10:37 ` [PATCH 03/18] target/arm: use arm_is_el2_enabled() where applicable remi.denis.courmont
2020-12-21 20:54 ` Richard Henderson
2021-01-04 12:08 ` Rémi Denis-Courmont
2020-12-18 10:37 ` [PATCH 04/18] target/arm: use arm_hcr_el2_eff() " remi.denis.courmont
2020-12-18 10:37 ` [PATCH 05/18] target/arm: factor MDCR_EL2 common handling remi.denis.courmont
2020-12-18 10:37 ` [PATCH 06/18] target/arm: declare new AA64PFR0 bit-fields remi.denis.courmont
2020-12-18 10:37 ` remi.denis.courmont [this message]
2021-01-12 0:04 ` [PATCH 07/18] target/arm: add 64-bit S-EL2 to EL exception table Richard Henderson
2021-01-12 9:04 ` Rémi Denis-Courmont
2021-01-12 9:55 ` Peter Maydell
2020-12-18 10:37 ` [PATCH 08/18] target/arm: add MMU stage 1 for Secure EL2 remi.denis.courmont
2020-12-18 10:37 ` [PATCH 09/18] target/arm: add ARMv8.4-SEL2 system registers remi.denis.courmont
2021-01-12 0:05 ` Richard Henderson
2020-12-18 10:37 ` [PATCH 10/18] target/arm: handle VMID change in secure state remi.denis.courmont
2020-12-18 10:37 ` [PATCH 11/18] target/arm: do S1_ptw_translate() before address space lookup remi.denis.courmont
2020-12-18 10:37 ` [PATCH 12/18] target/arm: translate NS bit in page-walks remi.denis.courmont
2021-01-12 0:06 ` Richard Henderson
2020-12-18 10:37 ` [PATCH 13/18] target/arm: generalize 2-stage page-walk condition remi.denis.courmont
2021-01-12 0:07 ` Richard Henderson
2020-12-18 10:37 ` [PATCH 14/18] target/arm: secure stage 2 translation regime remi.denis.courmont
2021-01-12 0:19 ` Richard Henderson
2021-01-12 7:27 ` Rémi Denis-Courmont
2021-01-12 0:20 ` Richard Henderson
2021-01-12 7:29 ` Rémi Denis-Courmont
2020-12-18 10:37 ` [PATCH 15/18] target/arm: set HPFAR_EL2.NS on secure stage 2 faults remi.denis.courmont
2021-01-12 0:10 ` Richard Henderson
2020-12-18 10:37 ` [PATCH 16/18] target/arm: add ARMv8.4-SEL2 extension remi.denis.courmont
2021-01-12 0:13 ` Richard Henderson
2021-01-12 7:33 ` Rémi Denis-Courmont
2020-12-18 10:37 ` [PATCH 17/18] target/arm: enable Secure EL2 in max CPU remi.denis.courmont
2020-12-18 10:37 ` [PATCH 18/18] target/arm: refactor vae1_tlbmask() remi.denis.courmont
2021-01-12 0:14 ` Richard Henderson
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