From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
"Cleber Rosa" <crosa@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping
Date: Thu, 24 Dec 2020 11:17:45 +0800 [thread overview]
Message-ID: <20201224031750.52146-4-jiaxun.yang@flygoat.com> (raw)
In-Reply-To: <20201224031750.52146-1-jiaxun.yang@flygoat.com>
Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel,
despites south bridge IRQs needs special care, all other
IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'.
As south bridge IRQs are all handled by ISA bus, we can
make a simple direct mapping.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug)
---
hw/pci-host/bonito.c | 30 +++++++-----------------------
1 file changed, 7 insertions(+), 23 deletions(-)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index a99eced065..3fad470fc6 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -62,6 +62,9 @@
#define DPRINTF(fmt, ...)
#endif
+/* PCI slots IRQ pins start position */
+#define BONITO_PCI_IRQ_BASE 25
+
/* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/
#define BONITO_BOOT_BASE 0x1fc00000
#define BONITO_BOOT_SIZE 0x00100000
@@ -546,19 +549,16 @@ static const MemoryRegionOps bonito_spciconf_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
-#define BONITO_IRQ_BASE 32
-
static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
{
BonitoState *s = opaque;
qemu_irq *pic = s->pic;
PCIBonitoState *bonito_state = s->pci_dev;
- int internal_irq = irq_num - BONITO_IRQ_BASE;
- if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) {
+ if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) {
qemu_irq_pulse(*pic);
} else { /* level triggered */
- if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) {
+ if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) {
qemu_irq_raise(*pic);
} else {
qemu_irq_lower(*pic);
@@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, int irq_num, int level)
}
}
-/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) */
-static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num)
+static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin)
{
- int slot;
-
- slot = (pci_dev->devfn >> 3);
-
- switch (slot) {
- case 5: /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */
- return irq_num % 4 + BONITO_IRQ_BASE;
- case 6: /* FULOONG2E_ATI_SLOT, VGA */
- return 4 + BONITO_IRQ_BASE;
- case 7: /* FULOONG2E_RTL_SLOT, RTL8139 */
- return 5 + BONITO_IRQ_BASE;
- case 8 ... 12: /* PCI slot 1 to 4 */
- return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE;
- default: /* Unknown device, don't do any translation */
- return irq_num;
- }
+ return BONITO_PCI_IRQ_BASE + pin;
}
static void bonito_reset(void *opaque)
--
2.29.2
next prev parent reply other threads:[~2020-12-24 3:23 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-24 3:17 [PATCH v3 0/8] hw/mips/fuloong2e fixes Jiaxun Yang
2020-12-24 3:17 ` [PATCH v3 1/8] hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT Jiaxun Yang
2020-12-24 3:17 ` [PATCH v3 2/8] hw/mips/fuloong2e: Relpace fault links Jiaxun Yang
2020-12-24 3:17 ` Jiaxun Yang [this message]
2020-12-24 8:36 ` [PATCH v3 3/8] hw/pci-host/bonito: Fixup IRQ mapping BALATON Zoltan via
2020-12-24 8:40 ` BALATON Zoltan via
2020-12-25 1:46 ` Jiaxun Yang
2020-12-24 3:17 ` [PATCH v3 4/8] hw/pci-host/bonito: Fixup pci.lomem mapping Jiaxun Yang
2021-01-01 11:07 ` Philippe Mathieu-Daudé
2021-01-01 13:03 ` Jiaxun Yang
2020-12-24 3:17 ` [PATCH v3 5/8] hw/mips/fuloong2e: Remove unused env entry Jiaxun Yang
2020-12-24 8:24 ` BALATON Zoltan via
2021-01-01 18:05 ` Philippe Mathieu-Daudé
2021-01-01 20:51 ` Philippe Mathieu-Daudé
2020-12-24 3:17 ` [PATCH v3 6/8] hw/mips/fuloong2e: Correct cpuclock env Jiaxun Yang
2020-12-24 3:17 ` [PATCH v3 7/8] hw/mips/fuloong2e: Add highmem support Jiaxun Yang
2020-12-24 3:17 ` [PATCH v3 8/8] tests/acceptance: Test boot_linux_console for fuloong2e Jiaxun Yang
2021-01-03 13:35 ` Philippe Mathieu-Daudé
2021-01-03 20:51 ` [PATCH v3 0/8] hw/mips/fuloong2e fixes Philippe Mathieu-Daudé
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