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From: Claudio Fontana <cfontana@suse.de>
To: "Alex Bennée" <alex.bennee@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Eduardo Habkost" <ehabkost@redhat.com>,
	"Peter Maydell" <peter.maydell@linaro.org>
Cc: Laurent Vivier <lvivier@redhat.com>,
	Thomas Huth <thuth@redhat.com>,
	qemu-devel@nongnu.org, Roman Bolshakov <r.bolshakov@yadro.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Claudio Fontana <cfontana@suse.de>
Subject: [PATCH v14 14/22] cpu: move debug_check_watchpoint to tcg_ops
Date: Thu, 28 Jan 2021 10:28:06 +0100
Message-ID: <20210128092814.8676-15-cfontana@suse.de> (raw)
In-Reply-To: <20210128092814.8676-1-cfontana@suse.de>

commit 568496c0c0f1 ("cpu: Add callback to check architectural") and
commit 3826121d9298 ("target-arm: Implement checking of fired")
introduced an ARM-specific hack for cpu_check_watchpoint.

Make debug_check_watchpoint optional, and move it to tcg_ops.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
---
 include/hw/core/cpu.h | 9 ++++++---
 accel/tcg/user-exec.c | 3 ++-
 hw/core/cpu.c         | 9 ---------
 softmmu/physmem.c     | 4 ++--
 target/arm/cpu.c      | 4 ++--
 5 files changed, 12 insertions(+), 17 deletions(-)

diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index d6c6d32865..406e8a8606 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -143,6 +143,12 @@ typedef struct TcgCpuOperations {
      */
     vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len);
 
+    /**
+     * @debug_check_watchpoint: return true if the architectural
+     * watchpoint whose address has matched should really fire, used by ARM
+     */
+    bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
+
 #endif /* CONFIG_SOFTMMU */
 #endif /* NEED_CPU_H */
 
@@ -183,8 +189,6 @@ typedef struct TcgCpuOperations {
  *       a memory access with the specified memory transaction attributes.
  * @gdb_read_register: Callback for letting GDB read a register.
  * @gdb_write_register: Callback for letting GDB write a register.
- * @debug_check_watchpoint: Callback: return true if the architectural
- *       watchpoint whose address has matched should really fire.
  * @write_elf64_note: Callback for writing a CPU-specific ELF note to a
  * 64-bit VM coredump.
  * @write_elf32_qemunote: Callback for writing a CPU- and QEMU-specific ELF
@@ -238,7 +242,6 @@ struct CPUClass {
     int (*asidx_from_attrs)(CPUState *cpu, MemTxAttrs attrs);
     int (*gdb_read_register)(CPUState *cpu, GByteArray *buf, int reg);
     int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
-    bool (*debug_check_watchpoint)(CPUState *cpu, CPUWatchpoint *wp);
 
     int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
                             int cpuid, void *opaque);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 5509dd53e9..9e6e188d19 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -187,7 +187,8 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
     clear_helper_retaddr();
 
     cc = CPU_GET_CLASS(cpu);
-    cc->tcg_ops.tlb_fill(cpu, address, 0, access_type, MMU_USER_IDX, false, pc);
+    cc->tcg_ops.tlb_fill(cpu, address, 0, access_type,
+                         MMU_USER_IDX, false, pc);
     g_assert_not_reached();
 }
 
diff --git a/hw/core/cpu.c b/hw/core/cpu.c
index 3d5bf9fe02..00330ba07d 100644
--- a/hw/core/cpu.c
+++ b/hw/core/cpu.c
@@ -186,14 +186,6 @@ static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
     return 0;
 }
 
-static bool cpu_common_debug_check_watchpoint(CPUState *cpu, CPUWatchpoint *wp)
-{
-    /* If no extra check is required, QEMU watchpoint match can be considered
-     * as an architectural match.
-     */
-    return true;
-}
-
 static bool cpu_common_virtio_is_big_endian(CPUState *cpu)
 {
     return target_words_bigendian();
@@ -415,7 +407,6 @@ static void cpu_class_init(ObjectClass *klass, void *data)
     k->gdb_read_register = cpu_common_gdb_read_register;
     k->gdb_write_register = cpu_common_gdb_write_register;
     k->virtio_is_big_endian = cpu_common_virtio_is_big_endian;
-    k->debug_check_watchpoint = cpu_common_debug_check_watchpoint;
     set_bit(DEVICE_CATEGORY_CPU, dc->categories);
     dc->realize = cpu_common_realizefn;
     dc->unrealize = cpu_common_unrealizefn;
diff --git a/softmmu/physmem.c b/softmmu/physmem.c
index c5cf9b839e..e85059f9c6 100644
--- a/softmmu/physmem.c
+++ b/softmmu/physmem.c
@@ -917,8 +917,8 @@ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len,
             wp->hitaddr = MAX(addr, wp->vaddr);
             wp->hitattrs = attrs;
             if (!cpu->watchpoint_hit) {
-                if (wp->flags & BP_CPU &&
-                    !cc->debug_check_watchpoint(cpu, wp)) {
+                if (wp->flags & BP_CPU && cc->tcg_ops.debug_check_watchpoint &&
+                    !cc->tcg_ops.debug_check_watchpoint(cpu, wp)) {
                     wp->flags &= ~BP_WATCHPOINT_HIT;
                     continue;
                 }
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 2a14431065..c9a66d3103 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2280,12 +2280,12 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
     cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb;
     cc->tcg_ops.tlb_fill = arm_cpu_tlb_fill;
     cc->tcg_ops.debug_excp_handler = arm_debug_excp_handler;
-    cc->debug_check_watchpoint = arm_debug_check_watchpoint;
 #if !defined(CONFIG_USER_ONLY)
+    cc->tcg_ops.do_interrupt = arm_cpu_do_interrupt;
     cc->tcg_ops.do_transaction_failed = arm_cpu_do_transaction_failed;
     cc->tcg_ops.do_unaligned_access = arm_cpu_do_unaligned_access;
     cc->tcg_ops.adjust_watchpoint_address = arm_adjust_watchpoint_address;
-    cc->tcg_ops.do_interrupt = arm_cpu_do_interrupt;
+    cc->tcg_ops.debug_check_watchpoint = arm_debug_check_watchpoint;
 #endif /* CONFIG_TCG && !CONFIG_USER_ONLY */
 #endif /* CONFIG_TCG */
 }
-- 
2.26.2



  parent reply index

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-28  9:27 [PATCH v14 00/22] i386 cleanup PART 2 Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 01/22] cpu: Introduce TCGCpuOperations struct Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 02/22] target/riscv: remove CONFIG_TCG, as it is always TCG Claudio Fontana
2021-01-28 18:34   ` Alex Bennée
2021-01-28  9:27 ` [PATCH v14 03/22] accel/tcg: split TCG-only code from cpu_exec_realizefn Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 04/22] cpu: Move synchronize_from_tb() to tcg_ops Claudio Fontana
2021-01-28 18:58   ` Alex Bennée
2021-01-28 23:01     ` Richard Henderson
2021-01-28  9:27 ` [PATCH v14 05/22] cpu: Move cpu_exec_* " Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 06/22] cpu: Move tlb_fill " Claudio Fontana
2021-01-28  9:27 ` [PATCH v14 07/22] cpu: Move debug_excp_handler " Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 08/22] target/arm: do not use cc->do_interrupt for KVM directly Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 09/22] cpu: move cc->do_interrupt to tcg_ops Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 10/22] cpu: move cc->transaction_failed " Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 11/22] cpu: move do_unaligned_access " Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 12/22] physmem: make watchpoint checking code TCG-only Claudio Fontana
2021-01-28 19:09   ` Alex Bennée
2021-01-28  9:28 ` [PATCH v14 13/22] cpu: move adjust_watchpoint_address to tcg_ops Claudio Fontana
2021-01-28  9:28 ` Claudio Fontana [this message]
2021-01-28  9:28 ` [PATCH v14 15/22] cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass Claudio Fontana
2021-01-29  0:31   ` Richard Henderson
2021-01-29  9:00     ` Claudio Fontana
2021-01-29 19:19       ` Richard Henderson
2021-01-29 19:36         ` Eduardo Habkost
2021-01-30  9:40           ` Claudio Fontana
2021-02-02 10:01     ` Claudio Fontana
2021-02-02 10:27       ` Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 16/22] accel: extend AccelState and AccelClass to user-mode Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 17/22] accel: replace struct CpusAccel with AccelOpsClass Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 18/22] accel: introduce AccelCPUClass extending CPUClass Claudio Fontana
2021-01-28 13:03   ` Philippe Mathieu-Daudé
2021-01-28 13:22     ` Claudio Fontana
2021-01-28 16:08       ` Alex Bennée
2021-01-28 16:29         ` Philippe Mathieu-Daudé
2021-01-29  0:13           ` Richard Henderson
2021-01-30 10:53             ` Claudio Fontana
2021-01-30 19:01               ` Richard Henderson
2021-02-01  9:15                 ` Alex Bennée
2021-02-01  9:22                   ` Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 19/22] i386: split cpu accelerators from cpu.c, using AccelCPUClass Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 20/22] cpu: call AccelCPUClass::cpu_realizefn in cpu_exec_realizefn Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 21/22] hw/core/cpu: call qemu_init_vcpu in cpu_common_realizefn Claudio Fontana
2021-01-28  9:28 ` [PATCH v14 22/22] accel: introduce new accessor functions Claudio Fontana
2021-01-29  0:22 ` [PATCH v14 00/22] i386 cleanup PART 2 Richard Henderson

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