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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 12/24] hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts
Date: Fri,  5 Feb 2021 17:00:07 +0000
Message-ID: <20210205170019.25319-13-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210205170019.25319-1-peter.maydell@linaro.org>

The mps2-tz code uses PPCPortInfo data structures to define what
devices are present and how they are wired up.  Currently we use
these to specify device types and addresses, but hard-code the
interrupt line wiring in each make_* helper function.  This works for
the two boards we have at the moment, but the AN524 has some devices
with different interrupt assignments.

This commit adds the framework to allow PPCPortInfo structures to
specify interrupt numbers.  We add an array of interrupt numbers to
the PPCPortInfo struct, and pass it through to the make_* helpers.
The following commit will change the make_* helpers over to using the
framework.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/mps2-tz.c | 36 ++++++++++++++++++++++++------------
 1 file changed, 24 insertions(+), 12 deletions(-)

diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 844092f4fd5..0c75b2230ed 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -170,7 +170,8 @@ static qemu_irq get_sse_irq_in(MPS2TZMachineState *mms, int irqno)
  * needs to be plugged into the downstream end of the PPC port.
  */
 typedef MemoryRegion *MakeDevFn(MPS2TZMachineState *mms, void *opaque,
-                                const char *name, hwaddr size);
+                                const char *name, hwaddr size,
+                                const int *irqs);
 
 typedef struct PPCPortInfo {
     const char *name;
@@ -178,6 +179,7 @@ typedef struct PPCPortInfo {
     void *opaque;
     hwaddr addr;
     hwaddr size;
+    int irqs[3]; /* currently no device needs more IRQ lines than this */
 } PPCPortInfo;
 
 typedef struct PPCInfo {
@@ -186,8 +188,9 @@ typedef struct PPCInfo {
 } PPCInfo;
 
 static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms,
-                                       void *opaque,
-                                       const char *name, hwaddr size)
+                                    void *opaque,
+                                    const char *name, hwaddr size,
+                                    const int *irqs)
 {
     /* Initialize, configure and realize a TYPE_UNIMPLEMENTED_DEVICE,
      * and return a pointer to its MemoryRegion.
@@ -202,7 +205,8 @@ static MemoryRegion *make_unimp_dev(MPS2TZMachineState *mms,
 }
 
 static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque,
-                               const char *name, hwaddr size)
+                               const char *name, hwaddr size,
+                               const int *irqs)
 {
     MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
     CMSDKAPBUART *uart = opaque;
@@ -227,7 +231,8 @@ static MemoryRegion *make_uart(MPS2TZMachineState *mms, void *opaque,
 }
 
 static MemoryRegion *make_scc(MPS2TZMachineState *mms, void *opaque,
-                              const char *name, hwaddr size)
+                              const char *name, hwaddr size,
+                              const int *irqs)
 {
     MPS2SCC *scc = opaque;
     DeviceState *sccdev;
@@ -249,7 +254,8 @@ static MemoryRegion *make_scc(MPS2TZMachineState *mms, void *opaque,
 }
 
 static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms, void *opaque,
-                                 const char *name, hwaddr size)
+                                 const char *name, hwaddr size,
+                                 const int *irqs)
 {
     MPS2FPGAIO *fpgaio = opaque;
     MPS2TZMachineClass *mmc = MPS2TZ_MACHINE_GET_CLASS(mms);
@@ -262,7 +268,8 @@ static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms, void *opaque,
 }
 
 static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque,
-                                  const char *name, hwaddr size)
+                                  const char *name, hwaddr size,
+                                  const int *irqs)
 {
     SysBusDevice *s;
     NICInfo *nd = &nd_table[0];
@@ -281,7 +288,8 @@ static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque,
 }
 
 static MemoryRegion *make_mpc(MPS2TZMachineState *mms, void *opaque,
-                              const char *name, hwaddr size)
+                              const char *name, hwaddr size,
+                              const int *irqs)
 {
     TZMPC *mpc = opaque;
     int i = mpc - &mms->ssram_mpc[0];
@@ -318,7 +326,8 @@ static MemoryRegion *make_mpc(MPS2TZMachineState *mms, void *opaque,
 }
 
 static MemoryRegion *make_dma(MPS2TZMachineState *mms, void *opaque,
-                              const char *name, hwaddr size)
+                              const char *name, hwaddr size,
+                              const int *irqs)
 {
     PL080State *dma = opaque;
     int i = dma - &mms->dma[0];
@@ -373,7 +382,8 @@ static MemoryRegion *make_dma(MPS2TZMachineState *mms, void *opaque,
 }
 
 static MemoryRegion *make_spi(MPS2TZMachineState *mms, void *opaque,
-                              const char *name, hwaddr size)
+                              const char *name, hwaddr size,
+                              const int *irqs)
 {
     /*
      * The AN505 has five PL022 SPI controllers.
@@ -395,7 +405,8 @@ static MemoryRegion *make_spi(MPS2TZMachineState *mms, void *opaque,
 }
 
 static MemoryRegion *make_i2c(MPS2TZMachineState *mms, void *opaque,
-                              const char *name, hwaddr size)
+                              const char *name, hwaddr size,
+                              const int *irqs)
 {
     ArmSbconI2CState *i2c = opaque;
     SysBusDevice *s;
@@ -604,7 +615,8 @@ static void mps2tz_common_init(MachineState *machine)
                 continue;
             }
 
-            mr = pinfo->devfn(mms, pinfo->opaque, pinfo->name, pinfo->size);
+            mr = pinfo->devfn(mms, pinfo->opaque, pinfo->name, pinfo->size,
+                              pinfo->irqs);
             portname = g_strdup_printf("port[%d]", port);
             object_property_set_link(OBJECT(ppc), portname, OBJECT(mr),
                                      &error_fatal);
-- 
2.20.1



  parent reply index

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-05 16:59 [PATCH 00/24] hw/arm: New board model mps3-an524 Peter Maydell
2021-02-05 16:59 ` [PATCH 01/24] hw/arm/mps2-tz: Make SYSCLK frequency board-specific Peter Maydell
2021-02-05 18:13   ` Philippe Mathieu-Daudé
2021-02-05 16:59 ` [PATCH 02/24] hw/misc/mps2-scc: Support configurable number of OSCCLK values Peter Maydell
2021-02-12 18:11   ` Philippe Mathieu-Daudé
2021-02-05 16:59 ` [PATCH 03/24] hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511 Peter Maydell
2021-02-12 18:12   ` Philippe Mathieu-Daudé
2021-02-05 16:59 ` [PATCH 04/24] hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board Peter Maydell
2021-02-12 18:12   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 05/24] hw/misc/mps2-fpgaio: Make number of LEDs configurable by board Peter Maydell
2021-02-12 18:19   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 06/24] hw/misc/mps2-fpgaio: Support SWITCH register Peter Maydell
2021-02-12 13:45   ` Peter Maydell
2021-02-12 13:51     ` Philippe Mathieu-Daudé
2021-02-12 14:03       ` Peter Maydell
2021-02-12 18:23   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 07/24] hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board Peter Maydell
2021-02-12 13:51   ` Peter Maydell
2021-02-12 18:24     ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 08/24] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type Peter Maydell
2021-02-12 18:25   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 09/24] hw/arm/mps2-tz: Make number of IRQs board-specific Peter Maydell
2021-02-12 18:26   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 10/24] hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524 Peter Maydell
2021-02-05 17:00 ` [PATCH 11/24] hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI Peter Maydell
2021-02-05 17:00 ` Peter Maydell [this message]
2021-02-05 17:00 ` [PATCH 13/24] hw/arm/mps2-tz: Move device IRQ info to data structures Peter Maydell
2021-02-05 17:00 ` [PATCH 14/24] hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs Peter Maydell
2021-02-05 17:00 ` [PATCH 15/24] hw/arm/mps2-tz: Allow boards to have different PPCInfo data Peter Maydell
2021-02-05 17:00 ` [PATCH 16/24] hw/arm/mps2-tz: Make RAM arrangement board-specific Peter Maydell
2021-02-05 17:00 ` [PATCH 17/24] hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data Peter Maydell
2021-02-05 17:00 ` [PATCH 18/24] hw/arm/mps2-tz: Support ROMs as well as RAMs Peter Maydell
2021-02-05 17:00 ` [PATCH 19/24] hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo Peter Maydell
2021-02-12 18:30   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 20/24] hw/arm/mps2-tz: Add new mps3-an524 board Peter Maydell
2021-02-12 11:19   ` Peter Maydell
2021-02-12 14:51   ` Peter Maydell
2021-02-05 17:00 ` [PATCH 21/24] hw/arm/mps2-tz: Stub out USB controller for mps3-an524 Peter Maydell
2021-02-12 18:34   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 22/24] hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524 Peter Maydell
2021-02-12 18:35   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 23/24] docs/system/arm/mps2.rst: Document the new mps3-an524 board Peter Maydell
2021-02-12 18:36   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 24/24] hw/arm/mps2: Update old infocenter.arm.com URLs Peter Maydell
2021-02-12 18:37   ` Philippe Mathieu-Daudé
2021-02-05 18:05 ` [PATCH 00/24] hw/arm: New board model mps3-an524 Philippe Mathieu-Daudé
2021-02-05 19:20   ` Peter Maydell
2021-02-05 19:31     ` Philippe Mathieu-Daudé
2021-02-05 19:34       ` Peter Maydell
2021-02-12 18:38         ` Philippe Mathieu-Daudé
2021-02-05 18:27 ` no-reply

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