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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 14/24] hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs
Date: Fri,  5 Feb 2021 17:00:09 +0000	[thread overview]
Message-ID: <20210205170019.25319-15-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210205170019.25319-1-peter.maydell@linaro.org>

We create an OR gate to wire together the overflow IRQs for all the
UARTs on the board; this has to have twice the number of inputs as
there are UARTs, since each UART feeds it a TX overflow and an RX
overflow interrupt line.  Replace the hardcoded '10' with a
calculation based on the size of the uart[] array in the
MPS2TZMachineState.  (We rely on OR gate inputs that are never wired
up or asserted being treated as always-zero.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/mps2-tz.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 07694413005..87993516816 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -516,13 +516,18 @@ static void mps2tz_common_init(MachineState *machine)
      */
     memory_region_add_subregion(system_memory, 0x80000000, machine->ram);
 
-    /* The overflow IRQs for all UARTs are ORed together.
+    /*
+     * The overflow IRQs for all UARTs are ORed together.
      * Tx, Rx and "combined" IRQs are sent to the NVIC separately.
-     * Create the OR gate for this.
+     * Create the OR gate for this: it has one input for the TX overflow
+     * and one for the RX overflow for each UART we might have.
+     * (If the board has fewer than the maximum possible number of UARTs
+     * those inputs are never wired up and are treated as always-zero.)
      */
     object_initialize_child(OBJECT(mms), "uart-irq-orgate",
                             &mms->uart_irq_orgate, TYPE_OR_IRQ);
-    object_property_set_int(OBJECT(&mms->uart_irq_orgate), "num-lines", 10,
+    object_property_set_int(OBJECT(&mms->uart_irq_orgate), "num-lines",
+                            2 * ARRAY_SIZE(mms->uart),
                             &error_fatal);
     qdev_realize(DEVICE(&mms->uart_irq_orgate), NULL, &error_fatal);
     qdev_connect_gpio_out(DEVICE(&mms->uart_irq_orgate), 0,
-- 
2.20.1



  parent reply	other threads:[~2021-02-05 17:59 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-05 16:59 [PATCH 00/24] hw/arm: New board model mps3-an524 Peter Maydell
2021-02-05 16:59 ` [PATCH 01/24] hw/arm/mps2-tz: Make SYSCLK frequency board-specific Peter Maydell
2021-02-05 18:13   ` Philippe Mathieu-Daudé
2021-02-05 16:59 ` [PATCH 02/24] hw/misc/mps2-scc: Support configurable number of OSCCLK values Peter Maydell
2021-02-12 18:11   ` Philippe Mathieu-Daudé
2021-02-05 16:59 ` [PATCH 03/24] hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511 Peter Maydell
2021-02-12 18:12   ` Philippe Mathieu-Daudé
2021-02-05 16:59 ` [PATCH 04/24] hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board Peter Maydell
2021-02-12 18:12   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 05/24] hw/misc/mps2-fpgaio: Make number of LEDs configurable by board Peter Maydell
2021-02-12 18:19   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 06/24] hw/misc/mps2-fpgaio: Support SWITCH register Peter Maydell
2021-02-12 13:45   ` Peter Maydell
2021-02-12 13:51     ` Philippe Mathieu-Daudé
2021-02-12 14:03       ` Peter Maydell
2021-02-12 18:23   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 07/24] hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board Peter Maydell
2021-02-12 13:51   ` Peter Maydell
2021-02-12 18:24     ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 08/24] hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type Peter Maydell
2021-02-12 18:25   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 09/24] hw/arm/mps2-tz: Make number of IRQs board-specific Peter Maydell
2021-02-12 18:26   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 10/24] hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524 Peter Maydell
2021-02-05 17:00 ` [PATCH 11/24] hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI Peter Maydell
2021-02-05 17:00 ` [PATCH 12/24] hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts Peter Maydell
2021-02-05 17:00 ` [PATCH 13/24] hw/arm/mps2-tz: Move device IRQ info to data structures Peter Maydell
2021-02-05 17:00 ` Peter Maydell [this message]
2021-02-05 17:00 ` [PATCH 15/24] hw/arm/mps2-tz: Allow boards to have different PPCInfo data Peter Maydell
2021-02-05 17:00 ` [PATCH 16/24] hw/arm/mps2-tz: Make RAM arrangement board-specific Peter Maydell
2021-02-05 17:00 ` [PATCH 17/24] hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data Peter Maydell
2021-02-05 17:00 ` [PATCH 18/24] hw/arm/mps2-tz: Support ROMs as well as RAMs Peter Maydell
2021-02-05 17:00 ` [PATCH 19/24] hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo Peter Maydell
2021-02-12 18:30   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 20/24] hw/arm/mps2-tz: Add new mps3-an524 board Peter Maydell
2021-02-12 11:19   ` Peter Maydell
2021-02-12 14:51   ` Peter Maydell
2021-02-05 17:00 ` [PATCH 21/24] hw/arm/mps2-tz: Stub out USB controller for mps3-an524 Peter Maydell
2021-02-12 18:34   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 22/24] hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524 Peter Maydell
2021-02-12 18:35   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 23/24] docs/system/arm/mps2.rst: Document the new mps3-an524 board Peter Maydell
2021-02-12 18:36   ` Philippe Mathieu-Daudé
2021-02-05 17:00 ` [PATCH 24/24] hw/arm/mps2: Update old infocenter.arm.com URLs Peter Maydell
2021-02-12 18:37   ` Philippe Mathieu-Daudé
2021-02-05 18:05 ` [PATCH 00/24] hw/arm: New board model mps3-an524 Philippe Mathieu-Daudé
2021-02-05 19:20   ` Peter Maydell
2021-02-05 19:31     ` Philippe Mathieu-Daudé
2021-02-05 19:34       ` Peter Maydell
2021-02-12 18:38         ` Philippe Mathieu-Daudé
2021-02-05 18:27 ` no-reply

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