From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>,
"Edgar E . Iglesias" <edgar.iglesias@gmail.com>,
Peter Maydell <peter.maydell@linaro.org>
Cc: Bin Meng <bin.meng@windriver.com>,
Francisco Iglesias <francisco.iglesias@xilinx.com>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org,
Xuzhou Cheng <xuzhou.cheng@windriver.com>
Subject: [PATCH v4 2/5] hw/arm: xlnx-zynqmp: Clean up coding convention issues
Date: Mon, 22 Feb 2021 21:05:11 +0800 [thread overview]
Message-ID: <20210222130514.2167-3-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210222130514.2167-1-bmeng.cn@gmail.com>
From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
There are some coding convention warnings in xlnx-zynqmp.c and
xlnx-zynqmp.h, as reported by:
$ ./scripts/checkpatch.pl include/hw/arm/xlnx-zynqmp.h
$ ./scripts/checkpatch.pl hw/arm/xlnx-zynqmp.c
Let's clean them up.
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
---
Changes in v4:
- remove one change that is not a checkpatch warning
include/hw/arm/xlnx-zynqmp.h | 3 ++-
hw/arm/xlnx-zynqmp.c | 9 ++++++---
2 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index 6f45387a17..be15cc8814 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -60,7 +60,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
#define XLNX_ZYNQMP_GIC_REGIONS 6
-/* ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k offsets
+/*
+ * ZynqMP maps the ARM GIC regions (GICC, GICD ...) at consecutive 64k offsets
* and under-decodes the 64k region. This mirrors the 4k regions to every 4k
* aligned address in the 64k region. To implement each GIC region needs a
* number of memory region aliases.
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 881847255b..49465a2794 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -301,11 +301,13 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
ram_size = memory_region_size(s->ddr_ram);
- /* Create the DDR Memory Regions. User friendly checks should happen at
+ /*
+ * Create the DDR Memory Regions. User friendly checks should happen at
* the board level
*/
if (ram_size > XLNX_ZYNQMP_MAX_LOW_RAM_SIZE) {
- /* The RAM size is above the maximum available for the low DDR.
+ /*
+ * The RAM size is above the maximum available for the low DDR.
* Create the high DDR memory region as well.
*/
assert(ram_size <= XLNX_ZYNQMP_MAX_RAM_SIZE);
@@ -526,7 +528,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
SysBusDevice *sbd = SYS_BUS_DEVICE(&s->sdhci[i]);
Object *sdhci = OBJECT(&s->sdhci[i]);
- /* Compatible with:
+ /*
+ * Compatible with:
* - SD Host Controller Specification Version 3.00
* - SDIO Specification Version 3.0
* - eMMC Specification Version 4.51
--
2.25.1
next prev parent reply other threads:[~2021-02-22 13:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-22 13:05 [PATCH v4 0/5] hw/arm: zynqmp: Implement a CSU DMA model and connect it with GQSPI Bin Meng
2021-02-22 13:05 ` [PATCH v4 1/5] hw/dma: xlnx_csu_dma: Implement a Xilinx CSU DMA model Bin Meng
2021-02-23 9:21 ` Edgar E. Iglesias
2021-02-23 9:23 ` Bin Meng
2021-02-23 9:33 ` Edgar E. Iglesias
2021-02-22 13:05 ` Bin Meng [this message]
2021-02-23 8:58 ` [PATCH v4 2/5] hw/arm: xlnx-zynqmp: Clean up coding convention issues Edgar E. Iglesias
2021-02-22 13:05 ` [PATCH v4 3/5] hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI Bin Meng
2021-02-23 9:01 ` Edgar E. Iglesias
2021-02-23 9:20 ` Bin Meng
2021-02-23 9:23 ` Edgar E. Iglesias
2021-02-22 13:05 ` [PATCH v4 4/5] hw/ssi: xilinx_spips: Clean up coding convention issues Bin Meng
2021-02-22 13:05 ` [PATCH v4 5/5] hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips Bin Meng
2021-02-23 9:02 ` Edgar E. Iglesias
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