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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Thomas Huth" <thuth@redhat.com>,
	qemu-riscv@nongnu.org, "Eduardo Habkost" <ehabkost@redhat.com>,
	"David Hildenbrand" <david@redhat.com>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Cornelia Huck" <cohuck@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Laurent Vivier" <laurent@vivier.eu>,
	"Greg Kurz" <groug@kaod.org>,
	qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org,
	"Claudio Fontana" <cfontana@suse.de>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"David Gibson" <david@gibson.dropbear.id.au>
Subject: [RFC PATCH v2 8/8] target/arm: Restrict arm_cpu_has_work() to TCG
Date: Thu,  4 Mar 2021 23:23:23 +0100
Message-ID: <20210304222323.1954755-9-f4bug@amsat.org> (raw)
In-Reply-To: <20210304222323.1954755-1-f4bug@amsat.org>

arm_cpu_has_work() is only used from TCG.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/arm/internals.h | 2 +-
 target/arm/cpu.c       | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/arm/internals.h b/target/arm/internals.h
index 1930be08828..db81db9bf57 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -172,8 +172,8 @@ static inline int r14_bank_number(int mode)
 void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu);
 void arm_translate_init(void);
 
-bool arm_cpu_has_work(CPUState *cs);
 #ifdef CONFIG_TCG
+bool arm_cpu_has_work(CPUState *cs);
 void arm_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
 #endif /* CONFIG_TCG */
 
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 7181deee84a..02db969c00f 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -74,7 +74,6 @@ void arm_cpu_synchronize_from_tb(CPUState *cs,
         env->regs[15] = tb->pc;
     }
 }
-#endif /* CONFIG_TCG */
 
 bool arm_cpu_has_work(CPUState *cs)
 {
@@ -86,6 +85,7 @@ bool arm_cpu_has_work(CPUState *cs)
          | CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ
          | CPU_INTERRUPT_EXITTB);
 }
+#endif /* CONFIG_TCG */
 
 void arm_register_pre_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
                                  void *opaque)
-- 
2.26.2



  parent reply index

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-04 22:23 [RFC PATCH v2 0/8] cpu: Move CPUClass::has_work() to TCGCPUOps Philippe Mathieu-Daudé
2021-03-04 22:23 ` [RFC PATCH v2 1/8] sysemu/tcg: Restrict tcg_exec_init() to CONFIG_TCG Philippe Mathieu-Daudé
2021-03-08 13:40   ` David Hildenbrand
2021-03-08 14:50     ` Claudio Fontana
2021-03-04 22:23 ` [RFC PATCH v2 2/8] sysemu/tcg: Restrict qemu_tcg_mttcg_enabled() to TCG Philippe Mathieu-Daudé
2021-03-08 14:52   ` Claudio Fontana
2021-03-04 22:23 ` [RFC PATCH v2 3/8] target/arm: Directly use arm_cpu_has_work instead of CPUClass::has_work Philippe Mathieu-Daudé
2021-03-08 14:53   ` Claudio Fontana
2021-03-04 22:23 ` [RFC PATCH v2 4/8] target/s390x: Move s390_cpu_has_work to excp_helper.c Philippe Mathieu-Daudé
2021-03-04 22:23 ` [RFC PATCH v2 5/8] target/ppc: Duplicate the TCGCPUOps structure for POWER CPUs Philippe Mathieu-Daudé
2021-03-05  1:05   ` David Gibson
2021-03-04 22:23 ` [RFC PATCH v2 6/8] cpu: Declare cpu_has_work() in 'sysemu/tcg.h' Philippe Mathieu-Daudé
2021-03-08 12:13   ` Claudio Fontana
2021-03-08 12:17   ` Claudio Fontana
2021-03-08 13:37     ` Philippe Mathieu-Daudé
2021-03-04 22:23 ` [RFC PATCH v2 7/8] cpu: Move CPUClass::has_work() to TCGCPUOps Philippe Mathieu-Daudé
2021-03-05  1:05   ` David Gibson
2021-03-04 22:23 ` Philippe Mathieu-Daudé [this message]
2021-03-13 23:55 ` [RFC PATCH v2 0/8] " Philippe Mathieu-Daudé

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