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From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
To: qemu-devel@nongnu.org
Cc: kbastian@mail.uni-paderborn.de,
	Richard Henderson <richard.henderson@linaro.org>
Subject: [PULL 6/7] target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 == r2
Date: Sun, 14 Mar 2021 14:55:12 +0100
Message-ID: <20210314135513.1369871-7-kbastian@mail.uni-paderborn.de> (raw)
In-Reply-To: <20210314135513.1369871-1-kbastian@mail.uni-paderborn.de>

if r3+1 and r2 are the same then we would overwrite r2 with our first
move and use the wrong result for the shift. Thus we store the result
from the mov in a temp.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
---
 target/tricore/translate.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/target/tricore/translate.c b/target/tricore/translate.c
index ebeddf8f4a..5b7ed70e39 100644
--- a/target/tricore/translate.c
+++ b/target/tricore/translate.c
@@ -6989,6 +6989,7 @@ static void decode_rrpw_extract_insert(DisasContext *ctx)
     uint32_t op2;
     int r1, r2, r3;
     int32_t pos, width;
+    TCGv temp;
 
     op2 = MASK_OP_RRPW_OP2(ctx->opcode);
     r1 = MASK_OP_RRPW_S1(ctx->opcode);
@@ -7021,10 +7022,15 @@ static void decode_rrpw_extract_insert(DisasContext *ctx)
         break;
     case OPC2_32_RRPW_IMASK:
         CHECK_REG_PAIR(r3);
+
         if (pos + width <= 32) {
-            tcg_gen_movi_tl(cpu_gpr_d[r3+1], ((1u << width) - 1) << pos);
+            temp = tcg_temp_new();
+            tcg_gen_movi_tl(temp, ((1u << width) - 1) << pos);
             tcg_gen_shli_tl(cpu_gpr_d[r3], cpu_gpr_d[r2], pos);
+            tcg_gen_mov_tl(cpu_gpr_d[r3 + 1], temp);
+            tcg_temp_free(temp);
         }
+
         break;
     case OPC2_32_RRPW_INSERT:
         if (pos + width <= 32) {
-- 
2.30.1



  parent reply index

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-14 13:55 [PULL 0/7] tricore queue Bastian Koppelmann
2021-03-14 13:55 ` [PULL 1/7] tricore: added triboard with tc27x_soc Bastian Koppelmann
2021-03-14 13:55 ` [PULL 2/7] target/tricore: Replace magic value by MMU_DATA_LOAD definition Bastian Koppelmann
2021-03-14 13:55 ` [PULL 3/7] target/tricore: Pass MMUAccessType to get_physical_address() Bastian Koppelmann
2021-03-14 13:55 ` [PULL 4/7] target/tricore: Remove unused definitions Bastian Koppelmann
2021-03-14 13:55 ` [PULL 5/7] tricore: fixed faulty conditions for extr and imask Bastian Koppelmann
2021-03-14 13:55 ` Bastian Koppelmann [this message]
2021-03-14 13:55 ` [PULL 7/7] target/tricore: Fix OPC2_32_RRPW_EXTR for width=0 Bastian Koppelmann
2021-03-15 16:53 ` [PULL 0/7] tricore queue Peter Maydell

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