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* [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address
@ 2021-02-17 12:19 iNvEr7
  2021-02-17 14:50 ` [Bug 1915925] " Peter Maydell
                   ` (7 more replies)
  0 siblings, 8 replies; 149+ messages in thread
From: iNvEr7 @ 2021-02-17 12:19 UTC (permalink / raw)
  To: qemu-devel

Public bug reported:

This affects latest development branch of QEMU.

According to the ARM spec of the HEAPINFO semihosting call:

https://developer.arm.com/documentation/100863/0300/Semihosting-
operations/SYS-HEAPINFO--0x16-?lang=en

> the PARAMETER REGISTER contains the address of a pointer to a four-
field data block.

However, QEMU treated the PARAMETER REGISTER as pointing to a four-field
data block directly.

Here is a simple program that can demonstrate this problem:
https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-newlib

This code links with newlib with semihosting mode, which will call the
HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
may crash the program either because of invalid write or memory
curruption, depending on the compiled program structure.

Also refer to my discussion with newlib folks:
https://sourceware.org/pipermail/newlib/2021/018260.html

** Affects: qemu
     Importance: Undecided
         Status: New


** Tags: semihosting

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https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  New

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address
  2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
@ 2021-02-17 14:50 ` Peter Maydell
  2021-02-17 15:03 ` Peter Maydell
                   ` (6 subsequent siblings)
  7 siblings, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-02-17 14:50 UTC (permalink / raw)
  To: qemu-devel

Broken in commit 3c37cfe0b1e8a49, I think.

-- 
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https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  New

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address
  2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
  2021-02-17 14:50 ` [Bug 1915925] " Peter Maydell
@ 2021-02-17 15:03 ` Peter Maydell
  2021-02-17 16:13 ` Philippe Mathieu-Daudé
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-02-17 15:03 UTC (permalink / raw)
  To: qemu-devel

** Changed in: qemu
       Status: New => Confirmed

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address
  2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
  2021-02-17 14:50 ` [Bug 1915925] " Peter Maydell
  2021-02-17 15:03 ` Peter Maydell
@ 2021-02-17 16:13 ` Philippe Mathieu-Daudé
  2021-03-05 13:33 ` Alex Bennée
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 149+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-02-17 16:13 UTC (permalink / raw)
  To: qemu-devel

** Tags added: testcase

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address
  2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
                   ` (2 preceding siblings ...)
  2021-02-17 16:13 ` Philippe Mathieu-Daudé
@ 2021-03-05 13:33 ` Alex Bennée
  2021-03-09 17:21 ` [Bug 1915925] [PATCH v3 3/4] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
                   ` (3 subsequent siblings)
  7 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-05 13:33 UTC (permalink / raw)
  To: qemu-devel

** Changed in: qemu
     Assignee: (unassigned) => Alex Bennée (ajbennee)

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH  v1 0/3] semihosting/next (move from hw, heapinfo)
@ 2021-03-05 13:54 Alex Bennée
  2021-03-05 13:54 ` [PATCH v1 1/3] semihosting: Move include/hw/semihosting/ -> include/semihosting/ Alex Bennée
                   ` (2 more replies)
  0 siblings, 3 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-05 13:54 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée

Hi,

Not much in this series apart from moving semihosting out of hw (where
it sat a bit weirdly) and an attempt at fixing a bug in the
SYS_HEAPINFO code. It works AFAICT but still seems a little fugly to
me. See:

 - semihosting/arg-compat: fix up handling of SYS_HEAPINFO

Alex Bennée (1):
  semihosting/arg-compat: fix up handling of SYS_HEAPINFO

Philippe Mathieu-Daudé (2):
  semihosting: Move include/hw/semihosting/ -> include/semihosting/
  semihosting: Move hw/semihosting/ -> semihosting/

 meson.build                                   |   1 +
 include/{hw => }/semihosting/console.h        |   0
 include/{hw => }/semihosting/semihost.h       |   0
 {hw/semihosting => semihosting}/common-semi.h |   0
 tests/tcg/arm/semicall.h                      |   1 +
 gdbstub.c                                     |   2 +-
 hw/mips/malta.c                               |   2 +-
 linux-user/aarch64/cpu_loop.c                 |   2 +-
 linux-user/arm/cpu_loop.c                     |   2 +-
 linux-user/riscv/cpu_loop.c                   |   2 +-
 linux-user/semihost.c                         |   2 +-
 .../arm-compat-semi.c                         | 135 ++++++++++--------
 {hw/semihosting => semihosting}/config.c      |   2 +-
 {hw/semihosting => semihosting}/console.c     |   4 +-
 softmmu/vl.c                                  |   2 +-
 stubs/semihost.c                              |   2 +-
 target/arm/helper.c                           |   4 +-
 target/arm/m_helper.c                         |   4 +-
 target/arm/translate-a64.c                    |   2 +-
 target/arm/translate.c                        |   2 +-
 target/lm32/helper.c                          |   2 +-
 target/m68k/op_helper.c                       |   2 +-
 target/mips/cpu.c                             |   2 +-
 target/mips/mips-semi.c                       |   4 +-
 target/mips/translate.c                       |   2 +-
 target/nios2/helper.c                         |   2 +-
 target/riscv/cpu_helper.c                     |   2 +-
 target/unicore32/helper.c                     |   2 +-
 target/xtensa/translate.c                     |   2 +-
 target/xtensa/xtensa-semi.c                   |   2 +-
 tests/tcg/arm/semihosting.c                   |  34 ++++-
 Kconfig                                       |   1 +
 MAINTAINERS                                   |   4 +-
 hw/Kconfig                                    |   1 -
 hw/meson.build                                |   1 -
 {hw/semihosting => semihosting}/Kconfig       |   0
 {hw/semihosting => semihosting}/meson.build   |   0
 37 files changed, 142 insertions(+), 92 deletions(-)
 rename include/{hw => }/semihosting/console.h (100%)
 rename include/{hw => }/semihosting/semihost.h (100%)
 rename {hw/semihosting => semihosting}/common-semi.h (100%)
 rename {hw/semihosting => semihosting}/arm-compat-semi.c (94%)
 rename {hw/semihosting => semihosting}/config.c (99%)
 rename {hw/semihosting => semihosting}/console.c (98%)
 rename {hw/semihosting => semihosting}/Kconfig (100%)
 rename {hw/semihosting => semihosting}/meson.build (100%)

-- 
2.20.1



^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH v1 1/3] semihosting: Move include/hw/semihosting/ -> include/semihosting/
  2021-03-05 13:54 [PATCH v1 0/3] semihosting/next (move from hw, heapinfo) Alex Bennée
@ 2021-03-05 13:54 ` Alex Bennée
  2021-03-05 13:54 ` [PATCH v1 2/3] semihosting: Move hw/semihosting/ -> semihosting/ Alex Bennée
  2021-03-05 13:54 ` [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO Alex Bennée
  2 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-05 13:54 UTC (permalink / raw)
  To: qemu-devel
  Cc: Marek Vasut, Peter Maydell, Aleksandar Rikalo,
	open list:RISC-V TCG CPUs, Sagar Karandikar, Alex Bennée,
	Chris Wulff, Philippe Mathieu-Daudé,
	Laurent Vivier, Max Filippov, Michael Walle,
	open list:ARM TCG CPUs, Palmer Dabbelt, Bastian Koppelmann,
	Paolo Bonzini, Alistair Francis, Guan Xuetao,
	Philippe Mathieu-Daudé,
	Aurelien Jarno

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

We want to move the semihosting code out of hw/ in the next patch.

This patch contains the mechanical steps, created using:

  $ git mv include/hw/semihosting/ include/
  $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting)

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210226131356.3964782-2-f4bug@amsat.org>
---
 include/{hw => }/semihosting/console.h  | 0
 include/{hw => }/semihosting/semihost.h | 0
 gdbstub.c                               | 2 +-
 hw/mips/malta.c                         | 2 +-
 hw/semihosting/arm-compat-semi.c        | 6 +++---
 hw/semihosting/config.c                 | 2 +-
 hw/semihosting/console.c                | 4 ++--
 linux-user/aarch64/cpu_loop.c           | 2 +-
 linux-user/arm/cpu_loop.c               | 2 +-
 linux-user/riscv/cpu_loop.c             | 2 +-
 linux-user/semihost.c                   | 2 +-
 softmmu/vl.c                            | 2 +-
 stubs/semihost.c                        | 2 +-
 target/arm/helper.c                     | 4 ++--
 target/arm/m_helper.c                   | 4 ++--
 target/arm/translate-a64.c              | 2 +-
 target/arm/translate.c                  | 2 +-
 target/lm32/helper.c                    | 2 +-
 target/m68k/op_helper.c                 | 2 +-
 target/mips/cpu.c                       | 2 +-
 target/mips/mips-semi.c                 | 4 ++--
 target/mips/translate.c                 | 2 +-
 target/nios2/helper.c                   | 2 +-
 target/riscv/cpu_helper.c               | 2 +-
 target/unicore32/helper.c               | 2 +-
 target/xtensa/translate.c               | 2 +-
 target/xtensa/xtensa-semi.c             | 2 +-
 MAINTAINERS                             | 2 +-
 28 files changed, 32 insertions(+), 32 deletions(-)
 rename include/{hw => }/semihosting/console.h (100%)
 rename include/{hw => }/semihosting/semihost.h (100%)

diff --git a/include/hw/semihosting/console.h b/include/semihosting/console.h
similarity index 100%
rename from include/hw/semihosting/console.h
rename to include/semihosting/console.h
diff --git a/include/hw/semihosting/semihost.h b/include/semihosting/semihost.h
similarity index 100%
rename from include/hw/semihosting/semihost.h
rename to include/semihosting/semihost.h
diff --git a/gdbstub.c b/gdbstub.c
index 3ee40479b6..e51e33cc70 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -49,7 +49,7 @@
 #include "sysemu/hw_accel.h"
 #include "sysemu/kvm.h"
 #include "sysemu/runstate.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "exec/exec-all.h"
 #include "sysemu/replay.h"
 
diff --git a/hw/mips/malta.c b/hw/mips/malta.c
index 9afc0b427b..26e7b1bd9f 100644
--- a/hw/mips/malta.c
+++ b/hw/mips/malta.c
@@ -58,7 +58,7 @@
 #include "qemu/error-report.h"
 #include "hw/misc/empty_slot.h"
 #include "sysemu/kvm.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "hw/mips/cps.h"
 #include "hw/qdev-clock.h"
 
diff --git a/hw/semihosting/arm-compat-semi.c b/hw/semihosting/arm-compat-semi.c
index 23c6e3edcb..94950b6c56 100644
--- a/hw/semihosting/arm-compat-semi.c
+++ b/hw/semihosting/arm-compat-semi.c
@@ -34,9 +34,9 @@
 #include "qemu/osdep.h"
 
 #include "cpu.h"
-#include "hw/semihosting/semihost.h"
-#include "hw/semihosting/console.h"
-#include "hw/semihosting/common-semi.h"
+#include "semihosting/semihost.h"
+#include "semihosting/console.h"
+#include "semihosting/common-semi.h"
 #include "qemu/log.h"
 #include "qemu/timer.h"
 #ifdef CONFIG_USER_ONLY
diff --git a/hw/semihosting/config.c b/hw/semihosting/config.c
index 9807f10cb0..3548e0f627 100644
--- a/hw/semihosting/config.c
+++ b/hw/semihosting/config.c
@@ -22,7 +22,7 @@
 #include "qemu/option.h"
 #include "qemu/config-file.h"
 #include "qemu/error-report.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "chardev/char.h"
 #include "sysemu/sysemu.h"
 
diff --git a/hw/semihosting/console.c b/hw/semihosting/console.c
index 9b4fee9260..c9ebd6fdd0 100644
--- a/hw/semihosting/console.c
+++ b/hw/semihosting/console.c
@@ -17,8 +17,8 @@
 
 #include "qemu/osdep.h"
 #include "cpu.h"
-#include "hw/semihosting/semihost.h"
-#include "hw/semihosting/console.h"
+#include "semihosting/semihost.h"
+#include "semihosting/console.h"
 #include "exec/gdbstub.h"
 #include "exec/exec-all.h"
 #include "qemu/log.h"
diff --git a/linux-user/aarch64/cpu_loop.c b/linux-user/aarch64/cpu_loop.c
index 7c42f65706..ee72a1c20f 100644
--- a/linux-user/aarch64/cpu_loop.c
+++ b/linux-user/aarch64/cpu_loop.c
@@ -22,7 +22,7 @@
 #include "qemu.h"
 #include "cpu_loop-common.h"
 #include "qemu/guest-random.h"
-#include "hw/semihosting/common-semi.h"
+#include "semihosting/common-semi.h"
 #include "target/arm/syndrome.h"
 
 #define get_user_code_u32(x, gaddr, env)                \
diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c
index cadfb7fa43..989d03cd89 100644
--- a/linux-user/arm/cpu_loop.c
+++ b/linux-user/arm/cpu_loop.c
@@ -22,7 +22,7 @@
 #include "qemu.h"
 #include "elf.h"
 #include "cpu_loop-common.h"
-#include "hw/semihosting/common-semi.h"
+#include "semihosting/common-semi.h"
 
 #define get_user_code_u32(x, gaddr, env)                \
     ({ abi_long __r = get_user_u32((x), (gaddr));       \
diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c
index 9665dabb09..6767f941e8 100644
--- a/linux-user/riscv/cpu_loop.c
+++ b/linux-user/riscv/cpu_loop.c
@@ -23,7 +23,7 @@
 #include "qemu.h"
 #include "cpu_loop-common.h"
 #include "elf.h"
-#include "hw/semihosting/common-semi.h"
+#include "semihosting/common-semi.h"
 
 void cpu_loop(CPURISCVState *env)
 {
diff --git a/linux-user/semihost.c b/linux-user/semihost.c
index c0015ee7f6..82013b8b48 100644
--- a/linux-user/semihost.c
+++ b/linux-user/semihost.c
@@ -12,7 +12,7 @@
 
 #include "qemu/osdep.h"
 #include "cpu.h"
-#include "hw/semihosting/console.h"
+#include "semihosting/console.h"
 #include "qemu.h"
 #include <termios.h>
 
diff --git a/softmmu/vl.c b/softmmu/vl.c
index 10bd8a10a3..ac06dfbae0 100644
--- a/softmmu/vl.c
+++ b/softmmu/vl.c
@@ -108,7 +108,7 @@
 #include "qapi/opts-visitor.h"
 #include "qapi/clone-visitor.h"
 #include "qom/object_interfaces.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "crypto/init.h"
 #include "sysemu/replay.h"
 #include "qapi/qapi-events-run-state.h"
diff --git a/stubs/semihost.c b/stubs/semihost.c
index 1d8b37f7b2..1b30f38b03 100644
--- a/stubs/semihost.c
+++ b/stubs/semihost.c
@@ -11,7 +11,7 @@
 #include "qemu/osdep.h"
 #include "qemu/option.h"
 #include "qemu/error-report.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "sysemu/sysemu.h"
 
 /* Empty config */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0e1a3b9421..d763f376c6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -22,7 +22,7 @@
 #include "exec/exec-all.h"
 #include <zlib.h> /* For crc32 */
 #include "hw/irq.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "sysemu/cpus.h"
 #include "sysemu/cpu-timers.h"
 #include "sysemu/kvm.h"
@@ -34,7 +34,7 @@
 #ifdef CONFIG_TCG
 #include "arm_ldst.h"
 #include "exec/cpu_ldst.h"
-#include "hw/semihosting/common-semi.h"
+#include "semihosting/common-semi.h"
 #endif
 
 #define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
diff --git a/target/arm/m_helper.c b/target/arm/m_helper.c
index 731c435c00..d63ae465e1 100644
--- a/target/arm/m_helper.c
+++ b/target/arm/m_helper.c
@@ -21,7 +21,7 @@
 #include "qemu/qemu-print.h"
 #include "exec/exec-all.h"
 #include <zlib.h> /* For crc32 */
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "sysemu/cpus.h"
 #include "sysemu/kvm.h"
 #include "qemu/range.h"
@@ -31,7 +31,7 @@
 #ifdef CONFIG_TCG
 #include "arm_ldst.h"
 #include "exec/cpu_ldst.h"
-#include "hw/semihosting/common-semi.h"
+#include "semihosting/common-semi.h"
 #endif
 
 static void v7m_msr_xpsr(CPUARMState *env, uint32_t mask,
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index b23a8975d5..6d002e2c63 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -28,7 +28,7 @@
 #include "internals.h"
 #include "qemu/host-utils.h"
 
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "exec/gen-icount.h"
 
 #include "exec/helper-proto.h"
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 1653cca1aa..62b1c2081b 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -29,7 +29,7 @@
 #include "qemu/log.h"
 #include "qemu/bitops.h"
 #include "arm_ldst.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 
 #include "exec/helper-proto.h"
 #include "exec/helper-gen.h"
diff --git a/target/lm32/helper.c b/target/lm32/helper.c
index 7c52ae76d6..01cc3c53a5 100644
--- a/target/lm32/helper.c
+++ b/target/lm32/helper.c
@@ -21,7 +21,7 @@
 #include "cpu.h"
 #include "exec/exec-all.h"
 #include "qemu/host-utils.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "exec/log.h"
 
 bool lm32_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c
index 202498deb5..730cdf7744 100644
--- a/target/m68k/op_helper.c
+++ b/target/m68k/op_helper.c
@@ -21,7 +21,7 @@
 #include "exec/helper-proto.h"
 #include "exec/exec-all.h"
 #include "exec/cpu_ldst.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 
 #if defined(CONFIG_USER_ONLY)
 
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index bf70c77295..bd4dca571f 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -31,7 +31,7 @@
 #include "exec/exec-all.h"
 #include "hw/qdev-properties.h"
 #include "hw/qdev-clock.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "qapi/qapi-commands-machine-target.h"
 #include "fpu_helper.h"
 
diff --git a/target/mips/mips-semi.c b/target/mips/mips-semi.c
index 898251aa02..6de60fa6dd 100644
--- a/target/mips/mips-semi.c
+++ b/target/mips/mips-semi.c
@@ -22,8 +22,8 @@
 #include "qemu/log.h"
 #include "exec/helper-proto.h"
 #include "exec/softmmu-semi.h"
-#include "hw/semihosting/semihost.h"
-#include "hw/semihosting/console.h"
+#include "semihosting/semihost.h"
+#include "semihosting/console.h"
 
 typedef enum UHIOp {
     UHI_exit = 1,
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 70891c37cd..0b6d82d228 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -29,7 +29,7 @@
 #include "exec/translator.h"
 #include "exec/helper-proto.h"
 #include "exec/helper-gen.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 
 #include "target/mips/trace.h"
 #include "trace-tcg.h"
diff --git a/target/nios2/helper.c b/target/nios2/helper.c
index 57c97bde3c..53be8398e9 100644
--- a/target/nios2/helper.c
+++ b/target/nios2/helper.c
@@ -26,7 +26,7 @@
 #include "exec/cpu_ldst.h"
 #include "exec/log.h"
 #include "exec/helper-proto.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 
 #if defined(CONFIG_USER_ONLY)
 
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index 2f43939fb6..83a6bcfad0 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -24,7 +24,7 @@
 #include "exec/exec-all.h"
 #include "tcg/tcg-op.h"
 #include "trace.h"
-#include "hw/semihosting/common-semi.h"
+#include "semihosting/common-semi.h"
 
 int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch)
 {
diff --git a/target/unicore32/helper.c b/target/unicore32/helper.c
index 54c26871fe..704393c27f 100644
--- a/target/unicore32/helper.c
+++ b/target/unicore32/helper.c
@@ -14,7 +14,7 @@
 #include "cpu.h"
 #include "exec/exec-all.h"
 #include "exec/helper-proto.h"
-#include "hw/semihosting/console.h"
+#include "semihosting/console.h"
 
 #undef DEBUG_UC32
 
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
index 944a157747..0ae4efc48a 100644
--- a/target/xtensa/translate.c
+++ b/target/xtensa/translate.c
@@ -37,7 +37,7 @@
 #include "qemu/log.h"
 #include "qemu/qemu-print.h"
 #include "exec/cpu_ldst.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "exec/translator.h"
 
 #include "exec/helper-proto.h"
diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c
index 25f57a6500..79f2b043f2 100644
--- a/target/xtensa/xtensa-semi.c
+++ b/target/xtensa/xtensa-semi.c
@@ -29,7 +29,7 @@
 #include "cpu.h"
 #include "chardev/char-fe.h"
 #include "exec/helper-proto.h"
-#include "hw/semihosting/semihost.h"
+#include "semihosting/semihost.h"
 #include "qapi/error.h"
 #include "qemu/log.h"
 
diff --git a/MAINTAINERS b/MAINTAINERS
index 1443278059..37ddf90669 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3227,7 +3227,7 @@ Semihosting
 M: Alex Bennée <alex.bennee@linaro.org>
 S: Maintained
 F: hw/semihosting/
-F: include/hw/semihosting/
+F: include/semihosting/
 
 Multi-process QEMU
 M: Elena Ufimtseva <elena.ufimtseva@oracle.com>
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v1 2/3] semihosting: Move hw/semihosting/ -> semihosting/
  2021-03-05 13:54 [PATCH v1 0/3] semihosting/next (move from hw, heapinfo) Alex Bennée
  2021-03-05 13:54 ` [PATCH v1 1/3] semihosting: Move include/hw/semihosting/ -> include/semihosting/ Alex Bennée
@ 2021-03-05 13:54 ` Alex Bennée
  2021-03-05 13:54 ` [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO Alex Bennée
  2 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-05 13:54 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, Philippe Mathieu-Daudé

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

With the exception of hw/core/, the hw/ directory only contains
device models used in system emulation. Semihosting is also used
by user emulation. As a generic feature, move it out of hw/ directory.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210226131356.3964782-3-f4bug@amsat.org>
---
 meson.build                                       | 1 +
 {hw/semihosting => semihosting}/common-semi.h     | 0
 {hw/semihosting => semihosting}/arm-compat-semi.c | 0
 {hw/semihosting => semihosting}/config.c          | 0
 {hw/semihosting => semihosting}/console.c         | 0
 Kconfig                                           | 1 +
 MAINTAINERS                                       | 2 +-
 hw/Kconfig                                        | 1 -
 hw/meson.build                                    | 1 -
 {hw/semihosting => semihosting}/Kconfig           | 0
 {hw/semihosting => semihosting}/meson.build       | 0
 11 files changed, 3 insertions(+), 3 deletions(-)
 rename {hw/semihosting => semihosting}/common-semi.h (100%)
 rename {hw/semihosting => semihosting}/arm-compat-semi.c (100%)
 rename {hw/semihosting => semihosting}/config.c (100%)
 rename {hw/semihosting => semihosting}/console.c (100%)
 rename {hw/semihosting => semihosting}/Kconfig (100%)
 rename {hw/semihosting => semihosting}/meson.build (100%)

diff --git a/meson.build b/meson.build
index 07bc23129a..3578692315 100644
--- a/meson.build
+++ b/meson.build
@@ -1939,6 +1939,7 @@ subdir('migration')
 subdir('monitor')
 subdir('net')
 subdir('replay')
+subdir('semihosting')
 subdir('hw')
 subdir('accel')
 subdir('plugins')
diff --git a/hw/semihosting/common-semi.h b/semihosting/common-semi.h
similarity index 100%
rename from hw/semihosting/common-semi.h
rename to semihosting/common-semi.h
diff --git a/hw/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
similarity index 100%
rename from hw/semihosting/arm-compat-semi.c
rename to semihosting/arm-compat-semi.c
diff --git a/hw/semihosting/config.c b/semihosting/config.c
similarity index 100%
rename from hw/semihosting/config.c
rename to semihosting/config.c
diff --git a/hw/semihosting/console.c b/semihosting/console.c
similarity index 100%
rename from hw/semihosting/console.c
rename to semihosting/console.c
diff --git a/Kconfig b/Kconfig
index bf694c42af..d52ebd839b 100644
--- a/Kconfig
+++ b/Kconfig
@@ -2,3 +2,4 @@ source Kconfig.host
 source backends/Kconfig
 source accel/Kconfig
 source hw/Kconfig
+source semihosting/Kconfig
diff --git a/MAINTAINERS b/MAINTAINERS
index 37ddf90669..90118a537a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3226,7 +3226,7 @@ F: qapi/rdma.json
 Semihosting
 M: Alex Bennée <alex.bennee@linaro.org>
 S: Maintained
-F: hw/semihosting/
+F: semihosting/
 F: include/semihosting/
 
 Multi-process QEMU
diff --git a/hw/Kconfig b/hw/Kconfig
index 8ea26479c4..ff40bd3f7b 100644
--- a/hw/Kconfig
+++ b/hw/Kconfig
@@ -31,7 +31,6 @@ source remote/Kconfig
 source rtc/Kconfig
 source scsi/Kconfig
 source sd/Kconfig
-source semihosting/Kconfig
 source smbios/Kconfig
 source ssi/Kconfig
 source timer/Kconfig
diff --git a/hw/meson.build b/hw/meson.build
index e615d72d4d..8ba79b1a52 100644
--- a/hw/meson.build
+++ b/hw/meson.build
@@ -30,7 +30,6 @@ subdir('rdma')
 subdir('rtc')
 subdir('scsi')
 subdir('sd')
-subdir('semihosting')
 subdir('smbios')
 subdir('ssi')
 subdir('timer')
diff --git a/hw/semihosting/Kconfig b/semihosting/Kconfig
similarity index 100%
rename from hw/semihosting/Kconfig
rename to semihosting/Kconfig
diff --git a/hw/semihosting/meson.build b/semihosting/meson.build
similarity index 100%
rename from hw/semihosting/meson.build
rename to semihosting/meson.build
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 13:54 [PATCH v1 0/3] semihosting/next (move from hw, heapinfo) Alex Bennée
  2021-03-05 13:54 ` [PATCH v1 1/3] semihosting: Move include/hw/semihosting/ -> include/semihosting/ Alex Bennée
  2021-03-05 13:54 ` [PATCH v1 2/3] semihosting: Move hw/semihosting/ -> semihosting/ Alex Bennée
@ 2021-03-05 13:54 ` Alex Bennée
  2021-03-05 13:54   ` [Bug 1915925] " Alex Bennée
                     ` (2 more replies)
  2 siblings, 3 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-05 13:54 UTC (permalink / raw)
  To: qemu-devel
  Cc: Bug 1915925, Keith Packard, open list:ARM TCG CPUs,
	Alex Bennée, Peter Maydell

I'm not sure this every worked properly and it's certainly not
exercised by check-tcg or Peter's semihosting tests. Hoist it into
it's own helper function and attempt to validate the results in the
linux-user semihosting test at the least.

Bug: https://bugs.launchpad.net/bugs/1915925
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/arm/semicall.h      |   1 +
 semihosting/arm-compat-semi.c | 129 +++++++++++++++++++---------------
 tests/tcg/arm/semihosting.c   |  34 ++++++++-
 3 files changed, 107 insertions(+), 57 deletions(-)

diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h
index d4f6818192..676a542be5 100644
--- a/tests/tcg/arm/semicall.h
+++ b/tests/tcg/arm/semicall.h
@@ -9,6 +9,7 @@
 
 #define SYS_WRITE0      0x04
 #define SYS_READC       0x07
+#define SYS_HEAPINFO    0x16
 #define SYS_REPORTEXC   0x18
 
 uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 94950b6c56..a8fdbceb5f 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -822,6 +822,78 @@ static const GuestFDFunctions guestfd_fns[] = {
     put_user_utl(val, args + (n) * sizeof(target_ulong))
 #endif
 
+/*
+ * SYS_HEAPINFO is a little weird: "On entry, the PARAMETER REGISTER
+ * contains the address of a pointer to a four-field data block" which
+ * we then fill in. The PARAMETER REGISTER is unchanged.
+ */
+
+struct HeapInfo {
+    target_ulong heap_base;
+    target_ulong heap_limit;
+    target_ulong stack_base;
+    target_ulong stack_limit;
+};
+
+static bool do_heapinfo(CPUState *cs, target_long arg0)
+{
+    target_ulong limit;
+    struct HeapInfo info = {};
+#ifdef CONFIG_USER_ONLY
+    TaskState *ts = cs->opaque;
+#else
+    target_ulong rambase = common_semi_rambase(cs);
+#endif
+
+#ifdef CONFIG_USER_ONLY
+    /*
+     * Some C libraries assume the heap immediately follows .bss, so
+     * allocate it using sbrk.
+     */
+    if (!ts->heap_limit) {
+        abi_ulong ret;
+
+        ts->heap_base = do_brk(0);
+        limit = ts->heap_base + COMMON_SEMI_HEAP_SIZE;
+        /* Try a big heap, and reduce the size if that fails.  */
+        for (;;) {
+            ret = do_brk(limit);
+            if (ret >= limit) {
+                break;
+            }
+            limit = (ts->heap_base >> 1) + (limit >> 1);
+        }
+        ts->heap_limit = limit;
+    }
+
+    info.heap_base = ts->heap_base;
+    info.heap_limit = ts->heap_limit;
+    info.stack_base = ts->stack_base;
+    info.stack_limit = 0; /* Stack limit.  */
+
+    if (copy_to_user(arg0, &info, sizeof(info))) {
+        errno = EFAULT;
+        return  set_swi_errno(cs, -1);
+    }
+#else
+    limit = current_machine->ram_size;
+    /* TODO: Make this use the limit of the loaded application.  */
+    info.heap_base = rambase + limit / 2;
+    info.heap_limit = rambase + limit;
+    info.stack_base = rambase + limit; /* Stack base */
+    info.stack_limit = rambase; /* Stack limit.  */
+
+    if (cpu_memory_rw_debug(cs, arg0, &info, sizeof(info), true)) {
+        errno = EFAULT;
+        return  set_swi_errno(cs, -1);
+    }
+
+#endif
+
+    return 0;
+}
+
+
 /*
  * Do a semihosting call.
  *
@@ -1184,63 +1256,8 @@ target_ulong do_common_semihosting(CPUState *cs)
         }
     case TARGET_SYS_HEAPINFO:
         {
-            target_ulong retvals[4];
-            target_ulong limit;
-            int i;
-#ifdef CONFIG_USER_ONLY
-            TaskState *ts = cs->opaque;
-#else
-            target_ulong rambase = common_semi_rambase(cs);
-#endif
-
             GET_ARG(0);
-
-#ifdef CONFIG_USER_ONLY
-            /*
-             * Some C libraries assume the heap immediately follows .bss, so
-             * allocate it using sbrk.
-             */
-            if (!ts->heap_limit) {
-                abi_ulong ret;
-
-                ts->heap_base = do_brk(0);
-                limit = ts->heap_base + COMMON_SEMI_HEAP_SIZE;
-                /* Try a big heap, and reduce the size if that fails.  */
-                for (;;) {
-                    ret = do_brk(limit);
-                    if (ret >= limit) {
-                        break;
-                    }
-                    limit = (ts->heap_base >> 1) + (limit >> 1);
-                }
-                ts->heap_limit = limit;
-            }
-
-            retvals[0] = ts->heap_base;
-            retvals[1] = ts->heap_limit;
-            retvals[2] = ts->stack_base;
-            retvals[3] = 0; /* Stack limit.  */
-#else
-            limit = current_machine->ram_size;
-            /* TODO: Make this use the limit of the loaded application.  */
-            retvals[0] = rambase + limit / 2;
-            retvals[1] = rambase + limit;
-            retvals[2] = rambase + limit; /* Stack base */
-            retvals[3] = rambase; /* Stack limit.  */
-#endif
-
-            for (i = 0; i < ARRAY_SIZE(retvals); i++) {
-                bool fail;
-
-                fail = SET_ARG(i, retvals[i]);
-
-                if (fail) {
-                    /* Couldn't write back to argument block */
-                    errno = EFAULT;
-                    return set_swi_errno(cs, -1);
-                }
-            }
-            return 0;
+            return do_heapinfo(cs, arg0);
         }
     case TARGET_SYS_EXIT:
     case TARGET_SYS_EXIT_EXTENDED:
diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/arm/semihosting.c
index 33faac9916..fd5780ec3c 100644
--- a/tests/tcg/arm/semihosting.c
+++ b/tests/tcg/arm/semihosting.c
@@ -7,7 +7,13 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define _GNU_SOURCE  /* asprintf is a GNU extension */
+
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
@@ -18,8 +24,34 @@ int main(int argc, char *argv[argc])
     uintptr_t exit_block[2] = {0x20026, 0};
     uintptr_t exit_code = (uintptr_t) &exit_block;
 #endif
+    struct {
+        void *heap_base;
+        void *heap_limit;
+        void *stack_base;
+        void *stack_limit;
+    } info;
+    void *ptr_to_info = (void *) &info;
+    char *heap_info, *stack_info;
+    void *brk = sbrk(0);
+
+    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World\n");
+
+    memset(&info, 0, sizeof(info));
+    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
+
+    asprintf(&heap_info, "heap: %p -> %p\n", info.heap_base, info.heap_limit);
+    __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
+    if (info.heap_base != brk) {
+        sprintf(heap_info, "heap mismatch: %p\n", brk);
+        __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
+        return -1;
+    }
+
+    asprintf(&stack_info, "stack: %p -> %p\n", info.stack_base, info.stack_limit);
+    __semi_call(SYS_WRITE0, (uintptr_t) stack_info);
+    free(heap_info);
+    free(stack_info);
 
-    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
     __semi_call(SYS_REPORTEXC, exit_code);
     /* if we get here we failed */
     return -1;
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [Bug 1915925] [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 13:54 ` [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO Alex Bennée
@ 2021-03-05 13:54   ` Alex Bennée
  2021-03-05 14:10   ` Peter Maydell
  2021-03-05 20:19   ` Keith Packard via
  2 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-05 13:54 UTC (permalink / raw)
  To: qemu-devel

I'm not sure this every worked properly and it's certainly not
exercised by check-tcg or Peter's semihosting tests. Hoist it into
it's own helper function and attempt to validate the results in the
linux-user semihosting test at the least.

Bug: https://bugs.launchpad.net/bugs/1915925
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/arm/semicall.h      |   1 +
 semihosting/arm-compat-semi.c | 129 +++++++++++++++++++---------------
 tests/tcg/arm/semihosting.c   |  34 ++++++++-
 3 files changed, 107 insertions(+), 57 deletions(-)

diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h
index d4f6818192..676a542be5 100644
--- a/tests/tcg/arm/semicall.h
+++ b/tests/tcg/arm/semicall.h
@@ -9,6 +9,7 @@
 
 #define SYS_WRITE0      0x04
 #define SYS_READC       0x07
+#define SYS_HEAPINFO    0x16
 #define SYS_REPORTEXC   0x18
 
 uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 94950b6c56..a8fdbceb5f 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -822,6 +822,78 @@ static const GuestFDFunctions guestfd_fns[] = {
     put_user_utl(val, args + (n) * sizeof(target_ulong))
 #endif
 
+/*
+ * SYS_HEAPINFO is a little weird: "On entry, the PARAMETER REGISTER
+ * contains the address of a pointer to a four-field data block" which
+ * we then fill in. The PARAMETER REGISTER is unchanged.
+ */
+
+struct HeapInfo {
+    target_ulong heap_base;
+    target_ulong heap_limit;
+    target_ulong stack_base;
+    target_ulong stack_limit;
+};
+
+static bool do_heapinfo(CPUState *cs, target_long arg0)
+{
+    target_ulong limit;
+    struct HeapInfo info = {};
+#ifdef CONFIG_USER_ONLY
+    TaskState *ts = cs->opaque;
+#else
+    target_ulong rambase = common_semi_rambase(cs);
+#endif
+
+#ifdef CONFIG_USER_ONLY
+    /*
+     * Some C libraries assume the heap immediately follows .bss, so
+     * allocate it using sbrk.
+     */
+    if (!ts->heap_limit) {
+        abi_ulong ret;
+
+        ts->heap_base = do_brk(0);
+        limit = ts->heap_base + COMMON_SEMI_HEAP_SIZE;
+        /* Try a big heap, and reduce the size if that fails.  */
+        for (;;) {
+            ret = do_brk(limit);
+            if (ret >= limit) {
+                break;
+            }
+            limit = (ts->heap_base >> 1) + (limit >> 1);
+        }
+        ts->heap_limit = limit;
+    }
+
+    info.heap_base = ts->heap_base;
+    info.heap_limit = ts->heap_limit;
+    info.stack_base = ts->stack_base;
+    info.stack_limit = 0; /* Stack limit.  */
+
+    if (copy_to_user(arg0, &info, sizeof(info))) {
+        errno = EFAULT;
+        return  set_swi_errno(cs, -1);
+    }
+#else
+    limit = current_machine->ram_size;
+    /* TODO: Make this use the limit of the loaded application.  */
+    info.heap_base = rambase + limit / 2;
+    info.heap_limit = rambase + limit;
+    info.stack_base = rambase + limit; /* Stack base */
+    info.stack_limit = rambase; /* Stack limit.  */
+
+    if (cpu_memory_rw_debug(cs, arg0, &info, sizeof(info), true)) {
+        errno = EFAULT;
+        return  set_swi_errno(cs, -1);
+    }
+
+#endif
+
+    return 0;
+}
+
+
 /*
  * Do a semihosting call.
  *
@@ -1184,63 +1256,8 @@ target_ulong do_common_semihosting(CPUState *cs)
         }
     case TARGET_SYS_HEAPINFO:
         {
-            target_ulong retvals[4];
-            target_ulong limit;
-            int i;
-#ifdef CONFIG_USER_ONLY
-            TaskState *ts = cs->opaque;
-#else
-            target_ulong rambase = common_semi_rambase(cs);
-#endif
-
             GET_ARG(0);
-
-#ifdef CONFIG_USER_ONLY
-            /*
-             * Some C libraries assume the heap immediately follows .bss, so
-             * allocate it using sbrk.
-             */
-            if (!ts->heap_limit) {
-                abi_ulong ret;
-
-                ts->heap_base = do_brk(0);
-                limit = ts->heap_base + COMMON_SEMI_HEAP_SIZE;
-                /* Try a big heap, and reduce the size if that fails.  */
-                for (;;) {
-                    ret = do_brk(limit);
-                    if (ret >= limit) {
-                        break;
-                    }
-                    limit = (ts->heap_base >> 1) + (limit >> 1);
-                }
-                ts->heap_limit = limit;
-            }
-
-            retvals[0] = ts->heap_base;
-            retvals[1] = ts->heap_limit;
-            retvals[2] = ts->stack_base;
-            retvals[3] = 0; /* Stack limit.  */
-#else
-            limit = current_machine->ram_size;
-            /* TODO: Make this use the limit of the loaded application.  */
-            retvals[0] = rambase + limit / 2;
-            retvals[1] = rambase + limit;
-            retvals[2] = rambase + limit; /* Stack base */
-            retvals[3] = rambase; /* Stack limit.  */
-#endif
-
-            for (i = 0; i < ARRAY_SIZE(retvals); i++) {
-                bool fail;
-
-                fail = SET_ARG(i, retvals[i]);
-
-                if (fail) {
-                    /* Couldn't write back to argument block */
-                    errno = EFAULT;
-                    return set_swi_errno(cs, -1);
-                }
-            }
-            return 0;
+            return do_heapinfo(cs, arg0);
         }
     case TARGET_SYS_EXIT:
     case TARGET_SYS_EXIT_EXTENDED:
diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/arm/semihosting.c
index 33faac9916..fd5780ec3c 100644
--- a/tests/tcg/arm/semihosting.c
+++ b/tests/tcg/arm/semihosting.c
@@ -7,7 +7,13 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define _GNU_SOURCE  /* asprintf is a GNU extension */
+
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
@@ -18,8 +24,34 @@ int main(int argc, char *argv[argc])
     uintptr_t exit_block[2] = {0x20026, 0};
     uintptr_t exit_code = (uintptr_t) &exit_block;
 #endif
+    struct {
+        void *heap_base;
+        void *heap_limit;
+        void *stack_base;
+        void *stack_limit;
+    } info;
+    void *ptr_to_info = (void *) &info;
+    char *heap_info, *stack_info;
+    void *brk = sbrk(0);
+
+    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World\n");
+
+    memset(&info, 0, sizeof(info));
+    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
+
+    asprintf(&heap_info, "heap: %p -> %p\n", info.heap_base, info.heap_limit);
+    __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
+    if (info.heap_base != brk) {
+        sprintf(heap_info, "heap mismatch: %p\n", brk);
+        __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
+        return -1;
+    }
+
+    asprintf(&stack_info, "stack: %p -> %p\n", info.stack_base, info.stack_limit);
+    __semi_call(SYS_WRITE0, (uintptr_t) stack_info);
+    free(heap_info);
+    free(stack_info);
 
-    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
     __semi_call(SYS_REPORTEXC, exit_code);
     /* if we get here we failed */
     return -1;
-- 
2.20.1

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply related	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 13:54 ` [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO Alex Bennée
  2021-03-05 13:54   ` [Bug 1915925] " Alex Bennée
@ 2021-03-05 14:10   ` Peter Maydell
  2021-03-05 14:10     ` [Bug 1915925] " Peter Maydell
  2021-03-05 20:22     ` Keith Packard via
  2021-03-05 20:19   ` Keith Packard via
  2 siblings, 2 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-05 14:10 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Keith Packard, open list:ARM TCG CPUs, Bug 1915925, QEMU Developers

On Fri, 5 Mar 2021 at 13:54, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> I'm not sure this every worked properly and it's certainly not
> exercised by check-tcg or Peter's semihosting tests. Hoist it into
> it's own helper function and attempt to validate the results in the
> linux-user semihosting test at the least.
>
> Bug: https://bugs.launchpad.net/bugs/1915925
> Cc: Bug 1915925 <1915925@bugs.launchpad.net>
> Cc: Keith Packard <keithp@keithp.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/arm/semicall.h      |   1 +
>  semihosting/arm-compat-semi.c | 129 +++++++++++++++++++---------------
>  tests/tcg/arm/semihosting.c   |  34 ++++++++-
>  3 files changed, 107 insertions(+), 57 deletions(-)
> +#else
> +    limit = current_machine->ram_size;
> +    /* TODO: Make this use the limit of the loaded application.  */
> +    info.heap_base = rambase + limit / 2;
> +    info.heap_limit = rambase + limit;
> +    info.stack_base = rambase + limit; /* Stack base */
> +    info.stack_limit = rambase; /* Stack limit.  */
> +
> +    if (cpu_memory_rw_debug(cs, arg0, &info, sizeof(info), true)) {

Blatting a C struct into guest memory has endianness and padding
problems. Why not just do things the way the old Arm code did it ?

Also, you don't seem to have the correct "is the CPU in
32-bit or 64-bit mode" test here: you cannot rely on target_ulong
being the right size, you must make a runtime check.

I suggested in the other email the way I think we should fix this.

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 14:10   ` Peter Maydell
@ 2021-03-05 14:10     ` Peter Maydell
  2021-03-05 20:22     ` Keith Packard via
  1 sibling, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-05 14:10 UTC (permalink / raw)
  To: qemu-devel

On Fri, 5 Mar 2021 at 13:54, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> I'm not sure this every worked properly and it's certainly not
> exercised by check-tcg or Peter's semihosting tests. Hoist it into
> it's own helper function and attempt to validate the results in the
> linux-user semihosting test at the least.
>
> Bug: https://bugs.launchpad.net/bugs/1915925
> Cc: Bug 1915925 <1915925@bugs.launchpad.net>
> Cc: Keith Packard <keithp@keithp.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  tests/tcg/arm/semicall.h      |   1 +
>  semihosting/arm-compat-semi.c | 129 +++++++++++++++++++---------------
>  tests/tcg/arm/semihosting.c   |  34 ++++++++-
>  3 files changed, 107 insertions(+), 57 deletions(-)
> +#else
> +    limit = current_machine->ram_size;
> +    /* TODO: Make this use the limit of the loaded application.  */
> +    info.heap_base = rambase + limit / 2;
> +    info.heap_limit = rambase + limit;
> +    info.stack_base = rambase + limit; /* Stack base */
> +    info.stack_limit = rambase; /* Stack limit.  */
> +
> +    if (cpu_memory_rw_debug(cs, arg0, &info, sizeof(info), true)) {

Blatting a C struct into guest memory has endianness and padding
problems. Why not just do things the way the old Arm code did it ?

Also, you don't seem to have the correct "is the CPU in
32-bit or 64-bit mode" test here: you cannot rely on target_ulong
being the right size, you must make a runtime check.

I suggested in the other email the way I think we should fix this.

thanks
-- PMM

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH  v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 13:54 ` [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO Alex Bennée
  2021-03-05 13:54   ` [Bug 1915925] " Alex Bennée
  2021-03-05 14:10   ` Peter Maydell
@ 2021-03-05 20:19   ` Keith Packard via
  2021-03-05 20:19     ` [Bug 1915925] " Keith Packard
  2 siblings, 1 reply; 149+ messages in thread
From: Keith Packard via @ 2021-03-05 20:19 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel
  Cc: Alex Bennée, Bug 1915925, Peter Maydell, open list:ARM TCG CPUs

[-- Attachment #1: Type: text/plain, Size: 625 bytes --]

Alex Bennée <alex.bennee@linaro.org> writes:

> I'm not sure this every worked properly and it's certainly not
> exercised by check-tcg or Peter's semihosting tests. Hoist it into
> it's own helper function and attempt to validate the results in the
> linux-user semihosting test at the least.

The patch is mostly code motion, moving the existing heapinfo stuff into
a separate function. That makes it really hard to see how you've
changed the values being returned. I'd love to see a two patch series,
one of which moves the code as-is and a second patch which fixes
whatever bugs you've found.

-- 
-keith

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 832 bytes --]

^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 20:19   ` Keith Packard via
@ 2021-03-05 20:19     ` Keith Packard
  0 siblings, 0 replies; 149+ messages in thread
From: Keith Packard @ 2021-03-05 20:19 UTC (permalink / raw)
  To: qemu-devel

Alex Bennée <alex.bennee@linaro.org> writes:

> I'm not sure this every worked properly and it's certainly not
> exercised by check-tcg or Peter's semihosting tests. Hoist it into
> it's own helper function and attempt to validate the results in the
> linux-user semihosting test at the least.

The patch is mostly code motion, moving the existing heapinfo stuff into
a separate function. That makes it really hard to see how you've
changed the values being returned. I'd love to see a two patch series,
one of which moves the code as-is and a second patch which fixes
whatever bugs you've found.

-- 
-keith

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 14:10   ` Peter Maydell
  2021-03-05 14:10     ` [Bug 1915925] " Peter Maydell
@ 2021-03-05 20:22     ` Keith Packard via
  2021-03-05 20:22       ` [Bug 1915925] " Keith Packard
  2021-03-05 22:54       ` Peter Maydell
  1 sibling, 2 replies; 149+ messages in thread
From: Keith Packard via @ 2021-03-05 20:22 UTC (permalink / raw)
  To: Peter Maydell, Alex Bennée
  Cc: QEMU Developers, Bug 1915925, open list:ARM TCG CPUs

[-- Attachment #1: Type: text/plain, Size: 373 bytes --]

Peter Maydell <peter.maydell@linaro.org> writes:

> Also, you don't seem to have the correct "is the CPU in
> 32-bit or 64-bit mode" test here: you cannot rely on target_ulong
> being the right size, you must make a runtime check.

Do you mean whether a dual aarch64/arm core is in arm or aarch64 mode,
or whether an aarch64 is running a 32-bit ABI?

-- 
-keith

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 832 bytes --]

^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 20:22     ` Keith Packard via
@ 2021-03-05 20:22       ` Keith Packard
  2021-03-05 22:54       ` Peter Maydell
  1 sibling, 0 replies; 149+ messages in thread
From: Keith Packard @ 2021-03-05 20:22 UTC (permalink / raw)
  To: qemu-devel

Peter Maydell <peter.maydell@linaro.org> writes:

> Also, you don't seem to have the correct "is the CPU in
> 32-bit or 64-bit mode" test here: you cannot rely on target_ulong
> being the right size, you must make a runtime check.

Do you mean whether a dual aarch64/arm core is in arm or aarch64 mode,
or whether an aarch64 is running a 32-bit ABI?

-- 
-keith

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 20:22     ` Keith Packard via
  2021-03-05 20:22       ` [Bug 1915925] " Keith Packard
@ 2021-03-05 22:54       ` Peter Maydell
  2021-03-05 22:54         ` [Bug 1915925] " Peter Maydell
  2021-03-05 23:54         ` Keith Packard via
  1 sibling, 2 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-05 22:54 UTC (permalink / raw)
  To: Keith Packard
  Cc: Bug 1915925, open list:ARM TCG CPUs, Alex Bennée, QEMU Developers

On Fri, 5 Mar 2021 at 20:22, Keith Packard <keithp@keithp.com> wrote:
>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > Also, you don't seem to have the correct "is the CPU in
> > 32-bit or 64-bit mode" test here: you cannot rely on target_ulong
> > being the right size, you must make a runtime check.
>
> Do you mean whether a dual aarch64/arm core is in arm or aarch64 mode,
> or whether an aarch64 is running a 32-bit ABI?

For semihosting for Arm what matters is "what state is the core
in at the point where it makes the semihosting SVC/HLT/etc insn?".

How does RISCV specify it?

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 22:54       ` Peter Maydell
@ 2021-03-05 22:54         ` Peter Maydell
  2021-03-05 23:54         ` Keith Packard via
  1 sibling, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-05 22:54 UTC (permalink / raw)
  To: qemu-devel

On Fri, 5 Mar 2021 at 20:22, Keith Packard <keithp@keithp.com> wrote:
>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > Also, you don't seem to have the correct "is the CPU in
> > 32-bit or 64-bit mode" test here: you cannot rely on target_ulong
> > being the right size, you must make a runtime check.
>
> Do you mean whether a dual aarch64/arm core is in arm or aarch64 mode,
> or whether an aarch64 is running a 32-bit ABI?

For semihosting for Arm what matters is "what state is the core
in at the point where it makes the semihosting SVC/HLT/etc insn?".

How does RISCV specify it?

thanks
-- PMM

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 22:54       ` Peter Maydell
  2021-03-05 22:54         ` [Bug 1915925] " Peter Maydell
@ 2021-03-05 23:54         ` Keith Packard via
  2021-03-05 23:54           ` [Bug 1915925] " Keith Packard
                             ` (2 more replies)
  1 sibling, 3 replies; 149+ messages in thread
From: Keith Packard via @ 2021-03-05 23:54 UTC (permalink / raw)
  To: Peter Maydell
  Cc: Alex Bennée, QEMU Developers, Bug 1915925, open list:ARM TCG CPUs

[-- Attachment #1: Type: text/plain, Size: 1018 bytes --]

Peter Maydell <peter.maydell@linaro.org> writes:

> For semihosting for Arm what matters is "what state is the core
> in at the point where it makes the semihosting SVC/HLT/etc insn?".

Ok, that means we *aren't* talking about -mabi=ilp32, which is good --
in my current picolibc implementation, the semihosting code uses a pure
64-bit interface for aarch64 targets, even when using ilp32 ABI.

> How does RISCV specify it?

Because the ISA is identical between 64- and 32- bit (and 128-bit)
execution modes, the only difference between the two is the Machine XLEN
value which encodes the native base integer ISA width. You switch modes
by modifying this value.

I don't know of any implementation in hardware or software that supports
modifying this value. I'm not sure we need to support this in the
semihosting code for qemu as I'm pretty sure getting qemu to support
dynamic XLEN values would be a large project (a project which I don't
personally feel would offer much value).

-- 
-keith

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 832 bytes --]

^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 23:54         ` Keith Packard via
@ 2021-03-05 23:54           ` Keith Packard
  2021-03-06  1:27           ` Richard Henderson
  2021-03-06 14:07           ` Peter Maydell
  2 siblings, 0 replies; 149+ messages in thread
From: Keith Packard @ 2021-03-05 23:54 UTC (permalink / raw)
  To: qemu-devel

Peter Maydell <peter.maydell@linaro.org> writes:

> For semihosting for Arm what matters is "what state is the core
> in at the point where it makes the semihosting SVC/HLT/etc insn?".

Ok, that means we *aren't* talking about -mabi=ilp32, which is good --
in my current picolibc implementation, the semihosting code uses a pure
64-bit interface for aarch64 targets, even when using ilp32 ABI.

> How does RISCV specify it?

Because the ISA is identical between 64- and 32- bit (and 128-bit)
execution modes, the only difference between the two is the Machine XLEN
value which encodes the native base integer ISA width. You switch modes
by modifying this value.

I don't know of any implementation in hardware or software that supports
modifying this value. I'm not sure we need to support this in the
semihosting code for qemu as I'm pretty sure getting qemu to support
dynamic XLEN values would be a large project (a project which I don't
personally feel would offer much value).

-- 
-keith

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 23:54         ` Keith Packard via
  2021-03-05 23:54           ` [Bug 1915925] " Keith Packard
@ 2021-03-06  1:27           ` Richard Henderson
  2021-03-06 14:07           ` Peter Maydell
  2 siblings, 0 replies; 149+ messages in thread
From: Richard Henderson @ 2021-03-06  1:27 UTC (permalink / raw)
  To: Keith Packard, Peter Maydell
  Cc: Bug 1915925, open list:ARM TCG CPUs, Alex Bennée, QEMU Developers

On 3/5/21 3:54 PM, Keith Packard via wrote:
> I don't know of any implementation in hardware or software that supports
> modifying this value. I'm not sure we need to support this in the
> semihosting code for qemu as I'm pretty sure getting qemu to support
> dynamic XLEN values would be a large project

I think it would be fairly trivial, now.  We have riscv_cpu_is_32bit (which 
checks misa, not xlen, fwiw).  It's not examined in cpu_get_tb_cpu_state(), but 
it is many other places.

> (a project which I don't
> personally feel would offer much value).

Now that's a different story.  I'll take no position there.

However!  We do have a function, that can be made into a TCG hook, which could 
then be queried by semihosting/.


r~


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-05 23:54         ` Keith Packard via
  2021-03-05 23:54           ` [Bug 1915925] " Keith Packard
  2021-03-06  1:27           ` Richard Henderson
@ 2021-03-06 14:07           ` Peter Maydell
  2021-03-06 14:07             ` [Bug 1915925] " Peter Maydell
  2021-03-06 16:54             ` Keith Packard via
  2 siblings, 2 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-06 14:07 UTC (permalink / raw)
  To: Keith Packard
  Cc: Bug 1915925, open list:ARM TCG CPUs, Alex Bennée, QEMU Developers

On Fri, 5 Mar 2021 at 23:54, Keith Packard <keithp@keithp.com> wrote:
>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > For semihosting for Arm what matters is "what state is the core
> > in at the point where it makes the semihosting SVC/HLT/etc insn?".
>
> Ok, that means we *aren't* talking about -mabi=ilp32, which is good --
> in my current picolibc implementation, the semihosting code uses a pure
> 64-bit interface for aarch64 targets, even when using ilp32 ABI.

ILP32 for AArch64 is a zombie target -- it is kinda-sorta
supported in some toolchains but has no support in eg
the Linux syscall ABI. The semihosting ABI does not implement
any kind of ILP32 variant -- you can have A32/T32 (AArch32)
semihosting, where register and field sizes are 32 bit, or
you can have A64 (AArch64) semihosting, where register and
field sizes are 64 bit.

> > How does RISCV specify it?
>
> Because the ISA is identical between 64- and 32- bit (and 128-bit)
> execution modes, the only difference between the two is the Machine XLEN
> value which encodes the native base integer ISA width. You switch modes
> by modifying this value.

I meant, how does the RISCV semihosting ABI specify what
the field size is? To answer my own question, I just looked at
the spec doc and it says "depends on whether the caller is
32-bit or 64-bit", which implies that we need to look at the
current state of the CPU in some way.

> I don't know of any implementation in hardware or software that supports
> modifying this value. I'm not sure we need to support this in the
> semihosting code for qemu as I'm pretty sure getting qemu to support
> dynamic XLEN values would be a large project (a project which I don't
> personally feel would offer much value).

Part of why I asked is that the current RISCV implementation
is just looking at sizeof(target_ulong); but the qemu-system-riscv64
executable AIUI now supports emulating both "this is a 64 bit
guest CPU" and "this is a 32 bit host CPU", and so looking at
a QEMU-compile-time value like "sizeof(target_ulong)" will
produce the wrong answer for 32-bit CPUs emulated in
the qemu-system-riscv64 binary. My guess is maybe
it should be looking at the result of riscv_cpu_is_32bit() instead.

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-06 14:07           ` Peter Maydell
@ 2021-03-06 14:07             ` Peter Maydell
  2021-03-06 16:54             ` Keith Packard via
  1 sibling, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-06 14:07 UTC (permalink / raw)
  To: qemu-devel

On Fri, 5 Mar 2021 at 23:54, Keith Packard <keithp@keithp.com> wrote:
>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > For semihosting for Arm what matters is "what state is the core
> > in at the point where it makes the semihosting SVC/HLT/etc insn?".
>
> Ok, that means we *aren't* talking about -mabi=ilp32, which is good --
> in my current picolibc implementation, the semihosting code uses a pure
> 64-bit interface for aarch64 targets, even when using ilp32 ABI.

ILP32 for AArch64 is a zombie target -- it is kinda-sorta
supported in some toolchains but has no support in eg
the Linux syscall ABI. The semihosting ABI does not implement
any kind of ILP32 variant -- you can have A32/T32 (AArch32)
semihosting, where register and field sizes are 32 bit, or
you can have A64 (AArch64) semihosting, where register and
field sizes are 64 bit.

> > How does RISCV specify it?
>
> Because the ISA is identical between 64- and 32- bit (and 128-bit)
> execution modes, the only difference between the two is the Machine XLEN
> value which encodes the native base integer ISA width. You switch modes
> by modifying this value.

I meant, how does the RISCV semihosting ABI specify what
the field size is? To answer my own question, I just looked at
the spec doc and it says "depends on whether the caller is
32-bit or 64-bit", which implies that we need to look at the
current state of the CPU in some way.

> I don't know of any implementation in hardware or software that supports
> modifying this value. I'm not sure we need to support this in the
> semihosting code for qemu as I'm pretty sure getting qemu to support
> dynamic XLEN values would be a large project (a project which I don't
> personally feel would offer much value).

Part of why I asked is that the current RISCV implementation
is just looking at sizeof(target_ulong); but the qemu-system-riscv64
executable AIUI now supports emulating both "this is a 64 bit
guest CPU" and "this is a 32 bit host CPU", and so looking at
a QEMU-compile-time value like "sizeof(target_ulong)" will
produce the wrong answer for 32-bit CPUs emulated in
the qemu-system-riscv64 binary. My guess is maybe
it should be looking at the result of riscv_cpu_is_32bit() instead.

thanks
-- PMM

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-06 14:07           ` Peter Maydell
  2021-03-06 14:07             ` [Bug 1915925] " Peter Maydell
@ 2021-03-06 16:54             ` Keith Packard via
  2021-03-06 16:54               ` [Bug 1915925] " Keith Packard
  2021-03-08 10:09               ` Peter Maydell
  1 sibling, 2 replies; 149+ messages in thread
From: Keith Packard via @ 2021-03-06 16:54 UTC (permalink / raw)
  To: Peter Maydell
  Cc: Alex Bennée, QEMU Developers, Bug 1915925, open list:ARM TCG CPUs

[-- Attachment #1: Type: text/plain, Size: 2275 bytes --]

Peter Maydell <peter.maydell@linaro.org> writes:

> ILP32 for AArch64 is a zombie target -- it is kinda-sorta
> supported in some toolchains but has no support in eg
> the Linux syscall ABI. The semihosting ABI does not implement
> any kind of ILP32 variant -- you can have A32/T32 (AArch32)
> semihosting, where register and field sizes are 32 bit, or
> you can have A64 (AArch64) semihosting, where register and
> field sizes are 64 bit.

Yeah, I did ILP32 support for Picolibc; all of the aarch64 asm support
needed fixing as ilp32 doesn't specify that register arguments clear the
top 32 bits. Seems pretty obvious that it's little used.

For semihosting, as the ABI isn't visible to the hardware/emulator, the
only reasonable answer that I could come up with was to treat ILP32 the
same as the LP64 and pass 64 bit parameters.

As picolibc is designed for bare-metal environments, it's pretty easy to
support ilp32 otherwise.

> I meant, how does the RISCV semihosting ABI specify what
> the field size is? To answer my own question, I just looked at
> the spec doc and it says "depends on whether the caller is
> 32-bit or 64-bit", which implies that we need to look at the
> current state of the CPU in some way.

Yes. As qemu currently fixes that value based on compilation parameters,
we can use the relevant native types directly and ignore the CPU
state. Adding dynamic XLEN support to qemu would involve a bunch of work
as the same code can be run in both 64- and 32- bit modes, so you'd have
to translate it twice and select which to execute based on the CPU
state.

> Part of why I asked is that the current RISCV implementation
> is just looking at sizeof(target_ulong); but the qemu-system-riscv64
> executable AIUI now supports emulating both "this is a 64 bit
> guest CPU" and "this is a 32 bit host CPU", and so looking at
> a QEMU-compile-time value like "sizeof(target_ulong)" will
> produce the wrong answer for 32-bit CPUs emulated in
> the qemu-system-riscv64 binary. My guess is maybe
> it should be looking at the result of riscv_cpu_is_32bit() instead.

Wow. I read through the code and couldn't find anything that looked like
it supported that, sounds like I must have missed something?

-- 
-keith

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 832 bytes --]

^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-06 16:54             ` Keith Packard via
@ 2021-03-06 16:54               ` Keith Packard
  2021-03-08 10:09               ` Peter Maydell
  1 sibling, 0 replies; 149+ messages in thread
From: Keith Packard @ 2021-03-06 16:54 UTC (permalink / raw)
  To: qemu-devel

Peter Maydell <peter.maydell@linaro.org> writes:

> ILP32 for AArch64 is a zombie target -- it is kinda-sorta
> supported in some toolchains but has no support in eg
> the Linux syscall ABI. The semihosting ABI does not implement
> any kind of ILP32 variant -- you can have A32/T32 (AArch32)
> semihosting, where register and field sizes are 32 bit, or
> you can have A64 (AArch64) semihosting, where register and
> field sizes are 64 bit.

Yeah, I did ILP32 support for Picolibc; all of the aarch64 asm support
needed fixing as ilp32 doesn't specify that register arguments clear the
top 32 bits. Seems pretty obvious that it's little used.

For semihosting, as the ABI isn't visible to the hardware/emulator, the
only reasonable answer that I could come up with was to treat ILP32 the
same as the LP64 and pass 64 bit parameters.

As picolibc is designed for bare-metal environments, it's pretty easy to
support ilp32 otherwise.

> I meant, how does the RISCV semihosting ABI specify what
> the field size is? To answer my own question, I just looked at
> the spec doc and it says "depends on whether the caller is
> 32-bit or 64-bit", which implies that we need to look at the
> current state of the CPU in some way.

Yes. As qemu currently fixes that value based on compilation parameters,
we can use the relevant native types directly and ignore the CPU
state. Adding dynamic XLEN support to qemu would involve a bunch of work
as the same code can be run in both 64- and 32- bit modes, so you'd have
to translate it twice and select which to execute based on the CPU
state.

> Part of why I asked is that the current RISCV implementation
> is just looking at sizeof(target_ulong); but the qemu-system-riscv64
> executable AIUI now supports emulating both "this is a 64 bit
> guest CPU" and "this is a 32 bit host CPU", and so looking at
> a QEMU-compile-time value like "sizeof(target_ulong)" will
> produce the wrong answer for 32-bit CPUs emulated in
> the qemu-system-riscv64 binary. My guess is maybe
> it should be looking at the result of riscv_cpu_is_32bit() instead.

Wow. I read through the code and couldn't find anything that looked like
it supported that, sounds like I must have missed something?

-- 
-keith

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-06 16:54             ` Keith Packard via
  2021-03-06 16:54               ` [Bug 1915925] " Keith Packard
@ 2021-03-08 10:09               ` Peter Maydell
  2021-03-08 10:09                 ` [Bug 1915925] " Peter Maydell
  2021-03-08 13:36                 ` Alistair Francis
  1 sibling, 2 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-08 10:09 UTC (permalink / raw)
  To: Keith Packard
  Cc: Bug 1915925, open list:ARM TCG CPUs, Alex Bennée,
	QEMU Developers, Alistair Francis

On Sat, 6 Mar 2021 at 16:54, Keith Packard <keithp@keithp.com> wrote:
>
> Peter Maydell <peter.maydell@linaro.org> writes:
> > Part of why I asked is that the current RISCV implementation
> > is just looking at sizeof(target_ulong); but the qemu-system-riscv64
> > executable AIUI now supports emulating both "this is a 64 bit
> > guest CPU" and "this is a 32 bit host CPU", and so looking at
> > a QEMU-compile-time value like "sizeof(target_ulong)" will
> > produce the wrong answer for 32-bit CPUs emulated in
> > the qemu-system-riscv64 binary. My guess is maybe
> > it should be looking at the result of riscv_cpu_is_32bit() instead.
>
> Wow. I read through the code and couldn't find anything that looked like
> it supported that, sounds like I must have missed something?

I thought Alistair had done that work (which brings riscv into
line with the other 32/64 bit QEMU targets, which all support
the 32-bit CPU types in the 64-bit-capable executable). But maybe
it hasn't landed in master yet?

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-08 10:09               ` Peter Maydell
@ 2021-03-08 10:09                 ` Peter Maydell
  2021-03-08 13:36                 ` Alistair Francis
  1 sibling, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-08 10:09 UTC (permalink / raw)
  To: qemu-devel

On Sat, 6 Mar 2021 at 16:54, Keith Packard <keithp@keithp.com> wrote:
>
> Peter Maydell <peter.maydell@linaro.org> writes:
> > Part of why I asked is that the current RISCV implementation
> > is just looking at sizeof(target_ulong); but the qemu-system-riscv64
> > executable AIUI now supports emulating both "this is a 64 bit
> > guest CPU" and "this is a 32 bit host CPU", and so looking at
> > a QEMU-compile-time value like "sizeof(target_ulong)" will
> > produce the wrong answer for 32-bit CPUs emulated in
> > the qemu-system-riscv64 binary. My guess is maybe
> > it should be looking at the result of riscv_cpu_is_32bit() instead.
>
> Wow. I read through the code and couldn't find anything that looked like
> it supported that, sounds like I must have missed something?

I thought Alistair had done that work (which brings riscv into
line with the other 32/64 bit QEMU targets, which all support
the 32-bit CPU types in the 64-bit-capable executable). But maybe
it hasn't landed in master yet?

thanks
-- PMM

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-08 10:09               ` Peter Maydell
  2021-03-08 10:09                 ` [Bug 1915925] " Peter Maydell
@ 2021-03-08 13:36                 ` Alistair Francis
  2021-03-08 17:28                   ` Keith Packard via
  1 sibling, 1 reply; 149+ messages in thread
From: Alistair Francis @ 2021-03-08 13:36 UTC (permalink / raw)
  To: Peter Maydell
  Cc: Bug 1915925, Keith Packard, open list:ARM TCG CPUs,
	Alex Bennée, QEMU Developers

On Mon, Mar 8, 2021 at 5:10 AM Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Sat, 6 Mar 2021 at 16:54, Keith Packard <keithp@keithp.com> wrote:
> >
> > Peter Maydell <peter.maydell@linaro.org> writes:
> > > Part of why I asked is that the current RISCV implementation
> > > is just looking at sizeof(target_ulong); but the qemu-system-riscv64
> > > executable AIUI now supports emulating both "this is a 64 bit
> > > guest CPU" and "this is a 32 bit host CPU", and so looking at
> > > a QEMU-compile-time value like "sizeof(target_ulong)" will
> > > produce the wrong answer for 32-bit CPUs emulated in
> > > the qemu-system-riscv64 binary. My guess is maybe
> > > it should be looking at the result of riscv_cpu_is_32bit() instead.
> >
> > Wow. I read through the code and couldn't find anything that looked like
> > it supported that, sounds like I must have missed something?

riscv_cpu_is_32bit() is somewhat new, so it might not have been there
when you wrote the patches.

>
> I thought Alistair had done that work (which brings riscv into
> line with the other 32/64 bit QEMU targets, which all support
> the 32-bit CPU types in the 64-bit-capable executable). But maybe
> it hasn't landed in master yet?

I have started on the effort, but I have not finished yet. Adding
riscv_cpu_is_32bit() was the first step there and I have some more
patches locally but I don't have anything working yet.

Alistair

>
> thanks
> -- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-08 13:36                 ` Alistair Francis
@ 2021-03-08 17:28                   ` Keith Packard via
  2021-03-08 17:28                     ` [Bug 1915925] " Keith Packard
  0 siblings, 1 reply; 149+ messages in thread
From: Keith Packard via @ 2021-03-08 17:28 UTC (permalink / raw)
  To: Alistair Francis, Peter Maydell
  Cc: Alex Bennée, QEMU Developers, Bug 1915925, open list:ARM TCG CPUs

[-- Attachment #1: Type: text/plain, Size: 446 bytes --]

Alistair Francis <alistair23@gmail.com> writes:

> I have started on the effort, but I have not finished yet. Adding
> riscv_cpu_is_32bit() was the first step there and I have some more
> patches locally but I don't have anything working yet.

That's awesome. I think waiting until we see what APIs you're developing
for detecting and operating in 32-bit mode on a 64-bit capable processor
seems like a good idea for now.

-- 
-keith

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 832 bytes --]

^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO
  2021-03-08 17:28                   ` Keith Packard via
@ 2021-03-08 17:28                     ` Keith Packard
  0 siblings, 0 replies; 149+ messages in thread
From: Keith Packard @ 2021-03-08 17:28 UTC (permalink / raw)
  To: qemu-devel

Alistair Francis <alistair23@gmail.com> writes:

> I have started on the effort, but I have not finished yet. Adding
> riscv_cpu_is_32bit() was the first step there and I have some more
> patches locally but I don't have anything working yet.

That's awesome. I think waiting until we see what APIs you're developing
for detecting and operating in 32-bit mode on a 64-bit capable processor
seems like a good idea for now.

-- 
-keith

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH  v2 0/4] semihosting/next (SYS_HEAPINFO fix)
@ 2021-03-09 14:17 Alex Bennée
  2021-03-09 14:17 ` [PATCH v2 1/4] semihosting: move semihosting tests to multiarch Alex Bennée
                   ` (3 more replies)
  0 siblings, 4 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 14:17 UTC (permalink / raw)
  To: qemu-devel; +Cc: keithp, Alex Bennée

Hi,

OK I took another tilt at fixing the SYS_HEAPINFO bug with a lot less
code motion and also expanding the tcg tests. Currently based on my
in-flight PR:

  pull-testing-docs-xen-updates-080321-1

which already moves the semihosting code out of hw/. Please review:

 - tests/tcg: add HeapInfo checking to semihosting test
 - semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
 - semihosting/arm-compat-semi: unify GET/SET_ARG helpers
 - semihosting: move semihosting tests to multiarch


Alex Bennée (4):
  semihosting: move semihosting tests to multiarch
  semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
  tests/tcg: add HeapInfo checking to semihosting test

 tests/tcg/aarch64/semicall.h                  | 18 ++++++
 tests/tcg/arm/semicall.h                      | 15 +----
 tests/tcg/riscv64/semicall.h                  | 22 +++++++
 semihosting/arm-compat-semi.c                 | 56 ++++++-----------
 tests/tcg/arm/semihosting.c                   | 26 --------
 .../arm-compat-semi}/semiconsole.c            |  2 +
 .../multiarch/arm-compat-semi/semihosting.c   | 62 +++++++++++++++++++
 tests/tcg/Makefile.target                     |  3 +
 tests/tcg/aarch64/Makefile.target             | 18 ------
 tests/tcg/arm/Makefile.target                 | 16 +----
 tests/tcg/multiarch/Makefile.target           | 31 ++++++++++
 11 files changed, 161 insertions(+), 108 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 delete mode 100644 tests/tcg/arm/semihosting.c
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 create mode 100644 tests/tcg/multiarch/arm-compat-semi/semihosting.c

-- 
2.20.1



^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH  v2 1/4] semihosting: move semihosting tests to multiarch
  2021-03-09 14:17 [PATCH v2 0/4] semihosting/next (SYS_HEAPINFO fix) Alex Bennée
@ 2021-03-09 14:17 ` Alex Bennée
  2021-03-09 14:17 ` [PATCH v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 14:17 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, keithp, open list:ARM TCG CPUs, Alex Bennée,
	Philippe Mathieu-Daudé

It may be arm-compat-semihosting but more than one architecture uses
it so lets move the tests into the multiarch area. We gate it on the
feature and split the semicall.h header between the arches.

Also clean-up a bit of the Makefile messing about to one common set of
runners.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/aarch64/semicall.h                  | 18 +++++++++++
 tests/tcg/arm/semicall.h                      | 15 +--------
 tests/tcg/riscv64/semicall.h                  | 22 +++++++++++++
 .../arm-compat-semi}/semiconsole.c            |  2 ++
 .../arm-compat-semi}/semihosting.c            |  5 ++-
 tests/tcg/Makefile.target                     |  3 ++
 tests/tcg/aarch64/Makefile.target             | 18 -----------
 tests/tcg/arm/Makefile.target                 | 16 ++--------
 tests/tcg/multiarch/Makefile.target           | 31 +++++++++++++++++++
 9 files changed, 83 insertions(+), 47 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semihosting.c (85%)

diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h
new file mode 100644
index 0000000000..8a3fce35c5
--- /dev/null
+++ b/tests/tcg/aarch64/semicall.h
@@ -0,0 +1,18 @@
+/*
+ * Semihosting Tests - AArch64 helper
+ *
+ * Copyright (c) 2019
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("x0") = type;
+    register uintptr_t a0 asm("x1") = arg0;
+    asm("hlt 0xf000"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h
index d4f6818192..ad8ac51310 100644
--- a/tests/tcg/arm/semicall.h
+++ b/tests/tcg/arm/semicall.h
@@ -1,5 +1,5 @@
 /*
- * Semihosting Tests
+ * Semihosting Tests - ARM Helper
  *
  * Copyright (c) 2019
  * Written by Alex Bennée <alex.bennee@linaro.org>
@@ -7,13 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
-#define SYS_WRITE0      0x04
-#define SYS_READC       0x07
-#define SYS_REPORTEXC   0x18
-
 uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 {
-#if defined(__arm__)
     register uintptr_t t asm("r0") = type;
     register uintptr_t a0 asm("r1") = arg0;
 #ifdef __thumb__
@@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 #endif
     asm(SVC : "=r" (t)
         : "r" (t), "r" (a0));
-#else
-    register uintptr_t t asm("x0") = type;
-    register uintptr_t a0 asm("x1") = arg0;
-    asm("hlt 0xf000"
-        : "=r" (t)
-        : "r" (t), "r" (a0));
-#endif
-
     return t;
 }
diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h
new file mode 100644
index 0000000000..f8c88f32dc
--- /dev/null
+++ b/tests/tcg/riscv64/semicall.h
@@ -0,0 +1,22 @@
+/*
+ * Semihosting Tests - RiscV64 Helper
+ *
+ * Copyright (c) 2021
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("a0") = type;
+    register uintptr_t a0 asm("a1") = arg0;
+    asm(".option norvc\n\t"
+        ".balign 16\n\t"
+        "slli zero, zero, 0x1f\n\t"
+        "ebreak\n\t"
+        "srai zero, zero, 0x7\n\t"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
similarity index 93%
rename from tests/tcg/arm/semiconsole.c
rename to tests/tcg/multiarch/arm-compat-semi/semiconsole.c
index 6ef0bd2450..1d82efc589 100644
--- a/tests/tcg/arm/semiconsole.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_READC       0x07
+
 #include <stdio.h>
 #include <stdint.h>
 #include "semicall.h"
diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
similarity index 85%
rename from tests/tcg/arm/semihosting.c
rename to tests/tcg/multiarch/arm-compat-semi/semihosting.c
index 33faac9916..b3fd16cd12 100644
--- a/tests/tcg/arm/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -7,12 +7,15 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_WRITE0      0x04
+#define SYS_REPORTEXC   0x18
+
 #include <stdint.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
 {
-#if defined(__arm__)
+#if UINTPTR_MAX == UINT32_MAX
     uintptr_t exit_code = 0x20026;
 #else
     uintptr_t exit_block[2] = {0x20026, 0};
diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target
index 24d75a5801..cab8c6b3a2 100644
--- a/tests/tcg/Makefile.target
+++ b/tests/tcg/Makefile.target
@@ -32,6 +32,9 @@
 all:
 -include ../../../config-host.mak
 -include ../config-$(TARGET).mak
+ifeq ($(CONFIG_USER_ONLY),y)
+-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak
+endif
 
 # for including , in command strings
 COMMA := ,
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index bf53ad0087..56e48f4b34 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -41,24 +41,6 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4
 mte-%: CFLAGS += -march=armv8.5-a+memtag
 endif
 
-# Semihosting smoke test for linux-user
-AARCH64_TESTS += semihosting
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
-
-run-plugin-semihosting-with-%:
-	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
-		 $(call strip-plugin,$<) 2> $<.err, \
-		"$< on $(TARGET_NAME) with $*")
-
-AARCH64_TESTS += semiconsole
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
 ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
 # System Registers Tests
 AARCH64_TESTS += sysregs
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index ec95156562..1deda384df 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -30,37 +30,25 @@ run-fcvt: fcvt
 	$(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref)
 
 # Semihosting smoke test for linux-user
-ARM_TESTS += semihosting
 semihosting: CFLAGS += -mthumb
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
 ARM_TESTS += semihosting-arm
 semihosting-arm: CFLAGS += -marm
-semihosting-arm: semihosting.c
-	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semihosting-arm: semihosting-arm
 	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
-run-plugin-semihosting-with-%:
+run-plugin-semihosting-arm-with-%:
 	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
 		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
 		 $(call strip-plugin,$<) 2> $<.err, \
 		"$< on $(TARGET_NAME) with $*")
 
-ARM_TESTS += semiconsole semiconsole-arm
+ARM_TESTS += semiconsole-arm
 
 semiconsole: CFLAGS += -mthumb
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
 
 semiconsole-arm: CFLAGS += -marm
-semiconsole-arm: semiconsole.c
-	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semiconsole-arm: semiconsole-arm
 	$(call skip-test, $<, "MANUAL ONLY")
diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target
index abbdb2e126..a3a751723d 100644
--- a/tests/tcg/multiarch/Makefile.target
+++ b/tests/tcg/multiarch/Makefile.target
@@ -69,6 +69,37 @@ run-gdbstub-%:
 endif
 EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read
 
+# ARM Compatible Semi Hosting Tests
+#
+# Despite having ARM in the name we actually have several
+# architectures that implement it. We gate the tests on the feature
+# appearing in config.
+#
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+VPATH += $(MULTIARCH_SRC)/arm-compat-semi
+
+# Add -I path back to TARGET_NAME for semicall.h
+semihosting: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semihosting: semihosting
+	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
+
+run-plugin-semihosting-with-%:
+	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
+		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
+		 $(call strip-plugin,$<) 2> $<.err, \
+		"$< on $(TARGET_NAME) with $*")
+
+semiconsole: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semiconsole: semiconsole
+	$(call skip-test, $<, "MANUAL ONLY")
+
+run-plugin-semiconsole-with-%:
+	$(call skip-test, $<, "MANUAL ONLY")
+
+TESTS += semihosting semiconsole
+endif
 
 # Update TESTS
 TESTS += $(MULTIARCH_TESTS)
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-09 14:17 [PATCH v2 0/4] semihosting/next (SYS_HEAPINFO fix) Alex Bennée
  2021-03-09 14:17 ` [PATCH v2 1/4] semihosting: move semihosting tests to multiarch Alex Bennée
@ 2021-03-09 14:17 ` Alex Bennée
  2021-03-09 16:33   ` Peter Maydell
  2021-03-09 17:02   ` Keith Packard via
  2021-03-09 14:17 ` [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO Alex Bennée
  2021-03-09 14:17 ` [PATCH v2 4/4] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
  3 siblings, 2 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 14:17 UTC (permalink / raw)
  To: qemu-devel; +Cc: keithp, Alex Bennée

From the semihosting point of view what we want to know is the current
mode of the processor. Unify this into a single helper and allow us to
use the same GET/SET_ARG helpers for the rest of the code.

Note: we aren't currently testing riscv32 due to missing toolchain for
check-tcg tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 54 ++++++++++++-----------------------
 1 file changed, 18 insertions(+), 36 deletions(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 94950b6c56..733eea1e2d 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] = {
     },
 };
 
-/* Read the input value from the argument block; fail the semihosting
- * call if the memory read fails.
+/*
+ * Read the input value from the argument block; fail the semihosting
+ * call if the memory read fails. Eventually we could use a generic
+ * CPUState helper function here.
  */
+static inline bool is_64bit_semihosting(CPUArchState *env)
+{
 #ifdef TARGET_ARM
+    return is_a64(env);
+#elif defined(TARGET_RISCV)
+    return !riscv_cpu_is_32bit(env);
+#else
+#error un-handled architecture
+#endif
+}
+
+
 #define GET_ARG(n) do {                                 \
-    if (is_a64(env)) {                                  \
+    if (is_64bit_semihosting(env)) {                    \
         if (get_user_u64(arg ## n, args + (n) * 8)) {   \
             errno = EFAULT;                             \
-            return set_swi_errno(cs, -1);              \
+            return set_swi_errno(cs, -1);               \
         }                                               \
     } else {                                            \
         if (get_user_u32(arg ## n, args + (n) * 4)) {   \
@@ -786,41 +799,10 @@ static const GuestFDFunctions guestfd_fns[] = {
 } while (0)
 
 #define SET_ARG(n, val)                                 \
-    (is_a64(env) ?                                      \
+    (is_64bit_semihosting(env) ?                        \
      put_user_u64(val, args + (n) * 8) :                \
      put_user_u32(val, args + (n) * 4))
-#endif
 
-#ifdef TARGET_RISCV
-
-/*
- * get_user_ual is defined as get_user_u32 in softmmu-semi.h,
- * we need a macro that fetches a target_ulong
- */
-#define get_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     get_user_u64(arg, p) :                     \
-     get_user_u32(arg, p))
-
-/*
- * put_user_ual is defined as put_user_u32 in softmmu-semi.h,
- * we need a macro that stores a target_ulong
- */
-#define put_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     put_user_u64(arg, p) :                     \
-     put_user_u32(arg, p))
-
-#define GET_ARG(n) do {                                                 \
-        if (get_user_utl(arg ## n, args + (n) * sizeof(target_ulong))) { \
-            errno = EFAULT;                                             \
-            return set_swi_errno(cs, -1);                              \
-        }                                                               \
-    } while (0)
-
-#define SET_ARG(n, val)                                 \
-    put_user_utl(val, args + (n) * sizeof(target_ulong))
-#endif
 
 /*
  * Do a semihosting call.
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
  2021-03-09 14:17 [PATCH v2 0/4] semihosting/next (SYS_HEAPINFO fix) Alex Bennée
  2021-03-09 14:17 ` [PATCH v2 1/4] semihosting: move semihosting tests to multiarch Alex Bennée
  2021-03-09 14:17 ` [PATCH v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
@ 2021-03-09 14:17 ` Alex Bennée
  2021-03-09 14:17   ` [Bug 1915925] " Alex Bennée
  2021-03-09 16:35   ` [Bug 1915925] " Peter Maydell
  2021-03-09 14:17 ` [PATCH v2 4/4] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
  3 siblings, 2 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 14:17 UTC (permalink / raw)
  To: qemu-devel; +Cc: Bug 1915925, keithp, Alex Bennée

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow the pointer and place the results of SYS_HEAPINFO
there.

Bug: https://bugs.launchpad.net/bugs/1915925
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 733eea1e2d..2ac9226d29 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1210,6 +1210,8 @@ target_ulong do_common_semihosting(CPUState *cs)
             retvals[2] = rambase + limit; /* Stack base */
             retvals[3] = rambase; /* Stack limit.  */
 #endif
+            /* The result array is pointed to by arg0 */
+            args = arg0;
 
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [Bug 1915925] [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
  2021-03-09 14:17 ` [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO Alex Bennée
@ 2021-03-09 14:17   ` Alex Bennée
  2021-03-09 16:35   ` [Bug 1915925] " Peter Maydell
  1 sibling, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 14:17 UTC (permalink / raw)
  To: qemu-devel

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow the pointer and place the results of SYS_HEAPINFO
there.

Bug: https://bugs.launchpad.net/bugs/1915925
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 733eea1e2d..2ac9226d29 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1210,6 +1210,8 @@ target_ulong do_common_semihosting(CPUState *cs)
             retvals[2] = rambase + limit; /* Stack base */
             retvals[3] = rambase; /* Stack limit.  */
 #endif
+            /* The result array is pointed to by arg0 */
+            args = arg0;
 
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
-- 
2.20.1

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 4/4] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-09 14:17 [PATCH v2 0/4] semihosting/next (SYS_HEAPINFO fix) Alex Bennée
                   ` (2 preceding siblings ...)
  2021-03-09 14:17 ` [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO Alex Bennée
@ 2021-03-09 14:17 ` Alex Bennée
  2021-03-09 17:08   ` Keith Packard via
  3 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 14:17 UTC (permalink / raw)
  To: qemu-devel; +Cc: keithp, Alex Bennée

Query the SYS_HEAPINFO semicall and do some basic verification of the
information via libc calls.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 .../multiarch/arm-compat-semi/semihosting.c   | 35 ++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
index b3fd16cd12..5fa3c0a82d 100644
--- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -8,9 +8,16 @@
  */
 
 #define SYS_WRITE0      0x04
+#define SYS_HEAPINFO    0x16
 #define SYS_REPORTEXC   0x18
 
+#define _GNU_SOURCE  /* asprintf is a GNU extension */
+
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
@@ -21,8 +28,34 @@ int main(int argc, char *argv[argc])
     uintptr_t exit_block[2] = {0x20026, 0};
     uintptr_t exit_code = (uintptr_t) &exit_block;
 #endif
+    struct {
+        void *heap_base;
+        void *heap_limit;
+        void *stack_base;
+        void *stack_limit;
+    } info;
+    void *ptr_to_info = (void *) &info;
+    char *heap_info, *stack_info;
+    void *brk = sbrk(0);
+
+    __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n");
+
+    memset(&info, 0, sizeof(info));
+    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
+
+    asprintf(&heap_info, "heap: %p -> %p\n", info.heap_base, info.heap_limit);
+    __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
+    if (info.heap_base != brk) {
+        sprintf(heap_info, "heap mismatch: %p\n", brk);
+        __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
+        return -1;
+    }
+
+    asprintf(&stack_info, "stack: %p -> %p\n", info.stack_base, info.stack_limit);
+    __semi_call(SYS_WRITE0, (uintptr_t) stack_info);
+    free(heap_info);
+    free(stack_info);
 
-    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
     __semi_call(SYS_REPORTEXC, exit_code);
     /* if we get here we failed */
     return -1;
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* Re: [PATCH v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-09 14:17 ` [PATCH v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
@ 2021-03-09 16:33   ` Peter Maydell
  2021-03-09 17:02   ` Keith Packard via
  1 sibling, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-09 16:33 UTC (permalink / raw)
  To: Alex Bennée; +Cc: Keith Packard, QEMU Developers

On Tue, 9 Mar 2021 at 14:24, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> From the semihosting point of view what we want to know is the current
> mode of the processor. Unify this into a single helper and allow us to
> use the same GET/SET_ARG helpers for the rest of the code.
>
> Note: we aren't currently testing riscv32 due to missing toolchain for
> check-tcg tests.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  semihosting/arm-compat-semi.c | 54 ++++++++++++-----------------------
>  1 file changed, 18 insertions(+), 36 deletions(-)
>
> diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
> index 94950b6c56..733eea1e2d 100644
> --- a/semihosting/arm-compat-semi.c
> +++ b/semihosting/arm-compat-semi.c
> @@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] = {
>      },
>  };
>
> -/* Read the input value from the argument block; fail the semihosting
> - * call if the memory read fails.
> +/*
> + * Read the input value from the argument block; fail the semihosting
> + * call if the memory read fails. Eventually we could use a generic
> + * CPUState helper function here.
>   */
> +static inline bool is_64bit_semihosting(CPUArchState *env)
> +{
>  #ifdef TARGET_ARM
> +    return is_a64(env);
> +#elif defined(TARGET_RISCV)

can we be consistent about whether we use defined() or not, please ?

> +    return !riscv_cpu_is_32bit(env);
> +#else
> +#error un-handled architecture
> +#endif

Otherwise
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
  2021-03-09 14:17 ` [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO Alex Bennée
  2021-03-09 14:17   ` [Bug 1915925] " Alex Bennée
@ 2021-03-09 16:35   ` Peter Maydell
  2021-03-09 16:35     ` Peter Maydell
  2021-03-09 17:01     ` Alex Bennée
  1 sibling, 2 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-09 16:35 UTC (permalink / raw)
  To: qemu-devel

On Tue, 9 Mar 2021 at 14:23, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> As per the spec:
>
>   the PARAMETER REGISTER contains the address of a pointer to a
>   four-field data block.
>
> So we need to follow the pointer and place the results of SYS_HEAPINFO
> there.
>
> Bug: https://bugs.launchpad.net/bugs/1915925
> Cc: Bug 1915925 <1915925@bugs.launchpad.net>
> Cc: Keith Packard <keithp@keithp.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  semihosting/arm-compat-semi.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
> index 733eea1e2d..2ac9226d29 100644
> --- a/semihosting/arm-compat-semi.c
> +++ b/semihosting/arm-compat-semi.c
> @@ -1210,6 +1210,8 @@ target_ulong do_common_semihosting(CPUState *cs)
>              retvals[2] = rambase + limit; /* Stack base */
>              retvals[3] = rambase; /* Stack limit.  */
>  #endif
> +            /* The result array is pointed to by arg0 */
> +            args = arg0;
>
>              for (i = 0; i < ARRAY_SIZE(retvals); i++) {
>                  bool fail;
> --

No, 'args' is the argument array. That's not the same thing
as the data block we're writing, and we shouldn't reassign
that variable here.

What was wrong with the old arm-semi.c code, which just did
appropriate loads and stores here, and worked fine and was
not buggy ?

thanks
-- PMM

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
  2021-03-09 16:35   ` [Bug 1915925] " Peter Maydell
@ 2021-03-09 16:35     ` Peter Maydell
  2021-03-09 17:01     ` Alex Bennée
  1 sibling, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-09 16:35 UTC (permalink / raw)
  To: Alex Bennée; +Cc: Keith Packard, Bug 1915925, QEMU Developers

On Tue, 9 Mar 2021 at 14:23, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> As per the spec:
>
>   the PARAMETER REGISTER contains the address of a pointer to a
>   four-field data block.
>
> So we need to follow the pointer and place the results of SYS_HEAPINFO
> there.
>
> Bug: https://bugs.launchpad.net/bugs/1915925
> Cc: Bug 1915925 <1915925@bugs.launchpad.net>
> Cc: Keith Packard <keithp@keithp.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  semihosting/arm-compat-semi.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
> index 733eea1e2d..2ac9226d29 100644
> --- a/semihosting/arm-compat-semi.c
> +++ b/semihosting/arm-compat-semi.c
> @@ -1210,6 +1210,8 @@ target_ulong do_common_semihosting(CPUState *cs)
>              retvals[2] = rambase + limit; /* Stack base */
>              retvals[3] = rambase; /* Stack limit.  */
>  #endif
> +            /* The result array is pointed to by arg0 */
> +            args = arg0;
>
>              for (i = 0; i < ARRAY_SIZE(retvals); i++) {
>                  bool fail;
> --

No, 'args' is the argument array. That's not the same thing
as the data block we're writing, and we shouldn't reassign
that variable here.

What was wrong with the old arm-semi.c code, which just did
appropriate loads and stores here, and worked fine and was
not buggy ?

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
  2021-03-09 16:35   ` [Bug 1915925] " Peter Maydell
  2021-03-09 16:35     ` Peter Maydell
@ 2021-03-09 17:01     ` Alex Bennée
  2021-03-09 17:01       ` [Bug 1915925] " Alex Bennée
  1 sibling, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:01 UTC (permalink / raw)
  To: Peter Maydell; +Cc: Keith Packard, Bug 1915925, QEMU Developers


Peter Maydell <peter.maydell@linaro.org> writes:

> On Tue, 9 Mar 2021 at 14:23, Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>> As per the spec:
>>
>>   the PARAMETER REGISTER contains the address of a pointer to a
>>   four-field data block.
>>
>> So we need to follow the pointer and place the results of SYS_HEAPINFO
>> there.
>>
>> Bug: https://bugs.launchpad.net/bugs/1915925
>> Cc: Bug 1915925 <1915925@bugs.launchpad.net>
>> Cc: Keith Packard <keithp@keithp.com>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>  semihosting/arm-compat-semi.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
>> index 733eea1e2d..2ac9226d29 100644
>> --- a/semihosting/arm-compat-semi.c
>> +++ b/semihosting/arm-compat-semi.c
>> @@ -1210,6 +1210,8 @@ target_ulong do_common_semihosting(CPUState *cs)
>>              retvals[2] = rambase + limit; /* Stack base */
>>              retvals[3] = rambase; /* Stack limit.  */
>>  #endif
>> +            /* The result array is pointed to by arg0 */
>> +            args = arg0;
>>
>>              for (i = 0; i < ARRAY_SIZE(retvals); i++) {
>>                  bool fail;
>> --
>
> No, 'args' is the argument array. That's not the same thing
> as the data block we're writing, and we shouldn't reassign
> that variable here.
>
> What was wrong with the old arm-semi.c code, which just did
> appropriate loads and stores here, and worked fine and was
> not buggy ?

I was just trying avoid repeating too much verbiage. But OK I've
reverted to the original code with the new helper:

            for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                bool fail;

                if (is_64bit_semihosting(env)) {
                    fail = put_user_u64(retvals[i], arg0 + i * 8);
                } else {
                    fail = put_user_u32(retvals[i], arg0 + i * 4);
                }

                if (fail) {
                    /* Couldn't write back to argument block */
                    errno = EFAULT;
                    return set_swi_errno(cs, -1);
                }
            }
            return 0;


>
> thanks
> -- PMM


-- 
Alex Bennée


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
  2021-03-09 17:01     ` Alex Bennée
@ 2021-03-09 17:01       ` Alex Bennée
  0 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:01 UTC (permalink / raw)
  To: qemu-devel

Peter Maydell <peter.maydell@linaro.org> writes:

> On Tue, 9 Mar 2021 at 14:23, Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>> As per the spec:
>>
>>   the PARAMETER REGISTER contains the address of a pointer to a
>>   four-field data block.
>>
>> So we need to follow the pointer and place the results of SYS_HEAPINFO
>> there.
>>
>> Bug: https://bugs.launchpad.net/bugs/1915925
>> Cc: Bug 1915925 <1915925@bugs.launchpad.net>
>> Cc: Keith Packard <keithp@keithp.com>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>  semihosting/arm-compat-semi.c | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
>> index 733eea1e2d..2ac9226d29 100644
>> --- a/semihosting/arm-compat-semi.c
>> +++ b/semihosting/arm-compat-semi.c
>> @@ -1210,6 +1210,8 @@ target_ulong do_common_semihosting(CPUState *cs)
>>              retvals[2] = rambase + limit; /* Stack base */
>>              retvals[3] = rambase; /* Stack limit.  */
>>  #endif
>> +            /* The result array is pointed to by arg0 */
>> +            args = arg0;
>>
>>              for (i = 0; i < ARRAY_SIZE(retvals); i++) {
>>                  bool fail;
>> --
>
> No, 'args' is the argument array. That's not the same thing
> as the data block we're writing, and we shouldn't reassign
> that variable here.
>
> What was wrong with the old arm-semi.c code, which just did
> appropriate loads and stores here, and worked fine and was
> not buggy ?

I was just trying avoid repeating too much verbiage. But OK I've
reverted to the original code with the new helper:

            for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                bool fail;

                if (is_64bit_semihosting(env)) {
                    fail = put_user_u64(retvals[i], arg0 + i * 8);
                } else {
                    fail = put_user_u32(retvals[i], arg0 + i * 4);
                }

                if (fail) {
                    /* Couldn't write back to argument block */
                    errno = EFAULT;
                    return set_swi_errno(cs, -1);
                }
            }
            return 0;


>
> thanks
> -- PMM


-- 
Alex Bennée

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH  v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-09 14:17 ` [PATCH v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
  2021-03-09 16:33   ` Peter Maydell
@ 2021-03-09 17:02   ` Keith Packard via
  2021-03-09 17:24     ` Alex Bennée
  1 sibling, 1 reply; 149+ messages in thread
From: Keith Packard via @ 2021-03-09 17:02 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel; +Cc: Alex Bennée

[-- Attachment #1: Type: text/plain, Size: 326 bytes --]

Alex Bennée <alex.bennee@linaro.org> writes:

> Note: we aren't currently testing riscv32 due to missing toolchain for
> check-tcg tests.

That's surprising -- the usual risc-v toolchain supports both 64- and
32- bit targets.

Othewise, this patch is

Reviewed-by: Keith Packard <keithp@keithp.com>

-- 
-keith

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^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH  v2 4/4] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-09 14:17 ` [PATCH v2 4/4] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
@ 2021-03-09 17:08   ` Keith Packard via
  0 siblings, 0 replies; 149+ messages in thread
From: Keith Packard via @ 2021-03-09 17:08 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel; +Cc: Alex Bennée

[-- Attachment #1: Type: text/plain, Size: 1221 bytes --]

Alex Bennée <alex.bennee@linaro.org> writes:

> +    asprintf(&heap_info, "heap: %p -> %p\n", info.heap_base, info.heap_limit);
> +    __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
> +    if (info.heap_base != brk) {

That requires qemu to know a lot about the run-time environment, which
it rarely does in my experience of embedded systems...

All I've been able to check is whether the heap base is not below the
heap limit and the stack base is not above the stack limit. Not exactly
great validation, but at least it caught the case where I set the stack
limit to the top of the stack?

	if (block.heap_base != NULL && block.heap_limit != NULL) {
		/* Error if heap base is above limit */
		if ((uintptr_t) block.heap_base >= (uintptr_t) block.heap_limit) {
			printf("heap base %p >= heap_limit %p\n",
			       block.heap_base, block.heap_limit);
			exit(1);
		}
	}
	if (block.stack_base != NULL && block.stack_limit != NULL) {
		/* Error if stack base is below limit */
		if ((uintptr_t) block.stack_base < (uintptr_t) block.stack_limit) {
			printf("stack base %p < stack_limit %p\n",
			       block.stack_base, block.stack_limit);
			exit(2);
		}
	}
	exit(0);


-- 
-keith

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^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH  v3 0/4] semihosting/next (SYS_HEAPINFO)
@ 2021-03-09 17:21 Alex Bennée
  2021-03-09 17:21 ` [PATCH v3 1/4] semihosting: move semihosting tests to multiarch Alex Bennée
                   ` (3 more replies)
  0 siblings, 4 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:21 UTC (permalink / raw)
  To: qemu-devel; +Cc: keithp, Alex Bennée

Hi,

Hopefully the final revision, instead of hacking about args to
reverted to the orignal code (with minor tweaks for args). Still based
on my in-flight PR:

  pull-testing-docs-xen-updates-080321-1

which already moves the semihosting code out of hw/. Please review:

 - tests/tcg: add HeapInfo checking to semihosting test
 - semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
 - semihosting/arm-compat-semi: unify GET/SET_ARG helpers
 - semihosting: move semihosting tests to multiarch


Alex Bennée (4):
  semihosting: move semihosting tests to multiarch
  semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  tests/tcg: add HeapInfo checking to semihosting test

 tests/tcg/aarch64/semicall.h                  | 18 ++++++
 tests/tcg/arm/semicall.h                      | 15 +----
 tests/tcg/riscv64/semicall.h                  | 22 +++++++
 semihosting/arm-compat-semi.c                 | 62 +++++++------------
 tests/tcg/arm/semihosting.c                   | 26 --------
 .../arm-compat-semi}/semiconsole.c            |  2 +
 .../multiarch/arm-compat-semi/semihosting.c   | 62 +++++++++++++++++++
 tests/tcg/Makefile.target                     |  3 +
 tests/tcg/aarch64/Makefile.target             | 18 ------
 tests/tcg/arm/Makefile.target                 | 16 +----
 tests/tcg/multiarch/Makefile.target           | 31 ++++++++++
 11 files changed, 165 insertions(+), 110 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 delete mode 100644 tests/tcg/arm/semihosting.c
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 create mode 100644 tests/tcg/multiarch/arm-compat-semi/semihosting.c

-- 
2.20.1



^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH  v3 1/4] semihosting: move semihosting tests to multiarch
  2021-03-09 17:21 [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Alex Bennée
@ 2021-03-09 17:21 ` Alex Bennée
  2021-03-09 17:21 ` [PATCH v3 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:21 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, keithp, open list:ARM TCG CPUs, Alex Bennée,
	Philippe Mathieu-Daudé

It may be arm-compat-semihosting but more than one architecture uses
it so lets move the tests into the multiarch area. We gate it on the
feature and split the semicall.h header between the arches.

Also clean-up a bit of the Makefile messing about to one common set of
runners.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/tcg/aarch64/semicall.h                  | 18 +++++++++++
 tests/tcg/arm/semicall.h                      | 15 +--------
 tests/tcg/riscv64/semicall.h                  | 22 +++++++++++++
 .../arm-compat-semi}/semiconsole.c            |  2 ++
 .../arm-compat-semi}/semihosting.c            |  5 ++-
 tests/tcg/Makefile.target                     |  3 ++
 tests/tcg/aarch64/Makefile.target             | 18 -----------
 tests/tcg/arm/Makefile.target                 | 16 ++--------
 tests/tcg/multiarch/Makefile.target           | 31 +++++++++++++++++++
 9 files changed, 83 insertions(+), 47 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semihosting.c (85%)

diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h
new file mode 100644
index 0000000000..8a3fce35c5
--- /dev/null
+++ b/tests/tcg/aarch64/semicall.h
@@ -0,0 +1,18 @@
+/*
+ * Semihosting Tests - AArch64 helper
+ *
+ * Copyright (c) 2019
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("x0") = type;
+    register uintptr_t a0 asm("x1") = arg0;
+    asm("hlt 0xf000"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h
index d4f6818192..ad8ac51310 100644
--- a/tests/tcg/arm/semicall.h
+++ b/tests/tcg/arm/semicall.h
@@ -1,5 +1,5 @@
 /*
- * Semihosting Tests
+ * Semihosting Tests - ARM Helper
  *
  * Copyright (c) 2019
  * Written by Alex Bennée <alex.bennee@linaro.org>
@@ -7,13 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
-#define SYS_WRITE0      0x04
-#define SYS_READC       0x07
-#define SYS_REPORTEXC   0x18
-
 uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 {
-#if defined(__arm__)
     register uintptr_t t asm("r0") = type;
     register uintptr_t a0 asm("r1") = arg0;
 #ifdef __thumb__
@@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 #endif
     asm(SVC : "=r" (t)
         : "r" (t), "r" (a0));
-#else
-    register uintptr_t t asm("x0") = type;
-    register uintptr_t a0 asm("x1") = arg0;
-    asm("hlt 0xf000"
-        : "=r" (t)
-        : "r" (t), "r" (a0));
-#endif
-
     return t;
 }
diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h
new file mode 100644
index 0000000000..f8c88f32dc
--- /dev/null
+++ b/tests/tcg/riscv64/semicall.h
@@ -0,0 +1,22 @@
+/*
+ * Semihosting Tests - RiscV64 Helper
+ *
+ * Copyright (c) 2021
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("a0") = type;
+    register uintptr_t a0 asm("a1") = arg0;
+    asm(".option norvc\n\t"
+        ".balign 16\n\t"
+        "slli zero, zero, 0x1f\n\t"
+        "ebreak\n\t"
+        "srai zero, zero, 0x7\n\t"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
similarity index 93%
rename from tests/tcg/arm/semiconsole.c
rename to tests/tcg/multiarch/arm-compat-semi/semiconsole.c
index 6ef0bd2450..1d82efc589 100644
--- a/tests/tcg/arm/semiconsole.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_READC       0x07
+
 #include <stdio.h>
 #include <stdint.h>
 #include "semicall.h"
diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
similarity index 85%
rename from tests/tcg/arm/semihosting.c
rename to tests/tcg/multiarch/arm-compat-semi/semihosting.c
index 33faac9916..b3fd16cd12 100644
--- a/tests/tcg/arm/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -7,12 +7,15 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_WRITE0      0x04
+#define SYS_REPORTEXC   0x18
+
 #include <stdint.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
 {
-#if defined(__arm__)
+#if UINTPTR_MAX == UINT32_MAX
     uintptr_t exit_code = 0x20026;
 #else
     uintptr_t exit_block[2] = {0x20026, 0};
diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target
index 24d75a5801..cab8c6b3a2 100644
--- a/tests/tcg/Makefile.target
+++ b/tests/tcg/Makefile.target
@@ -32,6 +32,9 @@
 all:
 -include ../../../config-host.mak
 -include ../config-$(TARGET).mak
+ifeq ($(CONFIG_USER_ONLY),y)
+-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak
+endif
 
 # for including , in command strings
 COMMA := ,
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index bf53ad0087..56e48f4b34 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -41,24 +41,6 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4
 mte-%: CFLAGS += -march=armv8.5-a+memtag
 endif
 
-# Semihosting smoke test for linux-user
-AARCH64_TESTS += semihosting
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
-
-run-plugin-semihosting-with-%:
-	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
-		 $(call strip-plugin,$<) 2> $<.err, \
-		"$< on $(TARGET_NAME) with $*")
-
-AARCH64_TESTS += semiconsole
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
 ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
 # System Registers Tests
 AARCH64_TESTS += sysregs
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index ec95156562..1deda384df 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -30,37 +30,25 @@ run-fcvt: fcvt
 	$(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref)
 
 # Semihosting smoke test for linux-user
-ARM_TESTS += semihosting
 semihosting: CFLAGS += -mthumb
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
 ARM_TESTS += semihosting-arm
 semihosting-arm: CFLAGS += -marm
-semihosting-arm: semihosting.c
-	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semihosting-arm: semihosting-arm
 	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
-run-plugin-semihosting-with-%:
+run-plugin-semihosting-arm-with-%:
 	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
 		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
 		 $(call strip-plugin,$<) 2> $<.err, \
 		"$< on $(TARGET_NAME) with $*")
 
-ARM_TESTS += semiconsole semiconsole-arm
+ARM_TESTS += semiconsole-arm
 
 semiconsole: CFLAGS += -mthumb
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
 
 semiconsole-arm: CFLAGS += -marm
-semiconsole-arm: semiconsole.c
-	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semiconsole-arm: semiconsole-arm
 	$(call skip-test, $<, "MANUAL ONLY")
diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target
index abbdb2e126..a3a751723d 100644
--- a/tests/tcg/multiarch/Makefile.target
+++ b/tests/tcg/multiarch/Makefile.target
@@ -69,6 +69,37 @@ run-gdbstub-%:
 endif
 EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read
 
+# ARM Compatible Semi Hosting Tests
+#
+# Despite having ARM in the name we actually have several
+# architectures that implement it. We gate the tests on the feature
+# appearing in config.
+#
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+VPATH += $(MULTIARCH_SRC)/arm-compat-semi
+
+# Add -I path back to TARGET_NAME for semicall.h
+semihosting: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semihosting: semihosting
+	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
+
+run-plugin-semihosting-with-%:
+	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
+		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
+		 $(call strip-plugin,$<) 2> $<.err, \
+		"$< on $(TARGET_NAME) with $*")
+
+semiconsole: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semiconsole: semiconsole
+	$(call skip-test, $<, "MANUAL ONLY")
+
+run-plugin-semiconsole-with-%:
+	$(call skip-test, $<, "MANUAL ONLY")
+
+TESTS += semihosting semiconsole
+endif
 
 # Update TESTS
 TESTS += $(MULTIARCH_TESTS)
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v3 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-09 17:21 [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Alex Bennée
  2021-03-09 17:21 ` [PATCH v3 1/4] semihosting: move semihosting tests to multiarch Alex Bennée
@ 2021-03-09 17:21 ` Alex Bennée
  2021-03-09 17:21 ` [PATCH v3 4/4] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
  2021-03-11 13:32 ` [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Peter Maydell
  3 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:21 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, keithp, Alex Bennée

From the semihosting point of view what we want to know is the current
mode of the processor. Unify this into a single helper and allow us to
use the same GET/SET_ARG helpers for the rest of the code. Having the
helper will also be useful later.

Note: we aren't currently testing riscv32 due to missing toolchain for
check-tcg tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

---
v3
  - consistent #ifdeffery
---
 semihosting/arm-compat-semi.c | 56 ++++++++++++-----------------------
 1 file changed, 19 insertions(+), 37 deletions(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 94950b6c56..0f0e129a7c 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] = {
     },
 };
 
-/* Read the input value from the argument block; fail the semihosting
- * call if the memory read fails.
+/*
+ * Read the input value from the argument block; fail the semihosting
+ * call if the memory read fails. Eventually we could use a generic
+ * CPUState helper function here.
  */
-#ifdef TARGET_ARM
+static inline bool is_64bit_semihosting(CPUArchState *env)
+{
+#if defined(TARGET_ARM)
+    return is_a64(env);
+#elif defined(TARGET_RISCV)
+    return !riscv_cpu_is_32bit(env);
+#else
+#error un-handled architecture
+#endif
+}
+
+
 #define GET_ARG(n) do {                                 \
-    if (is_a64(env)) {                                  \
+    if (is_64bit_semihosting(env)) {                    \
         if (get_user_u64(arg ## n, args + (n) * 8)) {   \
             errno = EFAULT;                             \
-            return set_swi_errno(cs, -1);              \
+            return set_swi_errno(cs, -1);               \
         }                                               \
     } else {                                            \
         if (get_user_u32(arg ## n, args + (n) * 4)) {   \
@@ -786,41 +799,10 @@ static const GuestFDFunctions guestfd_fns[] = {
 } while (0)
 
 #define SET_ARG(n, val)                                 \
-    (is_a64(env) ?                                      \
+    (is_64bit_semihosting(env) ?                        \
      put_user_u64(val, args + (n) * 8) :                \
      put_user_u32(val, args + (n) * 4))
-#endif
 
-#ifdef TARGET_RISCV
-
-/*
- * get_user_ual is defined as get_user_u32 in softmmu-semi.h,
- * we need a macro that fetches a target_ulong
- */
-#define get_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     get_user_u64(arg, p) :                     \
-     get_user_u32(arg, p))
-
-/*
- * put_user_ual is defined as put_user_u32 in softmmu-semi.h,
- * we need a macro that stores a target_ulong
- */
-#define put_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     put_user_u64(arg, p) :                     \
-     put_user_u32(arg, p))
-
-#define GET_ARG(n) do {                                                 \
-        if (get_user_utl(arg ## n, args + (n) * sizeof(target_ulong))) { \
-            errno = EFAULT;                                             \
-            return set_swi_errno(cs, -1);                              \
-        }                                                               \
-    } while (0)
-
-#define SET_ARG(n, val)                                 \
-    put_user_utl(val, args + (n) * sizeof(target_ulong))
-#endif
 
 /*
  * Do a semihosting call.
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [Bug 1915925] [PATCH v3 3/4] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
                   ` (3 preceding siblings ...)
  2021-03-05 13:33 ` Alex Bennée
@ 2021-03-09 17:21 ` Alex Bennée
  2021-03-09 17:21   ` Alex Bennée
  2021-03-15 12:46 ` [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address Alex Bennée
                   ` (2 subsequent siblings)
  7 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:21 UTC (permalink / raw)
  To: qemu-devel

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Bug: https://bugs.launchpad.net/bugs/1915925
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v3
  - just revert the old behaviour
---
 semihosting/arm-compat-semi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v3 3/4] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-09 17:21 ` [Bug 1915925] [PATCH v3 3/4] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-09 17:21   ` Alex Bennée
  0 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:21 UTC (permalink / raw)
  To: qemu-devel; +Cc: Bug 1915925, keithp, Alex Bennée

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Bug: https://bugs.launchpad.net/bugs/1915925
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v3
  - just revert the old behaviour
---
 semihosting/arm-compat-semi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v3 4/4] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-09 17:21 [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Alex Bennée
  2021-03-09 17:21 ` [PATCH v3 1/4] semihosting: move semihosting tests to multiarch Alex Bennée
  2021-03-09 17:21 ` [PATCH v3 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
@ 2021-03-09 17:21 ` Alex Bennée
  2021-03-11 13:32 ` [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Peter Maydell
  3 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:21 UTC (permalink / raw)
  To: qemu-devel; +Cc: keithp, Alex Bennée

Query the SYS_HEAPINFO semicall and do some basic verification of the
information via libc calls.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 .../multiarch/arm-compat-semi/semihosting.c   | 35 ++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
index b3fd16cd12..5fa3c0a82d 100644
--- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -8,9 +8,16 @@
  */
 
 #define SYS_WRITE0      0x04
+#define SYS_HEAPINFO    0x16
 #define SYS_REPORTEXC   0x18
 
+#define _GNU_SOURCE  /* asprintf is a GNU extension */
+
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
@@ -21,8 +28,34 @@ int main(int argc, char *argv[argc])
     uintptr_t exit_block[2] = {0x20026, 0};
     uintptr_t exit_code = (uintptr_t) &exit_block;
 #endif
+    struct {
+        void *heap_base;
+        void *heap_limit;
+        void *stack_base;
+        void *stack_limit;
+    } info;
+    void *ptr_to_info = (void *) &info;
+    char *heap_info, *stack_info;
+    void *brk = sbrk(0);
+
+    __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n");
+
+    memset(&info, 0, sizeof(info));
+    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
+
+    asprintf(&heap_info, "heap: %p -> %p\n", info.heap_base, info.heap_limit);
+    __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
+    if (info.heap_base != brk) {
+        sprintf(heap_info, "heap mismatch: %p\n", brk);
+        __semi_call(SYS_WRITE0, (uintptr_t) heap_info);
+        return -1;
+    }
+
+    asprintf(&stack_info, "stack: %p -> %p\n", info.stack_base, info.stack_limit);
+    __semi_call(SYS_WRITE0, (uintptr_t) stack_info);
+    free(heap_info);
+    free(stack_info);
 
-    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
     __semi_call(SYS_REPORTEXC, exit_code);
     /* if we get here we failed */
     return -1;
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* Re: [PATCH  v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-09 17:02   ` Keith Packard via
@ 2021-03-09 17:24     ` Alex Bennée
  0 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-09 17:24 UTC (permalink / raw)
  To: Keith Packard; +Cc: qemu-devel


Keith Packard <keithp@keithp.com> writes:

> Alex Bennée <alex.bennee@linaro.org> writes:
>
>> Note: we aren't currently testing riscv32 due to missing toolchain for
>> check-tcg tests.
>
> That's surprising -- the usual risc-v toolchain supports both 64- and
> 32- bit targets.

If you can give me the runes for it I can tweak check-tcg to generate
the 32 bit binaries.

>
> Othewise, this patch is
>
> Reviewed-by: Keith Packard <keithp@keithp.com>


-- 
Alex Bennée


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO)
  2021-03-09 17:21 [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Alex Bennée
                   ` (2 preceding siblings ...)
  2021-03-09 17:21 ` [PATCH v3 4/4] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
@ 2021-03-11 13:32 ` Peter Maydell
  2021-03-11 20:05   ` Alex Bennée
  3 siblings, 1 reply; 149+ messages in thread
From: Peter Maydell @ 2021-03-11 13:32 UTC (permalink / raw)
  To: Alex Bennée; +Cc: Keith Packard, QEMU Developers

On Tue, 9 Mar 2021 at 19:23, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> Hi,
>
> Hopefully the final revision, instead of hacking about args to
> reverted to the orignal code (with minor tweaks for args). Still based
> on my in-flight PR:
>
>   pull-testing-docs-xen-updates-080321-1
>
> which already moves the semihosting code out of hw/. Please review:
>
>  - tests/tcg: add HeapInfo checking to semihosting test
>  - semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
>  - semihosting/arm-compat-semi: unify GET/SET_ARG helpers
>  - semihosting: move semihosting tests to multiarch
>
>
> Alex Bennée (4):
>   semihosting: move semihosting tests to multiarch
>   semihosting/arm-compat-semi: unify GET/SET_ARG helpers
>   semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
>   tests/tcg: add HeapInfo checking to semihosting test

Patch 3 never made it to the list or to patchew:

https://patchew.org/QEMU/20210309172127.20470-1-alex.bennee@linaro.org/

Could you try resending the series, maybe ?

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO)
  2021-03-11 13:32 ` [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Peter Maydell
@ 2021-03-11 20:05   ` Alex Bennée
  0 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-11 20:05 UTC (permalink / raw)
  To: Peter Maydell; +Cc: Keith Packard, QEMU Developers


Peter Maydell <peter.maydell@linaro.org> writes:

> On Tue, 9 Mar 2021 at 19:23, Alex Bennée <alex.bennee@linaro.org> wrote:
>>
>> Hi,
>>
>> Hopefully the final revision, instead of hacking about args to
>> reverted to the orignal code (with minor tweaks for args). Still based
>> on my in-flight PR:
>>
>>   pull-testing-docs-xen-updates-080321-1
>>
>> which already moves the semihosting code out of hw/. Please review:
>>
>>  - tests/tcg: add HeapInfo checking to semihosting test
>>  - semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO
>>  - semihosting/arm-compat-semi: unify GET/SET_ARG helpers
>>  - semihosting: move semihosting tests to multiarch
>>
>>
>> Alex Bennée (4):
>>   semihosting: move semihosting tests to multiarch
>>   semihosting/arm-compat-semi: unify GET/SET_ARG helpers
>>   semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
>>   tests/tcg: add HeapInfo checking to semihosting test
>
> Patch 3 never made it to the list or to patchew:

It's on the qemu-devel archive:

  https://lists.gnu.org/archive/html/qemu-devel/2021-03/msg03051.html

AKA:

  To: qemu-devel@nongnu.org
  Cc: keithp@keithp.com,
          =?UTF-8?q?Alex=20Benn=C3=A9e?= <alex.bennee@linaro.org>,
          Bug 1915925 <1915925@bugs.launchpad.net>
  Subject: [PATCH  v3 3/4] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  Date: Tue,  9 Mar 2021 17:21:26 +0000
  Message-Id: <20210309172127.20470-4-alex.bennee@linaro.org>
  X-Mailer: git-send-email 2.20.1
  In-Reply-To: <20210309172127.20470-1-alex.bennee@linaro.org>
  References: <20210309172127.20470-1-alex.bennee@linaro.org>

>
> https://patchew.org/QEMU/20210309172127.20470-1-alex.bennee@linaro.org/
>
> Could you try resending the series, maybe ?

OK

>
> thanks
> -- PMM


-- 
Alex Bennée


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH  v5 0/5] semihosting/next (SYS_HEAPINFO)
@ 2021-03-12 10:20 Alex Bennée
  2021-03-12 10:20 ` [PATCH v5 1/5] semihosting: move semihosting tests to multiarch Alex Bennée
                   ` (4 more replies)
  0 siblings, 5 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 10:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, keithp, qemu-arm, qemu-riscv

Hi,

Change from the last version include tweaking the test to be a little
less asnprintf heavy and also don't rely on brk() to do it's job. It
also threw up a linux-user failure for RiscV which didn't have the
needed TaskState info set. The series now applies cleanly to master.

The following patches need review:

 - tests/tcg: add HeapInfo checking to semihosting test
 - linux-user/riscv: initialise the TaskState heap/stack info
 - semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
 - semihosting: move semihosting tests to multiarch

Alex Bennée (5):
  semihosting: move semihosting tests to multiarch
  semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  linux-user/riscv: initialise the TaskState heap/stack info
  tests/tcg: add HeapInfo checking to semihosting test

 tests/tcg/aarch64/semicall.h                  | 18 +++++
 tests/tcg/arm/semicall.h                      | 15 +---
 tests/tcg/riscv64/semicall.h                  | 22 ++++++
 linux-user/riscv/cpu_loop.c                   |  5 ++
 semihosting/arm-compat-semi.c                 | 62 +++++++---------
 tests/tcg/arm/semihosting.c                   | 26 -------
 .../arm-compat-semi}/semiconsole.c            |  2 +
 .../multiarch/arm-compat-semi/semihosting.c   | 71 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 tests/tcg/Makefile.target                     |  3 +
 tests/tcg/aarch64/Makefile.target             | 18 -----
 tests/tcg/arm/Makefile.target                 | 16 +----
 tests/tcg/multiarch/Makefile.target           | 31 ++++++++
 13 files changed, 180 insertions(+), 110 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 delete mode 100644 tests/tcg/arm/semihosting.c
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 create mode 100644 tests/tcg/multiarch/arm-compat-semi/semihosting.c

-- 
2.20.1



^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH  v5 1/5] semihosting: move semihosting tests to multiarch
  2021-03-12 10:20 [PATCH v5 0/5] semihosting/next (SYS_HEAPINFO) Alex Bennée
@ 2021-03-12 10:20 ` Alex Bennée
  2021-03-12 10:20 ` [PATCH v5 2/5] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 10:20 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, keithp, qemu-riscv, Philippe Mathieu-Daudé,
	qemu-arm, Alex Bennée

It may be arm-compat-semihosting but more than one architecture uses
it so lets move the tests into the multiarch area. We gate it on the
feature and split the semicall.h header between the arches.

Also clean-up a bit of the Makefile messing about to one common set of
runners.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v5
  - add to MAINTAINERS
---
 tests/tcg/aarch64/semicall.h                  | 18 +++++++++++
 tests/tcg/arm/semicall.h                      | 15 +--------
 tests/tcg/riscv64/semicall.h                  | 22 +++++++++++++
 .../arm-compat-semi}/semiconsole.c            |  2 ++
 .../arm-compat-semi}/semihosting.c            |  5 ++-
 MAINTAINERS                                   |  1 +
 tests/tcg/Makefile.target                     |  3 ++
 tests/tcg/aarch64/Makefile.target             | 18 -----------
 tests/tcg/arm/Makefile.target                 | 16 ++--------
 tests/tcg/multiarch/Makefile.target           | 31 +++++++++++++++++++
 10 files changed, 84 insertions(+), 47 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semihosting.c (85%)

diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h
new file mode 100644
index 0000000000..8a3fce35c5
--- /dev/null
+++ b/tests/tcg/aarch64/semicall.h
@@ -0,0 +1,18 @@
+/*
+ * Semihosting Tests - AArch64 helper
+ *
+ * Copyright (c) 2019
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("x0") = type;
+    register uintptr_t a0 asm("x1") = arg0;
+    asm("hlt 0xf000"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h
index d4f6818192..ad8ac51310 100644
--- a/tests/tcg/arm/semicall.h
+++ b/tests/tcg/arm/semicall.h
@@ -1,5 +1,5 @@
 /*
- * Semihosting Tests
+ * Semihosting Tests - ARM Helper
  *
  * Copyright (c) 2019
  * Written by Alex Bennée <alex.bennee@linaro.org>
@@ -7,13 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
-#define SYS_WRITE0      0x04
-#define SYS_READC       0x07
-#define SYS_REPORTEXC   0x18
-
 uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 {
-#if defined(__arm__)
     register uintptr_t t asm("r0") = type;
     register uintptr_t a0 asm("r1") = arg0;
 #ifdef __thumb__
@@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 #endif
     asm(SVC : "=r" (t)
         : "r" (t), "r" (a0));
-#else
-    register uintptr_t t asm("x0") = type;
-    register uintptr_t a0 asm("x1") = arg0;
-    asm("hlt 0xf000"
-        : "=r" (t)
-        : "r" (t), "r" (a0));
-#endif
-
     return t;
 }
diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h
new file mode 100644
index 0000000000..f8c88f32dc
--- /dev/null
+++ b/tests/tcg/riscv64/semicall.h
@@ -0,0 +1,22 @@
+/*
+ * Semihosting Tests - RiscV64 Helper
+ *
+ * Copyright (c) 2021
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("a0") = type;
+    register uintptr_t a0 asm("a1") = arg0;
+    asm(".option norvc\n\t"
+        ".balign 16\n\t"
+        "slli zero, zero, 0x1f\n\t"
+        "ebreak\n\t"
+        "srai zero, zero, 0x7\n\t"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
similarity index 93%
rename from tests/tcg/arm/semiconsole.c
rename to tests/tcg/multiarch/arm-compat-semi/semiconsole.c
index 6ef0bd2450..1d82efc589 100644
--- a/tests/tcg/arm/semiconsole.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_READC       0x07
+
 #include <stdio.h>
 #include <stdint.h>
 #include "semicall.h"
diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
similarity index 85%
rename from tests/tcg/arm/semihosting.c
rename to tests/tcg/multiarch/arm-compat-semi/semihosting.c
index 33faac9916..b3fd16cd12 100644
--- a/tests/tcg/arm/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -7,12 +7,15 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_WRITE0      0x04
+#define SYS_REPORTEXC   0x18
+
 #include <stdint.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
 {
-#if defined(__arm__)
+#if UINTPTR_MAX == UINT32_MAX
     uintptr_t exit_code = 0x20026;
 #else
     uintptr_t exit_block[2] = {0x20026, 0};
diff --git a/MAINTAINERS b/MAINTAINERS
index 8e9f0d591e..0af92aea8f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3264,6 +3264,7 @@ M: Alex Bennée <alex.bennee@linaro.org>
 S: Maintained
 F: semihosting/
 F: include/semihosting/
+F: tests/tcg/multiarch/arm-compat-semi/
 
 Multi-process QEMU
 M: Elena Ufimtseva <elena.ufimtseva@oracle.com>
diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target
index 24d75a5801..cab8c6b3a2 100644
--- a/tests/tcg/Makefile.target
+++ b/tests/tcg/Makefile.target
@@ -32,6 +32,9 @@
 all:
 -include ../../../config-host.mak
 -include ../config-$(TARGET).mak
+ifeq ($(CONFIG_USER_ONLY),y)
+-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak
+endif
 
 # for including , in command strings
 COMMA := ,
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index bf53ad0087..56e48f4b34 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -41,24 +41,6 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4
 mte-%: CFLAGS += -march=armv8.5-a+memtag
 endif
 
-# Semihosting smoke test for linux-user
-AARCH64_TESTS += semihosting
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
-
-run-plugin-semihosting-with-%:
-	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
-		 $(call strip-plugin,$<) 2> $<.err, \
-		"$< on $(TARGET_NAME) with $*")
-
-AARCH64_TESTS += semiconsole
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
 ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
 # System Registers Tests
 AARCH64_TESTS += sysregs
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index ec95156562..1deda384df 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -30,37 +30,25 @@ run-fcvt: fcvt
 	$(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref)
 
 # Semihosting smoke test for linux-user
-ARM_TESTS += semihosting
 semihosting: CFLAGS += -mthumb
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
 ARM_TESTS += semihosting-arm
 semihosting-arm: CFLAGS += -marm
-semihosting-arm: semihosting.c
-	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semihosting-arm: semihosting-arm
 	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
-run-plugin-semihosting-with-%:
+run-plugin-semihosting-arm-with-%:
 	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
 		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
 		 $(call strip-plugin,$<) 2> $<.err, \
 		"$< on $(TARGET_NAME) with $*")
 
-ARM_TESTS += semiconsole semiconsole-arm
+ARM_TESTS += semiconsole-arm
 
 semiconsole: CFLAGS += -mthumb
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
 
 semiconsole-arm: CFLAGS += -marm
-semiconsole-arm: semiconsole.c
-	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semiconsole-arm: semiconsole-arm
 	$(call skip-test, $<, "MANUAL ONLY")
diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target
index abbdb2e126..a3a751723d 100644
--- a/tests/tcg/multiarch/Makefile.target
+++ b/tests/tcg/multiarch/Makefile.target
@@ -69,6 +69,37 @@ run-gdbstub-%:
 endif
 EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read
 
+# ARM Compatible Semi Hosting Tests
+#
+# Despite having ARM in the name we actually have several
+# architectures that implement it. We gate the tests on the feature
+# appearing in config.
+#
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+VPATH += $(MULTIARCH_SRC)/arm-compat-semi
+
+# Add -I path back to TARGET_NAME for semicall.h
+semihosting: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semihosting: semihosting
+	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
+
+run-plugin-semihosting-with-%:
+	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
+		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
+		 $(call strip-plugin,$<) 2> $<.err, \
+		"$< on $(TARGET_NAME) with $*")
+
+semiconsole: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semiconsole: semiconsole
+	$(call skip-test, $<, "MANUAL ONLY")
+
+run-plugin-semiconsole-with-%:
+	$(call skip-test, $<, "MANUAL ONLY")
+
+TESTS += semihosting semiconsole
+endif
 
 # Update TESTS
 TESTS += $(MULTIARCH_TESTS)
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v5 2/5] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-12 10:20 [PATCH v5 0/5] semihosting/next (SYS_HEAPINFO) Alex Bennée
  2021-03-12 10:20 ` [PATCH v5 1/5] semihosting: move semihosting tests to multiarch Alex Bennée
@ 2021-03-12 10:20 ` Alex Bennée
  2021-03-12 10:20 ` [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 10:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, keithp, qemu-arm, qemu-riscv, Peter Maydell

From the semihosting point of view what we want to know is the current
mode of the processor. Unify this into a single helper and allow us to
use the same GET/SET_ARG helpers for the rest of the code. Having the
helper will also be useful later.

Note: we aren't currently testing riscv32 due to missing toolchain for
check-tcg tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Keith Packard <keithp@keithp.com>

---
v3
  - consistent #ifdeffery
---
 semihosting/arm-compat-semi.c | 56 ++++++++++++-----------------------
 1 file changed, 19 insertions(+), 37 deletions(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 94950b6c56..0f0e129a7c 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] = {
     },
 };
 
-/* Read the input value from the argument block; fail the semihosting
- * call if the memory read fails.
+/*
+ * Read the input value from the argument block; fail the semihosting
+ * call if the memory read fails. Eventually we could use a generic
+ * CPUState helper function here.
  */
-#ifdef TARGET_ARM
+static inline bool is_64bit_semihosting(CPUArchState *env)
+{
+#if defined(TARGET_ARM)
+    return is_a64(env);
+#elif defined(TARGET_RISCV)
+    return !riscv_cpu_is_32bit(env);
+#else
+#error un-handled architecture
+#endif
+}
+
+
 #define GET_ARG(n) do {                                 \
-    if (is_a64(env)) {                                  \
+    if (is_64bit_semihosting(env)) {                    \
         if (get_user_u64(arg ## n, args + (n) * 8)) {   \
             errno = EFAULT;                             \
-            return set_swi_errno(cs, -1);              \
+            return set_swi_errno(cs, -1);               \
         }                                               \
     } else {                                            \
         if (get_user_u32(arg ## n, args + (n) * 4)) {   \
@@ -786,41 +799,10 @@ static const GuestFDFunctions guestfd_fns[] = {
 } while (0)
 
 #define SET_ARG(n, val)                                 \
-    (is_a64(env) ?                                      \
+    (is_64bit_semihosting(env) ?                        \
      put_user_u64(val, args + (n) * 8) :                \
      put_user_u32(val, args + (n) * 4))
-#endif
 
-#ifdef TARGET_RISCV
-
-/*
- * get_user_ual is defined as get_user_u32 in softmmu-semi.h,
- * we need a macro that fetches a target_ulong
- */
-#define get_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     get_user_u64(arg, p) :                     \
-     get_user_u32(arg, p))
-
-/*
- * put_user_ual is defined as put_user_u32 in softmmu-semi.h,
- * we need a macro that stores a target_ulong
- */
-#define put_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     put_user_u64(arg, p) :                     \
-     put_user_u32(arg, p))
-
-#define GET_ARG(n) do {                                                 \
-        if (get_user_utl(arg ## n, args + (n) * sizeof(target_ulong))) { \
-            errno = EFAULT;                                             \
-            return set_swi_errno(cs, -1);                              \
-        }                                                               \
-    } while (0)
-
-#define SET_ARG(n, val)                                 \
-    put_user_utl(val, args + (n) * sizeof(target_ulong))
-#endif
 
 /*
  * Do a semihosting call.
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-12 10:20 [PATCH v5 0/5] semihosting/next (SYS_HEAPINFO) Alex Bennée
  2021-03-12 10:20 ` [PATCH v5 1/5] semihosting: move semihosting tests to multiarch Alex Bennée
  2021-03-12 10:20 ` [PATCH v5 2/5] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
@ 2021-03-12 10:20 ` Alex Bennée
  2021-03-12 10:20   ` [Bug 1915925] " Alex Bennée
  2021-03-12 10:32   ` Peter Maydell
  2021-03-12 10:20 ` [PATCH v5 4/5] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
  2021-03-12 10:20 ` [PATCH v5 5/5] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
  4 siblings, 2 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 10:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, keithp, qemu-arm, qemu-riscv, Bug 1915925

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Bug: https://bugs.launchpad.net/bugs/1915925
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v3
  - just revert the old behaviour
---
 semihosting/arm-compat-semi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [Bug 1915925] [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-12 10:20 ` [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-12 10:20   ` Alex Bennée
  2021-03-12 10:32   ` Peter Maydell
  1 sibling, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 10:20 UTC (permalink / raw)
  To: qemu-devel

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Bug: https://bugs.launchpad.net/bugs/1915925
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v3
  - just revert the old behaviour
---
 semihosting/arm-compat-semi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v5 4/5] linux-user/riscv: initialise the TaskState heap/stack info
  2021-03-12 10:20 [PATCH v5 0/5] semihosting/next (SYS_HEAPINFO) Alex Bennée
                   ` (2 preceding siblings ...)
  2021-03-12 10:20 ` [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-12 10:20 ` Alex Bennée
  2021-03-12 10:20 ` [PATCH v5 5/5] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
  4 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 10:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, keithp, qemu-arm, qemu-riscv, Laurent Vivier

Arguably the target_cpu_copy_regs function for each architecture is
misnamed as a number of the architectures also take the opportunity to
fill out the TaskState structure. This could arguably be factored out
into common code but that would require a wider audit of the
architectures. For now just replicate for riscv so we can correctly
report semihosting information for SYS_HEAPINFO.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 linux-user/riscv/cpu_loop.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c
index 6767f941e8..74a9628dc9 100644
--- a/linux-user/riscv/cpu_loop.c
+++ b/linux-user/riscv/cpu_loop.c
@@ -135,4 +135,9 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
         error_report("Incompatible ELF: RVE cpu requires RVE ABI binary");
         exit(EXIT_FAILURE);
     }
+
+    ts->stack_base = info->start_stack;
+    ts->heap_base = info->brk;
+    /* This will be filled in on the first SYS_HEAPINFO call.  */
+    ts->heap_limit = 0;
 }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v5 5/5] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-12 10:20 [PATCH v5 0/5] semihosting/next (SYS_HEAPINFO) Alex Bennée
                   ` (3 preceding siblings ...)
  2021-03-12 10:20 ` [PATCH v5 4/5] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
@ 2021-03-12 10:20 ` Alex Bennée
  2021-03-12 10:35   ` Peter Maydell
  4 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 10:20 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, keithp, qemu-arm, qemu-riscv

Query the SYS_HEAPINFO semicall and do some basic verification of the
information via libc calls.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
v5
  - drop asnprintf, just mix printf output
  - don't use brk() but do sanity check
---
 .../multiarch/arm-compat-semi/semihosting.c   | 44 ++++++++++++++++++-
 1 file changed, 43 insertions(+), 1 deletion(-)

diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
index b3fd16cd12..8e9cfb578c 100644
--- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -8,9 +8,13 @@
  */
 
 #define SYS_WRITE0      0x04
+#define SYS_HEAPINFO    0x16
 #define SYS_REPORTEXC   0x18
 
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
@@ -21,8 +25,46 @@ int main(int argc, char *argv[argc])
     uintptr_t exit_block[2] = {0x20026, 0};
     uintptr_t exit_code = (uintptr_t) &exit_block;
 #endif
+    struct {
+        void *heap_base;
+        void *heap_limit;
+        void *stack_base;
+        void *stack_limit;
+    } info;
+    void *ptr_to_info = (void *) &info;
 
-    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
+    __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n");
+
+    memset(&info, 0, sizeof(info));
+    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
+
+    if (info.heap_base == NULL || info.heap_limit == NULL) {
+        printf("null heap: %p -> %p\n", info.heap_base, info.heap_limit);
+        exit(1);
+    } else if (info.heap_base != NULL && info.heap_limit != NULL) {
+        /* Error if heap base is above limit */
+        if ((uintptr_t) info.heap_base >= (uintptr_t) info.heap_limit) {
+            printf("heap base %p >= heap_limit %p\n",
+                   info.heap_base, info.heap_limit);
+            exit(2);
+        }
+    }
+
+    if (info.stack_base == NULL) {
+        printf("null stack: %p -> %p\n", info.stack_base, info.stack_limit);
+        exit(3);
+    } else if (info.stack_base != NULL && info.stack_limit != NULL) {
+        /* Error if stack base is below limit */
+        if ((uintptr_t) info.stack_base < (uintptr_t) info.stack_limit) {
+            printf("stack base %p < stack_limit %p\n",
+                   info.stack_base, info.stack_limit);
+            exit(4);
+        }
+    }
+    printf("heap: %p -> %p\n", info.heap_base, info.heap_limit);
+    printf("stack: %p -> %p\n", info.stack_base, info.stack_limit);
+
+    __semi_call(SYS_WRITE0, (uintptr_t) "Passed HeapInfo checks");
     __semi_call(SYS_REPORTEXC, exit_code);
     /* if we get here we failed */
     return -1;
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* Re: [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-12 10:20 ` [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
  2021-03-12 10:20   ` [Bug 1915925] " Alex Bennée
@ 2021-03-12 10:32   ` Peter Maydell
  2021-03-12 10:32     ` [Bug 1915925] " Peter Maydell
  1 sibling, 1 reply; 149+ messages in thread
From: Peter Maydell @ 2021-03-12 10:32 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Bug 1915925, Keith Packard, qemu-arm, open list:RISC-V, QEMU Developers

On Fri, 12 Mar 2021 at 10:29, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> As per the spec:
>
>   the PARAMETER REGISTER contains the address of a pointer to a
>   four-field data block.
>
> So we need to follow arg0 and place the results of SYS_HEAPINFO there.
>
> Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
> Bug: https://bugs.launchpad.net/bugs/1915925
> Cc: Bug 1915925 <1915925@bugs.launchpad.net>
> Cc: Keith Packard <keithp@keithp.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v3
>   - just revert the old behaviour

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-12 10:32   ` Peter Maydell
@ 2021-03-12 10:32     ` Peter Maydell
  0 siblings, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-12 10:32 UTC (permalink / raw)
  To: qemu-devel

On Fri, 12 Mar 2021 at 10:29, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> As per the spec:
>
>   the PARAMETER REGISTER contains the address of a pointer to a
>   four-field data block.
>
> So we need to follow arg0 and place the results of SYS_HEAPINFO there.
>
> Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
> Bug: https://bugs.launchpad.net/bugs/1915925
> Cc: Bug 1915925 <1915925@bugs.launchpad.net>
> Cc: Keith Packard <keithp@keithp.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>
> ---
> v3
>   - just revert the old behaviour

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

thanks
-- PMM

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Confirmed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v5 5/5] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-12 10:20 ` [PATCH v5 5/5] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
@ 2021-03-12 10:35   ` Peter Maydell
  2021-03-12 11:23     ` Alex Bennée
  0 siblings, 1 reply; 149+ messages in thread
From: Peter Maydell @ 2021-03-12 10:35 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Keith Packard, qemu-arm, open list:RISC-V, QEMU Developers

On Fri, 12 Mar 2021 at 10:31, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> Query the SYS_HEAPINFO semicall and do some basic verification of the
> information via libc calls.

Are we both testing system emulation and linux-user, or just one of the two?
(Not that I want to hold this up if we're only testing one, but coverage
of both, including M-profile, seems like it would be useful; cf also
https://bugs.launchpad.net/qemu/+bug/1918302 which is M-profile system-emulation
SYS_HEAPINFO being broken in 5.2.)

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v5 5/5] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-12 10:35   ` Peter Maydell
@ 2021-03-12 11:23     ` Alex Bennée
  2021-03-12 11:27       ` Peter Maydell
  0 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 11:23 UTC (permalink / raw)
  To: Peter Maydell; +Cc: Keith Packard, qemu-arm, open list:RISC-V, QEMU Developers


Peter Maydell <peter.maydell@linaro.org> writes:

> On Fri, 12 Mar 2021 at 10:31, Alex Benn=C3=A9e <alex.bennee@linaro.org> wro=
> te:
>>
>> Query the SYS_HEAPINFO semicall and do some basic verification of the
>> information via libc calls.
>
> Are we both testing system emulation and linux-user, or just one of the two=
> ?

Currently just linux-user. There is no inherent reason we couldn't add a
system emulation test but I felt that was already reasonably exercised
by your semihosting tests.

> (Not that I want to hold this up if we're only testing one, but coverage
> of both, including M-profile, seems like it would be useful; cf also
> https://bugs.launchpad.net/qemu/+bug/1918302 which is M-profile system-emul=
> ation
> SYS_HEAPINFO being broken in 5.2.)
>
> thanks
> -- PMM


-- 
Alex Bennée


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v5 5/5] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-12 11:23     ` Alex Bennée
@ 2021-03-12 11:27       ` Peter Maydell
  2021-03-12 14:08         ` Alex Bennée
  0 siblings, 1 reply; 149+ messages in thread
From: Peter Maydell @ 2021-03-12 11:27 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Keith Packard, qemu-arm, open list:RISC-V, QEMU Developers

On Fri, 12 Mar 2021 at 11:24, Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > On Fri, 12 Mar 2021 at 10:31, Alex Benn=C3=A9e <alex.bennee@linaro.org> wro=
> > te:
> >>
> >> Query the SYS_HEAPINFO semicall and do some basic verification of the
> >> information via libc calls.
> >
> > Are we both testing system emulation and linux-user, or just one of the two=
> > ?
>
> Currently just linux-user. There is no inherent reason we couldn't add a
> system emulation test but I felt that was already reasonably exercised
> by your semihosting tests.

Do we run those automatically anywhere ? I agree that probably the
best thing is to get those into the CI loop somehow (and then put
a SYS_HEAPINFO test there.)

-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v5 5/5] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-12 11:27       ` Peter Maydell
@ 2021-03-12 14:08         ` Alex Bennée
  0 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-12 14:08 UTC (permalink / raw)
  To: Peter Maydell; +Cc: Keith Packard, qemu-arm, open list:RISC-V, QEMU Developers


Peter Maydell <peter.maydell@linaro.org> writes:

> On Fri, 12 Mar 2021 at 11:24, Alex Benn=C3=A9e <alex.bennee@linaro.org> wro=
> te:
>>
>>
>> Peter Maydell <peter.maydell@linaro.org> writes:
>>
>> > On Fri, 12 Mar 2021 at 10:31, Alex Benn=3DC3=3DA9e <alex.bennee@linaro.=
> org> wro=3D
>> > te:
>> >>
>> >> Query the SYS_HEAPINFO semicall and do some basic verification of the
>> >> information via libc calls.
>> >
>> > Are we both testing system emulation and linux-user, or just one of the=
>  two=3D
>> > ?
>>
>> Currently just linux-user. There is no inherent reason we couldn't add a
>> system emulation test but I felt that was already reasonably exercised
>> by your semihosting tests.
>
> Do we run those automatically anywhere ? I agree that probably the
> best thing is to get those into the CI loop somehow (and then put
> a SYS_HEAPINFO test there.)

Not currently. I have toyed with series that make integrate the building
of external test suites into the source tree. There are a number that it
would be useful to have a short "make" away including:

  kvm-unit-tests
  LTP
  diy7 (memory model testing)
  sbsa-ref tools

and I guess the semihosting testd would be another good example.

-- 
Alex Bennée


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address
  2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
                   ` (4 preceding siblings ...)
  2021-03-09 17:21 ` [Bug 1915925] [PATCH v3 3/4] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-15 12:46 ` Alex Bennée
  2021-03-25 11:47 ` Alex Bennée
  2021-04-30  8:54 ` Thomas Huth
  7 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-15 12:46 UTC (permalink / raw)
  To: qemu-devel

** Changed in: qemu
       Status: Confirmed => In Progress

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  In Progress

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH for 6.0 v1 00/14] fixes for rc1 (kernel-doc, semihosting, testing)
@ 2021-03-20 13:36 Alex Bennée
  2021-03-20 13:36 ` [PATCH v1 01/14] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
                   ` (14 more replies)
  0 siblings, 15 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée

Hi,

Here is my current collection of fixes for rc1. We have a couple of
documentation tweaks including the final bit of enabling work for the
plugin API to be included via kernel-doc. We have some semihosting
fixes which have been on the list before which just need the final bit
of review. Finally there is a selection of tweaks for CI issues which
hopefully get BSD (and Cirrus) up and running again.

The following still need review:

 - tests/tcg: add HeapInfo checking to semihosting test
 - linux-user/riscv: initialise the TaskState heap/stack info
 - semihosting: move semihosting tests to multiarch
 - docs/devel: expand style section of memory management
 - scripts/kernel-doc: strip QEMU_ from function definitions

Alex Bennée (9):
  scripts/kernel-doc: strip QEMU_ from function definitions
  docs/devel: include the plugin API information from the headers
  docs/devel: expand style section of memory management
  tools/virtiofsd: include --socket-group in help
  semihosting: move semihosting tests to multiarch
  semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  linux-user/riscv: initialise the TaskState heap/stack info
  tests/tcg: add HeapInfo checking to semihosting test

Eric Blake (2):
  utils: Tighter tests for qemu_strtosz
  utils: Work around mingw strto*l bug with 0x

Thomas Huth (3):
  gitlab-ci.yml: Merge the trace-backend testing into other jobs
  configure: Don't use the __atomic_*_16 functions for testing 128-bit
    support
  cirrus.yml: Update the FreeBSD task to version 12.2

 docs/devel/style.rst                          |  46 +++--
 docs/devel/tcg-plugins.rst                    |   5 +
 configure                                     |   6 +-
 tests/tcg/aarch64/semicall.h                  |  18 ++
 tests/tcg/arm/semicall.h                      |  15 +-
 tests/tcg/riscv64/semicall.h                  |  22 +++
 linux-user/riscv/cpu_loop.c                   |   5 +
 semihosting/arm-compat-semi.c                 |  62 +++----
 tests/tcg/arm/semihosting.c                   |  26 ---
 .../arm-compat-semi}/semiconsole.c            |   2 +
 .../multiarch/arm-compat-semi/semihosting.c   |  71 ++++++++
 tests/unit/test-cutils.c                      | 171 +++++++++++++++++-
 tools/virtiofsd/fuse_lowlevel.c               |   1 +
 util/cutils.c                                 |  33 +++-
 .cirrus.yml                                   |   7 +-
 .gitlab-ci.yml                                |  30 +--
 MAINTAINERS                                   |   1 +
 scripts/kernel-doc                            |   3 +
 tests/tcg/Makefile.target                     |   3 +
 tests/tcg/aarch64/Makefile.target             |  18 --
 tests/tcg/arm/Makefile.target                 |  22 +--
 tests/tcg/multiarch/Makefile.target           |  31 ++++
 22 files changed, 430 insertions(+), 168 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 delete mode 100644 tests/tcg/arm/semihosting.c
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 create mode 100644 tests/tcg/multiarch/arm-compat-semi/semihosting.c

-- 
2.20.1



^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH v1 01/14] scripts/kernel-doc: strip QEMU_ from function definitions
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
@ 2021-03-20 13:36 ` Alex Bennée
  2021-03-20 16:04   ` Richard Henderson
  2021-03-20 13:36 ` [PATCH v1 02/14] docs/devel: include the plugin API information from the headers Alex Bennée
                   ` (13 subsequent siblings)
  14 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée

Some packaged versions of Sphinx (fedora33/alpine so far) have issues
with the annotated C code that kernel-doc spits out. Without knowing
about things like QEMU_PLUGIN_EXPORT it chokes trying to understand
the code. Evidently this is a problem for the kernel as well as the
long stream of regex substitutions we add to in this patch can attest.

Fortunately we have a fairly common format for all our compiler
shenanigans as applied to functions so lets just filter them all out.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 scripts/kernel-doc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/scripts/kernel-doc b/scripts/kernel-doc
index 4b19851b2d..240923d509 100755
--- a/scripts/kernel-doc
+++ b/scripts/kernel-doc
@@ -1745,6 +1745,9 @@ sub dump_function($$) {
             )+
           \)\)\s+//x;
 
+    # Strip QEMU specific compiler annotations
+    $prototype =~ s/QEMU_[A-Z_]+ +//;
+
     # Yes, this truly is vile.  We are looking for:
     # 1. Return type (may be nothing if we're looking at a macro)
     # 2. Function name
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 02/14] docs/devel: include the plugin API information from the headers
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
  2021-03-20 13:36 ` [PATCH v1 01/14] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
@ 2021-03-20 13:36 ` Alex Bennée
  2021-03-20 13:36 ` [PATCH v1 03/14] docs/devel: expand style section of memory management Alex Bennée
                   ` (12 subsequent siblings)
  14 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel; +Cc: Aaron Lindsay, Alex Bennée

We have kerneldoc tags for the headers so we might as well extract
them into our developer documentation whilst we are at it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Message-Id: <20210312172821.31647-4-alex.bennee@linaro.org>
---
 docs/devel/tcg-plugins.rst | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst
index 39ce86ed96..18c6581d85 100644
--- a/docs/devel/tcg-plugins.rst
+++ b/docs/devel/tcg-plugins.rst
@@ -63,6 +63,11 @@ valid during the lifetime of the callback so it is important that any
 information that is needed is extracted during the callback and saved
 by the plugin.
 
+API
+===
+
+.. kernel-doc:: include/qemu/qemu-plugin.h
+
 Usage
 =====
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 03/14] docs/devel: expand style section of memory management
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
  2021-03-20 13:36 ` [PATCH v1 01/14] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
  2021-03-20 13:36 ` [PATCH v1 02/14] docs/devel: include the plugin API information from the headers Alex Bennée
@ 2021-03-20 13:36 ` Alex Bennée
  2021-03-20 16:00   ` Richard Henderson
  2021-03-20 13:36 ` [PATCH v1 04/14] tools/virtiofsd: include --socket-group in help Alex Bennée
                   ` (11 subsequent siblings)
  14 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée

This aims to provide a bit more guidance for those who take on one of
our "clean up memory allocation" bite-sized tasks.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 docs/devel/style.rst | 46 ++++++++++++++++++++++++++++++++------------
 1 file changed, 34 insertions(+), 12 deletions(-)

diff --git a/docs/devel/style.rst b/docs/devel/style.rst
index 8b0bdb3570..260e3263fa 100644
--- a/docs/devel/style.rst
+++ b/docs/devel/style.rst
@@ -385,17 +385,37 @@ avoided.
 Low level memory management
 ===========================
 
-Use of the malloc/free/realloc/calloc/valloc/memalign/posix_memalign
+Use of the ``malloc/free/realloc/calloc/valloc/memalign/posix_memalign``
 APIs is not allowed in the QEMU codebase. Instead of these routines,
-use the GLib memory allocation routines g_malloc/g_malloc0/g_new/
-g_new0/g_realloc/g_free or QEMU's qemu_memalign/qemu_blockalign/qemu_vfree
-APIs.
-
-Please note that g_malloc will exit on allocation failure, so there
-is no need to test for failure (as you would have to with malloc).
-Calling g_malloc with a zero size is valid and will return NULL.
-
-Prefer g_new(T, n) instead of g_malloc(sizeof(T) ``*`` n) for the following
+use the GLib memory allocation routines
+``g_malloc/g_malloc0/g_new/g_new0/g_realloc/g_free``
+or QEMU's ``qemu_memalign/qemu_blockalign/qemu_vfree`` APIs.
+
+Please note that ``g_malloc`` will exit on allocation failure, so
+there is no need to test for failure (as you would have to with
+``malloc``). Generally using ``g_malloc`` on start-up is fine as the
+result of a failure to allocate memory is going to be a fatal exit
+anyway. There may be some start-up cases where failing is unreasonable
+(for example speculatively loading a large debug symbol table).
+
+Care should be taken to avoid introducing places where the guest could
+trigger an exit by causing a large allocation. For small allocations,
+of the order of 4k, a failure to allocate is likely indicative of an
+overloaded host and allowing ``g_malloc`` to ``exit`` is a reasonable
+approach. However for larger allocations where we could realistically
+fall-back to a smaller one if need be we should use functions like
+``g_try_new`` and check the result. For example this is valid approach
+for a time/space trade-off like ``tlb_mmu_resize_locked`` in the
+SoftMMU TLB code.
+
+If the lifetime of the allocation is within the function and there are
+multiple exist paths you can also improve the readability of the code
+by using ``g_autofree`` and related annotations. See :ref:`autofree-ref`
+for more details.
+
+Calling ``g_malloc`` with a zero size is valid and will return NULL.
+
+Prefer ``g_new(T, n)`` instead of ``g_malloc(sizeof(T) * n)`` for the following
 reasons:
 
 * It catches multiplication overflowing size_t;
@@ -409,8 +429,8 @@ Declarations like
 
 are acceptable, though.
 
-Memory allocated by qemu_memalign or qemu_blockalign must be freed with
-qemu_vfree, since breaking this will cause problems on Win32.
+Memory allocated by ``qemu_memalign`` or ``qemu_blockalign`` must be freed with
+``qemu_vfree``, since breaking this will cause problems on Win32.
 
 String manipulation
 ===================
@@ -485,6 +505,8 @@ In addition, QEMU assumes that the compiler does not use the latitude
 given in C99 and C11 to treat aspects of signed '<<' as undefined, as
 documented in the GNU Compiler Collection manual starting at version 4.0.
 
+.. _autofree-ref:
+
 Automatic memory deallocation
 =============================
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v1 04/14] tools/virtiofsd: include --socket-group in help
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (2 preceding siblings ...)
  2021-03-20 13:36 ` [PATCH v1 03/14] docs/devel: expand style section of memory management Alex Bennée
@ 2021-03-20 13:36 ` Alex Bennée
  2021-03-22 11:46   ` Stefan Hajnoczi
  2021-03-20 13:36 ` [PATCH v1 05/14] semihosting: move semihosting tests to multiarch Alex Bennée
                   ` (10 subsequent siblings)
  14 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Connor Kuehl, Alex Bennée, Dr. David Alan Gilbert, Stefan Hajnoczi

I confused myself wandering if this had been merged by looking at the
help output. It seems fuse_opt doesn't automagically add to help
output so lets do it now.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Connor Kuehl <ckuehl@redhat.com>
Updates: f6698f2b03 ("tools/virtiofsd: add support for --socket-group")
Message-Id: <20210318100911.16261-1-alex.bennee@linaro.org>
---
 tools/virtiofsd/fuse_lowlevel.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/virtiofsd/fuse_lowlevel.c b/tools/virtiofsd/fuse_lowlevel.c
index 1aa26c6333..58e32fc963 100644
--- a/tools/virtiofsd/fuse_lowlevel.c
+++ b/tools/virtiofsd/fuse_lowlevel.c
@@ -2450,6 +2450,7 @@ void fuse_lowlevel_help(void)
     printf(
         "    -o allow_root              allow access by root\n"
         "    --socket-path=PATH         path for the vhost-user socket\n"
+        "    --socket-group=GRNAME      name of group for the vhost-user socket\n"
         "    --fd=FDNUM                 fd number of vhost-user socket\n"
         "    --thread-pool-size=NUM     thread pool size limit (default %d)\n",
         THREAD_POOL_SIZE);
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v1 05/14] semihosting: move semihosting tests to multiarch
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (3 preceding siblings ...)
  2021-03-20 13:36 ` [PATCH v1 04/14] tools/virtiofsd: include --socket-group in help Alex Bennée
@ 2021-03-20 13:36 ` Alex Bennée
  2021-03-20 16:03   ` Richard Henderson
  2021-03-20 13:36 ` [PATCH v1 06/14] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
                   ` (9 subsequent siblings)
  14 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel
  Cc: Peter Maydell, open list:ARM TCG CPUs, Alex Bennée,
	Philippe Mathieu-Daudé

It may be arm-compat-semihosting but more than one architecture uses
it so lets move the tests into the multiarch area. We gate it on the
feature and split the semicall.h header between the arches.

Also clean-up a bit of the Makefile messing about to one common set of
runners.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210312102029.17017-2-alex.bennee@linaro.org>

---
v6.0-rc1
  - fix breakage for semihosting/semiconsole-arm
---
 tests/tcg/aarch64/semicall.h                  | 18 +++++++++++
 tests/tcg/arm/semicall.h                      | 15 +--------
 tests/tcg/riscv64/semicall.h                  | 22 +++++++++++++
 .../arm-compat-semi}/semiconsole.c            |  2 ++
 .../arm-compat-semi}/semihosting.c            |  5 ++-
 MAINTAINERS                                   |  1 +
 tests/tcg/Makefile.target                     |  3 ++
 tests/tcg/aarch64/Makefile.target             | 18 -----------
 tests/tcg/arm/Makefile.target                 | 22 ++++++-------
 tests/tcg/multiarch/Makefile.target           | 31 +++++++++++++++++++
 10 files changed, 91 insertions(+), 46 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semihosting.c (85%)

diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h
new file mode 100644
index 0000000000..8a3fce35c5
--- /dev/null
+++ b/tests/tcg/aarch64/semicall.h
@@ -0,0 +1,18 @@
+/*
+ * Semihosting Tests - AArch64 helper
+ *
+ * Copyright (c) 2019
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("x0") = type;
+    register uintptr_t a0 asm("x1") = arg0;
+    asm("hlt 0xf000"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h
index d4f6818192..ad8ac51310 100644
--- a/tests/tcg/arm/semicall.h
+++ b/tests/tcg/arm/semicall.h
@@ -1,5 +1,5 @@
 /*
- * Semihosting Tests
+ * Semihosting Tests - ARM Helper
  *
  * Copyright (c) 2019
  * Written by Alex Bennée <alex.bennee@linaro.org>
@@ -7,13 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
-#define SYS_WRITE0      0x04
-#define SYS_READC       0x07
-#define SYS_REPORTEXC   0x18
-
 uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 {
-#if defined(__arm__)
     register uintptr_t t asm("r0") = type;
     register uintptr_t a0 asm("r1") = arg0;
 #ifdef __thumb__
@@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 #endif
     asm(SVC : "=r" (t)
         : "r" (t), "r" (a0));
-#else
-    register uintptr_t t asm("x0") = type;
-    register uintptr_t a0 asm("x1") = arg0;
-    asm("hlt 0xf000"
-        : "=r" (t)
-        : "r" (t), "r" (a0));
-#endif
-
     return t;
 }
diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h
new file mode 100644
index 0000000000..f8c88f32dc
--- /dev/null
+++ b/tests/tcg/riscv64/semicall.h
@@ -0,0 +1,22 @@
+/*
+ * Semihosting Tests - RiscV64 Helper
+ *
+ * Copyright (c) 2021
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("a0") = type;
+    register uintptr_t a0 asm("a1") = arg0;
+    asm(".option norvc\n\t"
+        ".balign 16\n\t"
+        "slli zero, zero, 0x1f\n\t"
+        "ebreak\n\t"
+        "srai zero, zero, 0x7\n\t"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
similarity index 93%
rename from tests/tcg/arm/semiconsole.c
rename to tests/tcg/multiarch/arm-compat-semi/semiconsole.c
index 6ef0bd2450..1d82efc589 100644
--- a/tests/tcg/arm/semiconsole.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_READC       0x07
+
 #include <stdio.h>
 #include <stdint.h>
 #include "semicall.h"
diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
similarity index 85%
rename from tests/tcg/arm/semihosting.c
rename to tests/tcg/multiarch/arm-compat-semi/semihosting.c
index 33faac9916..b3fd16cd12 100644
--- a/tests/tcg/arm/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -7,12 +7,15 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_WRITE0      0x04
+#define SYS_REPORTEXC   0x18
+
 #include <stdint.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
 {
-#if defined(__arm__)
+#if UINTPTR_MAX == UINT32_MAX
     uintptr_t exit_code = 0x20026;
 #else
     uintptr_t exit_block[2] = {0x20026, 0};
diff --git a/MAINTAINERS b/MAINTAINERS
index 25fc49d1dc..b6e1b25b33 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3283,6 +3283,7 @@ M: Alex Bennée <alex.bennee@linaro.org>
 S: Maintained
 F: semihosting/
 F: include/semihosting/
+F: tests/tcg/multiarch/arm-compat-semi/
 
 Multi-process QEMU
 M: Elena Ufimtseva <elena.ufimtseva@oracle.com>
diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target
index 24d75a5801..cab8c6b3a2 100644
--- a/tests/tcg/Makefile.target
+++ b/tests/tcg/Makefile.target
@@ -32,6 +32,9 @@
 all:
 -include ../../../config-host.mak
 -include ../config-$(TARGET).mak
+ifeq ($(CONFIG_USER_ONLY),y)
+-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak
+endif
 
 # for including , in command strings
 COMMA := ,
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index bf53ad0087..56e48f4b34 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -41,24 +41,6 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4
 mte-%: CFLAGS += -march=armv8.5-a+memtag
 endif
 
-# Semihosting smoke test for linux-user
-AARCH64_TESTS += semihosting
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
-
-run-plugin-semihosting-with-%:
-	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
-		 $(call strip-plugin,$<) 2> $<.err, \
-		"$< on $(TARGET_NAME) with $*")
-
-AARCH64_TESTS += semiconsole
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
 ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
 # System Registers Tests
 AARCH64_TESTS += sysregs
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index ec95156562..5ab59ed6ce 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -29,37 +29,31 @@ run-fcvt: fcvt
 	$(call run-test,fcvt,$(QEMU) $<,"$< on $(TARGET_NAME)")
 	$(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref)
 
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+
 # Semihosting smoke test for linux-user
-ARM_TESTS += semihosting
 semihosting: CFLAGS += -mthumb
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
 ARM_TESTS += semihosting-arm
-semihosting-arm: CFLAGS += -marm
+semihosting-arm: CFLAGS += -marm -I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
 semihosting-arm: semihosting.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semihosting-arm: semihosting-arm
 	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
-run-plugin-semihosting-with-%:
+run-plugin-semihosting-arm-with-%:
 	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
 		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
 		 $(call strip-plugin,$<) 2> $<.err, \
 		"$< on $(TARGET_NAME) with $*")
 
-ARM_TESTS += semiconsole semiconsole-arm
+ARM_TESTS += semiconsole-arm
 
 semiconsole: CFLAGS += -mthumb
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
 
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
-semiconsole-arm: CFLAGS += -marm
-semiconsole-arm: semiconsole.c
+semiconsole-arm: CFLAGS += -marm -I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+semiconsole-arm: semihosting.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semiconsole-arm: semiconsole-arm
@@ -68,6 +62,8 @@ run-semiconsole-arm: semiconsole-arm
 run-plugin-semiconsole-arm-with-%:
 	$(call skip-test, $<, "MANUAL ONLY")
 
+endif
+
 ARM_TESTS += commpage
 
 TESTS += $(ARM_TESTS)
diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target
index abbdb2e126..a3a751723d 100644
--- a/tests/tcg/multiarch/Makefile.target
+++ b/tests/tcg/multiarch/Makefile.target
@@ -69,6 +69,37 @@ run-gdbstub-%:
 endif
 EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read
 
+# ARM Compatible Semi Hosting Tests
+#
+# Despite having ARM in the name we actually have several
+# architectures that implement it. We gate the tests on the feature
+# appearing in config.
+#
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+VPATH += $(MULTIARCH_SRC)/arm-compat-semi
+
+# Add -I path back to TARGET_NAME for semicall.h
+semihosting: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semihosting: semihosting
+	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
+
+run-plugin-semihosting-with-%:
+	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
+		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
+		 $(call strip-plugin,$<) 2> $<.err, \
+		"$< on $(TARGET_NAME) with $*")
+
+semiconsole: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semiconsole: semiconsole
+	$(call skip-test, $<, "MANUAL ONLY")
+
+run-plugin-semiconsole-with-%:
+	$(call skip-test, $<, "MANUAL ONLY")
+
+TESTS += semihosting semiconsole
+endif
 
 # Update TESTS
 TESTS += $(MULTIARCH_TESTS)
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 06/14] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (4 preceding siblings ...)
  2021-03-20 13:36 ` [PATCH v1 05/14] semihosting: move semihosting tests to multiarch Alex Bennée
@ 2021-03-20 13:36 ` Alex Bennée
  2021-03-20 13:36 ` [PATCH v1 07/14] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
                   ` (8 subsequent siblings)
  14 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, Keith Packard, Alex Bennée

>From the semihosting point of view what we want to know is the current
mode of the processor. Unify this into a single helper and allow us to
use the same GET/SET_ARG helpers for the rest of the code. Having the
helper will also be useful later.

Note: we aren't currently testing riscv32 due to missing toolchain for
check-tcg tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Message-Id: <20210312102029.17017-3-alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 56 ++++++++++++-----------------------
 1 file changed, 19 insertions(+), 37 deletions(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 94950b6c56..0f0e129a7c 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] = {
     },
 };
 
-/* Read the input value from the argument block; fail the semihosting
- * call if the memory read fails.
+/*
+ * Read the input value from the argument block; fail the semihosting
+ * call if the memory read fails. Eventually we could use a generic
+ * CPUState helper function here.
  */
-#ifdef TARGET_ARM
+static inline bool is_64bit_semihosting(CPUArchState *env)
+{
+#if defined(TARGET_ARM)
+    return is_a64(env);
+#elif defined(TARGET_RISCV)
+    return !riscv_cpu_is_32bit(env);
+#else
+#error un-handled architecture
+#endif
+}
+
+
 #define GET_ARG(n) do {                                 \
-    if (is_a64(env)) {                                  \
+    if (is_64bit_semihosting(env)) {                    \
         if (get_user_u64(arg ## n, args + (n) * 8)) {   \
             errno = EFAULT;                             \
-            return set_swi_errno(cs, -1);              \
+            return set_swi_errno(cs, -1);               \
         }                                               \
     } else {                                            \
         if (get_user_u32(arg ## n, args + (n) * 4)) {   \
@@ -786,41 +799,10 @@ static const GuestFDFunctions guestfd_fns[] = {
 } while (0)
 
 #define SET_ARG(n, val)                                 \
-    (is_a64(env) ?                                      \
+    (is_64bit_semihosting(env) ?                        \
      put_user_u64(val, args + (n) * 8) :                \
      put_user_u32(val, args + (n) * 4))
-#endif
 
-#ifdef TARGET_RISCV
-
-/*
- * get_user_ual is defined as get_user_u32 in softmmu-semi.h,
- * we need a macro that fetches a target_ulong
- */
-#define get_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     get_user_u64(arg, p) :                     \
-     get_user_u32(arg, p))
-
-/*
- * put_user_ual is defined as put_user_u32 in softmmu-semi.h,
- * we need a macro that stores a target_ulong
- */
-#define put_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     put_user_u64(arg, p) :                     \
-     put_user_u32(arg, p))
-
-#define GET_ARG(n) do {                                                 \
-        if (get_user_utl(arg ## n, args + (n) * sizeof(target_ulong))) { \
-            errno = EFAULT;                                             \
-            return set_swi_errno(cs, -1);                              \
-        }                                                               \
-    } while (0)
-
-#define SET_ARG(n, val)                                 \
-    put_user_utl(val, args + (n) * sizeof(target_ulong))
-#endif
 
 /*
  * Do a semihosting call.
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 07/14] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (5 preceding siblings ...)
  2021-03-20 13:36 ` [PATCH v1 06/14] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
@ 2021-03-20 13:36 ` Alex Bennée
  2021-03-20 13:36   ` [Bug 1915925] " Alex Bennée
  2021-03-20 13:37 ` [PATCH v1 08/14] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
                   ` (7 subsequent siblings)
  14 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, Keith Packard, Alex Bennée, Bug 1915925

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Bug: https://bugs.launchpad.net/bugs/1915925
Message-Id: <20210312102029.17017-4-alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [Bug 1915925] [PATCH v1 07/14] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-20 13:36 ` [PATCH v1 07/14] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-20 13:36   ` Alex Bennée
  0 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:36 UTC (permalink / raw)
  To: qemu-devel

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Bug: https://bugs.launchpad.net/bugs/1915925
Message-Id: <20210312102029.17017-4-alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  In Progress

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 08/14] linux-user/riscv: initialise the TaskState heap/stack info
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (6 preceding siblings ...)
  2021-03-20 13:36 ` [PATCH v1 07/14] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-20 13:37 ` Alex Bennée
  2021-03-20 16:05   ` Richard Henderson
  2021-03-20 13:37 ` [PATCH v1 09/14] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
                   ` (6 subsequent siblings)
  14 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:37 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, Laurent Vivier

Arguably the target_cpu_copy_regs function for each architecture is
misnamed as a number of the architectures also take the opportunity to
fill out the TaskState structure. This could arguably be factored out
into common code but that would require a wider audit of the
architectures. For now just replicate for riscv so we can correctly
report semihosting information for SYS_HEAPINFO.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210312102029.17017-5-alex.bennee@linaro.org>
---
 linux-user/riscv/cpu_loop.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c
index 6767f941e8..74a9628dc9 100644
--- a/linux-user/riscv/cpu_loop.c
+++ b/linux-user/riscv/cpu_loop.c
@@ -135,4 +135,9 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
         error_report("Incompatible ELF: RVE cpu requires RVE ABI binary");
         exit(EXIT_FAILURE);
     }
+
+    ts->stack_base = info->start_stack;
+    ts->heap_base = info->brk;
+    /* This will be filled in on the first SYS_HEAPINFO call.  */
+    ts->heap_limit = 0;
 }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 09/14] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (7 preceding siblings ...)
  2021-03-20 13:37 ` [PATCH v1 08/14] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
@ 2021-03-20 13:37 ` Alex Bennée
  2021-03-20 16:11   ` Richard Henderson
  2021-03-20 13:37 ` [PATCH v1 10/14] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
                   ` (5 subsequent siblings)
  14 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:37 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée

Query the SYS_HEAPINFO semicall and do some basic verification of the
information via libc calls.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210312102029.17017-6-alex.bennee@linaro.org>
---
 .../multiarch/arm-compat-semi/semihosting.c   | 44 ++++++++++++++++++-
 1 file changed, 43 insertions(+), 1 deletion(-)

diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
index b3fd16cd12..8e9cfb578c 100644
--- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -8,9 +8,13 @@
  */
 
 #define SYS_WRITE0      0x04
+#define SYS_HEAPINFO    0x16
 #define SYS_REPORTEXC   0x18
 
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
@@ -21,8 +25,46 @@ int main(int argc, char *argv[argc])
     uintptr_t exit_block[2] = {0x20026, 0};
     uintptr_t exit_code = (uintptr_t) &exit_block;
 #endif
+    struct {
+        void *heap_base;
+        void *heap_limit;
+        void *stack_base;
+        void *stack_limit;
+    } info;
+    void *ptr_to_info = (void *) &info;
 
-    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
+    __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n");
+
+    memset(&info, 0, sizeof(info));
+    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
+
+    if (info.heap_base == NULL || info.heap_limit == NULL) {
+        printf("null heap: %p -> %p\n", info.heap_base, info.heap_limit);
+        exit(1);
+    } else if (info.heap_base != NULL && info.heap_limit != NULL) {
+        /* Error if heap base is above limit */
+        if ((uintptr_t) info.heap_base >= (uintptr_t) info.heap_limit) {
+            printf("heap base %p >= heap_limit %p\n",
+                   info.heap_base, info.heap_limit);
+            exit(2);
+        }
+    }
+
+    if (info.stack_base == NULL) {
+        printf("null stack: %p -> %p\n", info.stack_base, info.stack_limit);
+        exit(3);
+    } else if (info.stack_base != NULL && info.stack_limit != NULL) {
+        /* Error if stack base is below limit */
+        if ((uintptr_t) info.stack_base < (uintptr_t) info.stack_limit) {
+            printf("stack base %p < stack_limit %p\n",
+                   info.stack_base, info.stack_limit);
+            exit(4);
+        }
+    }
+    printf("heap: %p -> %p\n", info.heap_base, info.heap_limit);
+    printf("stack: %p -> %p\n", info.stack_base, info.stack_limit);
+
+    __semi_call(SYS_WRITE0, (uintptr_t) "Passed HeapInfo checks");
     __semi_call(SYS_REPORTEXC, exit_code);
     /* if we get here we failed */
     return -1;
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 10/14] gitlab-ci.yml: Merge the trace-backend testing into other jobs
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (8 preceding siblings ...)
  2021-03-20 13:37 ` [PATCH v1 09/14] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
@ 2021-03-20 13:37 ` Alex Bennée
  2021-03-22 17:03   ` Willian Rampazzo
  2021-03-20 13:37 ` [PATCH v1 11/14] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
                   ` (4 subsequent siblings)
  14 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:37 UTC (permalink / raw)
  To: qemu-devel
  Cc: Willian Rampazzo, Thomas Huth, Alex Bennée,
	Philippe Mathieu-Daudé,
	Wainer dos Santos Moschetta

From: Thomas Huth <thuth@redhat.com>

Our gitlab-ci got quite slow in the past weeks, due to the immense amount
of jobs that we have, so we should try to reduce the number of jobs.
There is no real good reason for having separate jobs just to test the
trace backends, we can do this just fine in other jobs, too.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210319095726.45965-1-thuth@redhat.com>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 .gitlab-ci.yml | 30 +++---------------------------
 1 file changed, 3 insertions(+), 27 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index f65cb11c4d..f746d5fbea 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -87,7 +87,7 @@ build-system-alpine:
     TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu
       moxie-softmmu microblazeel-softmmu mips64el-softmmu
     MAKE_CHECK_ARGS: check-build
-    CONFIGURE_ARGS: --enable-docs
+    CONFIGURE_ARGS: --enable-docs --enable-trace-backends=log,simple,syslog
   artifacts:
     expire_in: 2 days
     paths:
@@ -605,7 +605,7 @@ tsan-build:
   variables:
     IMAGE: ubuntu2004
     CONFIGURE_ARGS: --enable-tsan --cc=clang-10 --cxx=clang++-10 --disable-docs
-                    --enable-fdt=system --enable-slirp=system
+          --enable-trace-backends=ust --enable-fdt=system --enable-slirp=system
     TARGETS: x86_64-softmmu ppc64-softmmu riscv64-softmmu x86_64-linux-user
     MAKE_CHECK_ARGS: bench V=1
 
@@ -702,6 +702,7 @@ build-coroutine-sigaltstack:
   variables:
     IMAGE: ubuntu2004
     CONFIGURE_ARGS: --with-coroutine=sigaltstack --disable-tcg
+                    --enable-trace-backends=ftrace
     MAKE_CHECK_ARGS: check-unit
 
 # Most jobs test latest gcrypt or nettle builds
@@ -739,31 +740,6 @@ crypto-only-gnutls:
     MAKE_CHECK_ARGS: check
 
 
-# We don't need to exercise every backend with every front-end
-build-trace-multi-user:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=log,simple,syslog --disable-system
-
-build-trace-ftrace-system:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=ftrace --target-list=x86_64-softmmu
-
-build-trace-ust-system:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=ust --target-list=x86_64-softmmu
-
 # Check our reduced build configurations
 build-without-default-devices:
   <<: *native_build_job_definition
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 11/14] configure: Don't use the __atomic_*_16 functions for testing 128-bit support
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (9 preceding siblings ...)
  2021-03-20 13:37 ` [PATCH v1 10/14] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
@ 2021-03-20 13:37 ` Alex Bennée
  2021-03-20 13:37 ` [PATCH v1 12/14] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
                   ` (3 subsequent siblings)
  14 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:37 UTC (permalink / raw)
  To: qemu-devel
  Cc: Alex Bennée, Paolo Bonzini, Thomas Huth, Richard Henderson

From: Thomas Huth <thuth@redhat.com>

The test for 128-bit atomics is causing trouble with FreeBSD 12.2 and
--enable-werror:

 cc -Werror -fPIE -DPIE -std=gnu99 -Wall -m64 -mcx16 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wold-style-definition -Wtype-limits -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wempty-body -Wnested-externs -Wendif-labels -Wexpansion-to-defined -Wno-initializer-overrides -Wno-missing-include-dirs -Wno-shift-negative-value -Wno-string-plus-int -Wno-typedef-redefinition -Wno-tautological-type-limit-compare -fstack-protector-strong -o config-temp/qemu-conf.exe config-temp/qemu-conf.c -pie -Wl,-z,relro -Wl,-z,now -m64 -fstack-protector-strong
 config-temp/qemu-conf.c:4:7: error: implicit declaration of function '__atomic_load_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   y = __atomic_load_16(&x, 0);
       ^
 config-temp/qemu-conf.c:5:3: error: implicit declaration of function '__atomic_store_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   __atomic_store_16(&x, y, 0);
   ^
 config-temp/qemu-conf.c:5:3: note: did you mean '__atomic_load_16'?
 config-temp/qemu-conf.c:4:7: note: '__atomic_load_16' declared here
   y = __atomic_load_16(&x, 0);
       ^
 config-temp/qemu-conf.c:6:3: error: implicit declaration of function '__atomic_compare_exchange_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0);
   ^
 3 errors generated.

Looking for they way we are using atomic functions in QEMU, we are not
using these functions with the _16 suffix anyway. Switch to the same
functions that we use in the include/qemu/atomic.h header.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210317110512.583747-2-thuth@redhat.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 configure | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/configure b/configure
index 847bc4d095..1be6bcec0a 100755
--- a/configure
+++ b/configure
@@ -4779,9 +4779,9 @@ if test "$int128" = "yes"; then
 int main(void)
 {
   unsigned __int128 x = 0, y = 0;
-  y = __atomic_load_16(&x, 0);
-  __atomic_store_16(&x, y, 0);
-  __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0);
+  y = __atomic_load(&x, 0);
+  __atomic_store(&x, y, 0);
+  __atomic_compare_exchange(&x, &y, x, 0, 0, 0);
   return 0;
 }
 EOF
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v1 12/14] cirrus.yml: Update the FreeBSD task to version 12.2
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (10 preceding siblings ...)
  2021-03-20 13:37 ` [PATCH v1 11/14] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
@ 2021-03-20 13:37 ` Alex Bennée
  2021-03-20 13:37 ` [PATCH v1 13/14] utils: Tighter tests for qemu_strtosz Alex Bennée
                   ` (2 subsequent siblings)
  14 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:37 UTC (permalink / raw)
  To: qemu-devel
  Cc: Ed Maste, Thomas Huth, Alex Bennée, Li-Wen Hsu, Yonggang Luo

From: Thomas Huth <thuth@redhat.com>

FreeBSD version 12.1 is out of service now, and the task in the
Cirrus-CI is failing. Update to 12.2 to get it working again.
Unfortunately, there is a bug in libtasn1 that triggers with the
new version of Clang that is used there (see this thread for details:
https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg00739.html ),
so we have to disable gnutls for now to make it work again. We can
enable it later again once libtasn1 has been fixed in FreeBSD.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210319101402.48871-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 .cirrus.yml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index bc40a0550d..f53c519447 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -3,7 +3,7 @@ env:
 
 freebsd_12_task:
   freebsd_instance:
-    image_family: freebsd-12-1
+    image_family: freebsd-12-2
     cpu: 8
     memory: 8G
   install_script:
@@ -13,7 +13,10 @@ freebsd_12_task:
   script:
     - mkdir build
     - cd build
-    - ../configure --enable-werror || { cat config.log meson-logs/meson-log.txt; exit 1; }
+    # TODO: Enable gnutls again once FreeBSD's libtasn1 got fixed
+    # See: https://gitlab.com/gnutls/libtasn1/-/merge_requests/71
+    - ../configure --enable-werror --disable-gnutls
+      || { cat config.log meson-logs/meson-log.txt; exit 1; }
     - gmake -j$(sysctl -n hw.ncpu)
     - gmake -j$(sysctl -n hw.ncpu) check V=1
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v1 13/14] utils: Tighter tests for qemu_strtosz
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (11 preceding siblings ...)
  2021-03-20 13:37 ` [PATCH v1 12/14] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
@ 2021-03-20 13:37 ` Alex Bennée
  2021-03-20 13:37 ` [PATCH v1 14/14] utils: Work around mingw strto*l bug with 0x Alex Bennée
  2021-03-20 13:54 ` [PATCH for 6.0 v1 00/14] fixes for rc1 (kernel-doc, semihosting, testing) no-reply
  14 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:37 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, Thomas Huth

From: Eric Blake <eblake@redhat.com>

Our tests were not validating the return value in all cases, nor was
it guaranteeing our documented claim that 'res' is unchanged on error.
For that matter, it wasn't as thorough as the existing tests for
qemu_strtoi() and friends for proving that endptr and res are sanely
set.  Enhancing the test found one case where we violated our
documentation: namely, when failing with EINVAL when endptr is NULL,
we shouldn't modify res.

Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210317143325.2165821-2-eblake@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/unit/test-cutils.c | 117 +++++++++++++++++++++++++++++++++++++--
 util/cutils.c            |   4 +-
 2 files changed, 114 insertions(+), 7 deletions(-)

diff --git a/tests/unit/test-cutils.c b/tests/unit/test-cutils.c
index e025b54c05..5908de4fd0 100644
--- a/tests/unit/test-cutils.c
+++ b/tests/unit/test-cutils.c
@@ -1952,9 +1952,11 @@ static void test_qemu_strtosz_simple(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
@@ -1962,6 +1964,8 @@ static void test_qemu_strtosz_simple(void)
 
     /* Leading 0 gives decimal results, not octal */
     str = "08";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 8);
@@ -1969,46 +1973,61 @@ static void test_qemu_strtosz_simple(void)
 
     /* Leading space is ignored */
     str = " 12345";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345);
     g_assert(endptr == str + 6);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345);
 
     str = "9007199254740991"; /* 2^53-1 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x1fffffffffffff);
     g_assert(endptr == str + 16);
 
     str = "9007199254740992"; /* 2^53 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x20000000000000);
     g_assert(endptr == str + 16);
 
     str = "9007199254740993"; /* 2^53+1 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x20000000000001);
     g_assert(endptr == str + 16);
 
     str = "18446744073709549568"; /* 0xfffffffffffff800 (53 msbs set) */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xfffffffffffff800);
     g_assert(endptr == str + 20);
 
     str = "18446744073709550591"; /* 0xfffffffffffffbff */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xfffffffffffffbff);
     g_assert(endptr == str + 20);
 
     str = "18446744073709551615"; /* 0xffffffffffffffff */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xffffffffffffffff);
@@ -2020,21 +2039,27 @@ static void test_qemu_strtosz_hex(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0x0";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 3);
 
     str = "0xab";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 171);
     g_assert(endptr == str + 4);
 
     str = "0xae";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 174);
@@ -2053,44 +2078,60 @@ static void test_qemu_strtosz_units(void)
     const char *e = "1E";
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     /* default is M */
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz_MiB(none, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, MiB);
     g_assert(endptr == none + 1);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(b, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1);
     g_assert(endptr == b + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(k, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, KiB);
     g_assert(endptr == k + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(m, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, MiB);
     g_assert(endptr == m + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(g, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, GiB);
     g_assert(endptr == g + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(t, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, TiB);
     g_assert(endptr == t + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(p, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, PiB);
     g_assert(endptr == p + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(e, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, EiB);
@@ -2102,9 +2143,11 @@ static void test_qemu_strtosz_float(void)
     const char *str;
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0.5E";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, EiB / 2);
@@ -2112,6 +2155,8 @@ static void test_qemu_strtosz_float(void)
 
     /* For convenience, a fraction of 0 is tolerated even on bytes */
     str = "1.0B";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1);
@@ -2119,6 +2164,8 @@ static void test_qemu_strtosz_float(void)
 
     /* An empty fraction is tolerated */
     str = "1.k";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1024);
@@ -2126,6 +2173,8 @@ static void test_qemu_strtosz_float(void)
 
     /* For convenience, we permit values that are not byte-exact */
     str = "12.345M";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, (uint64_t) (12.345 * MiB + 0.5));
@@ -2140,67 +2189,91 @@ static void test_qemu_strtosz_invalid(void)
     uint64_t res = 0xbaadf00d;
 
     str = "";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = " \t ";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "crap";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "inf";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "NaN";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* Fractional values require scale larger than bytes */
     str = "1.1B";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "1.1";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No floating point exponents */
     str = "1.5e1k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "1.5E+0k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No hex fractions */
     str = "0x1.8k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No negative values */
     str = "-0";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "-1";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 }
 
@@ -2209,48 +2282,72 @@ static void test_qemu_strtosz_trailing(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "123xxx";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz_MiB(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 123 * MiB);
     g_assert(endptr == str + 3);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "1kiB";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1024);
     g_assert(endptr == str + 2);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "0x";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 1);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "0.NaN";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 2);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "123-45";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 123);
     g_assert(endptr == str + 3);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 }
 
 static void test_qemu_strtosz_erange(void)
@@ -2261,13 +2358,17 @@ static void test_qemu_strtosz_erange(void)
     uint64_t res = 0xbaadf00d;
 
     str = "18446744073709551616"; /* 2^64; see strtosz_simple for 2^64-1 */
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -ERANGE);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str + 20);
 
     str = "20E";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -ERANGE);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str + 3);
 }
 
@@ -2276,15 +2377,19 @@ static void test_qemu_strtosz_metric(void)
     const char *str;
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "12345k";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz_metric(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345000);
     g_assert(endptr == str + 6);
 
     str = "12.345M";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz_metric(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345000);
diff --git a/util/cutils.c b/util/cutils.c
index c442882b88..b425ed6570 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -362,7 +362,6 @@ static int do_strtosz(const char *nptr, const char **end,
         }
     }
 
-    *result = val;
     retval = 0;
 
 out:
@@ -371,6 +370,9 @@ out:
     } else if (*endptr) {
         retval = -EINVAL;
     }
+    if (retval == 0) {
+        *result = val;
+    }
 
     return retval;
 }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v1 14/14] utils: Work around mingw strto*l bug with 0x
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (12 preceding siblings ...)
  2021-03-20 13:37 ` [PATCH v1 13/14] utils: Tighter tests for qemu_strtosz Alex Bennée
@ 2021-03-20 13:37 ` Alex Bennée
  2021-03-20 13:54 ` [PATCH for 6.0 v1 00/14] fixes for rc1 (kernel-doc, semihosting, testing) no-reply
  14 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-20 13:37 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, Thomas Huth

From: Eric Blake <eblake@redhat.com>

Mingw recognizes that "0x" has value 0 without setting errno, but
fails to advance endptr to the trailing garbage 'x'.  This in turn
showed up in our recent testsuite additions for qemu_strtosz (commit
1657ba44b4 utils: Enhance testsuite for do_strtosz()); adjust our
remaining tests to show that we now work around this windows bug.

This patch intentionally fails check-syntax for use of strtol.

Signed-off-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210317143325.2165821-3-eblake@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/unit/test-cutils.c | 54 ++++++++++++++++++++++++++++++++++++++++
 util/cutils.c            | 29 +++++++++++++++------
 2 files changed, 75 insertions(+), 8 deletions(-)

diff --git a/tests/unit/test-cutils.c b/tests/unit/test-cutils.c
index 5908de4fd0..98671f1ac3 100644
--- a/tests/unit/test-cutils.c
+++ b/tests/unit/test-cutils.c
@@ -378,6 +378,15 @@ static void test_qemu_strtoi_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoi(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoi_max(void)
@@ -669,6 +678,15 @@ static void test_qemu_strtoui_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoui(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoui_max(void)
@@ -955,6 +973,15 @@ static void test_qemu_strtol_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtol(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtol_max(void)
@@ -1244,6 +1271,15 @@ static void test_qemu_strtoul_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoul(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoul_max(void)
@@ -1528,6 +1564,15 @@ static void test_qemu_strtoi64_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    endptr = &f;
+    res = 999;
+    err = qemu_strtoi64(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoi64_max(void)
@@ -1815,6 +1860,15 @@ static void test_qemu_strtou64_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    endptr = &f;
+    res = 999;
+    err = qemu_strtou64(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtou64_max(void)
diff --git a/util/cutils.c b/util/cutils.c
index b425ed6570..ee908486da 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -396,9 +396,22 @@ int qemu_strtosz_metric(const char *nptr, const char **end, uint64_t *result)
  * Helper function for error checking after strtol() and the like
  */
 static int check_strtox_error(const char *nptr, char *ep,
-                              const char **endptr, int libc_errno)
+                              const char **endptr, bool check_zero,
+                              int libc_errno)
 {
     assert(ep >= nptr);
+
+    /* Windows has a bug in that it fails to parse 0 from "0x" in base 16 */
+    if (check_zero && ep == nptr && libc_errno == 0) {
+        char *tmp;
+
+        errno = 0;
+        if (strtol(nptr, &tmp, 10) == 0 && errno == 0 &&
+            (*tmp == 'x' || *tmp == 'X')) {
+            ep = tmp;
+        }
+    }
+
     if (endptr) {
         *endptr = ep;
     }
@@ -465,7 +478,7 @@ int qemu_strtoi(const char *nptr, const char **endptr, int base,
     } else {
         *result = lresult;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, lresult == 0, errno);
 }
 
 /**
@@ -524,7 +537,7 @@ int qemu_strtoui(const char *nptr, const char **endptr, int base,
             *result = lresult;
         }
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, lresult == 0, errno);
 }
 
 /**
@@ -566,7 +579,7 @@ int qemu_strtol(const char *nptr, const char **endptr, int base,
 
     errno = 0;
     *result = strtol(nptr, &ep, base);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -613,7 +626,7 @@ int qemu_strtoul(const char *nptr, const char **endptr, int base,
     if (errno == ERANGE) {
         *result = -1;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -639,7 +652,7 @@ int qemu_strtoi64(const char *nptr, const char **endptr, int base,
     QEMU_BUILD_BUG_ON(sizeof(int64_t) != sizeof(long long));
     errno = 0;
     *result = strtoll(nptr, &ep, base);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -668,7 +681,7 @@ int qemu_strtou64(const char *nptr, const char **endptr, int base,
     if (errno == ERANGE) {
         *result = -1;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -708,7 +721,7 @@ int qemu_strtod(const char *nptr, const char **endptr, double *result)
 
     errno = 0;
     *result = strtod(nptr, &ep);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, false, errno);
 }
 
 /**
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* Re: [PATCH for 6.0 v1 00/14] fixes for rc1 (kernel-doc, semihosting, testing)
  2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
                   ` (13 preceding siblings ...)
  2021-03-20 13:37 ` [PATCH v1 14/14] utils: Work around mingw strto*l bug with 0x Alex Bennée
@ 2021-03-20 13:54 ` no-reply
  14 siblings, 0 replies; 149+ messages in thread
From: no-reply @ 2021-03-20 13:54 UTC (permalink / raw)
  To: alex.bennee; +Cc: alex.bennee, qemu-devel

Patchew URL: https://patchew.org/QEMU/20210320133706.21475-1-alex.bennee@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20210320133706.21475-1-alex.bennee@linaro.org
Subject: [PATCH for 6.0 v1 00/14] fixes for rc1 (kernel-doc, semihosting, testing)

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20210320133706.21475-1-alex.bennee@linaro.org -> patchew/20210320133706.21475-1-alex.bennee@linaro.org
Switched to a new branch 'test'
2fe05ca utils: Work around mingw strto*l bug with 0x
c791580 utils: Tighter tests for qemu_strtosz
2b30091 cirrus.yml: Update the FreeBSD task to version 12.2
9a32f92 configure: Don't use the __atomic_*_16 functions for testing 128-bit support
411f58c gitlab-ci.yml: Merge the trace-backend testing into other jobs
f9008ed tests/tcg: add HeapInfo checking to semihosting test
c7fc498 linux-user/riscv: initialise the TaskState heap/stack info
64f8850 semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
4346991 semihosting/arm-compat-semi: unify GET/SET_ARG helpers
736c595 semihosting: move semihosting tests to multiarch
521038a tools/virtiofsd: include --socket-group in help
7a9f5fc docs/devel: expand style section of memory management
2d7c361 docs/devel: include the plugin API information from the headers
f4fed9c scripts/kernel-doc: strip QEMU_ from function definitions

=== OUTPUT BEGIN ===
1/14 Checking commit f4fed9c2b4ea (scripts/kernel-doc: strip QEMU_ from function definitions)
2/14 Checking commit 2d7c36108cba (docs/devel: include the plugin API information from the headers)
3/14 Checking commit 7a9f5fcce8d9 (docs/devel: expand style section of memory management)
4/14 Checking commit 521038a4b304 (tools/virtiofsd: include --socket-group in help)
5/14 Checking commit 736c59564aea (semihosting: move semihosting tests to multiarch)
6/14 Checking commit 4346991f6330 (semihosting/arm-compat-semi: unify GET/SET_ARG helpers)
7/14 Checking commit 64f885005bcc (semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO)
8/14 Checking commit c7fc498483de (linux-user/riscv: initialise the TaskState heap/stack info)
9/14 Checking commit f9008edfe887 (tests/tcg: add HeapInfo checking to semihosting test)
10/14 Checking commit 411f58c7842f (gitlab-ci.yml: Merge the trace-backend testing into other jobs)
11/14 Checking commit 9a32f927b913 (configure: Don't use the __atomic_*_16 functions for testing 128-bit support)
12/14 Checking commit 2b30091c3c73 (cirrus.yml: Update the FreeBSD task to version 12.2)
13/14 Checking commit c7915804f46b (utils: Tighter tests for qemu_strtosz)
14/14 Checking commit 2fe05ca4258e (utils: Work around mingw strto*l bug with 0x)
ERROR: consider using qemu_strtol in preference to strtol
#144: FILE: util/cutils.c:409:
+        if (strtol(nptr, &tmp, 10) == 0 && errno == 0 &&

total: 1 errors, 0 warnings, 169 lines checked

Patch 14/14 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20210320133706.21475-1-alex.bennee@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 03/14] docs/devel: expand style section of memory management
  2021-03-20 13:36 ` [PATCH v1 03/14] docs/devel: expand style section of memory management Alex Bennée
@ 2021-03-20 16:00   ` Richard Henderson
  0 siblings, 0 replies; 149+ messages in thread
From: Richard Henderson @ 2021-03-20 16:00 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel

On 3/20/21 7:36 AM, Alex Bennée wrote:
> This aims to provide a bit more guidance for those who take on one of
> our "clean up memory allocation" bite-sized tasks.
> 
> Signed-off-by: Alex Bennée<alex.bennee@linaro.org>
> ---
>   docs/devel/style.rst | 46 ++++++++++++++++++++++++++++++++------------
>   1 file changed, 34 insertions(+), 12 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 05/14] semihosting: move semihosting tests to multiarch
  2021-03-20 13:36 ` [PATCH v1 05/14] semihosting: move semihosting tests to multiarch Alex Bennée
@ 2021-03-20 16:03   ` Richard Henderson
  0 siblings, 0 replies; 149+ messages in thread
From: Richard Henderson @ 2021-03-20 16:03 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel
  Cc: Peter Maydell, open list:ARM TCG CPUs, Philippe Mathieu-Daudé

On 3/20/21 7:36 AM, Alex Bennée wrote:
> It may be arm-compat-semihosting but more than one architecture uses
> it so lets move the tests into the multiarch area. We gate it on the
> feature and split the semicall.h header between the arches.
> 
> Also clean-up a bit of the Makefile messing about to one common set of
> runners.
> 
> Signed-off-by: Alex Bennée<alex.bennee@linaro.org>
> Message-Id:<20210312102029.17017-2-alex.bennee@linaro.org>

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 01/14] scripts/kernel-doc: strip QEMU_ from function definitions
  2021-03-20 13:36 ` [PATCH v1 01/14] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
@ 2021-03-20 16:04   ` Richard Henderson
  0 siblings, 0 replies; 149+ messages in thread
From: Richard Henderson @ 2021-03-20 16:04 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel

On 3/20/21 7:36 AM, Alex Bennée wrote:
> Some packaged versions of Sphinx (fedora33/alpine so far) have issues
> with the annotated C code that kernel-doc spits out. Without knowing
> about things like QEMU_PLUGIN_EXPORT it chokes trying to understand
> the code. Evidently this is a problem for the kernel as well as the
> long stream of regex substitutions we add to in this patch can attest.
> 
> Fortunately we have a fairly common format for all our compiler
> shenanigans as applied to functions so lets just filter them all out.
> 
> Signed-off-by: Alex Bennée<alex.bennee@linaro.org>
> ---

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 08/14] linux-user/riscv: initialise the TaskState heap/stack info
  2021-03-20 13:37 ` [PATCH v1 08/14] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
@ 2021-03-20 16:05   ` Richard Henderson
  0 siblings, 0 replies; 149+ messages in thread
From: Richard Henderson @ 2021-03-20 16:05 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel; +Cc: Laurent Vivier

On 3/20/21 7:37 AM, Alex Bennée wrote:
> Arguably the target_cpu_copy_regs function for each architecture is
> misnamed as a number of the architectures also take the opportunity to
> fill out the TaskState structure. This could arguably be factored out
> into common code but that would require a wider audit of the
> architectures. For now just replicate for riscv so we can correctly
> report semihosting information for SYS_HEAPINFO.
> 
> Signed-off-by: Alex Bennée<alex.bennee@linaro.org>
> Message-Id:<20210312102029.17017-5-alex.bennee@linaro.org>
> ---
>   linux-user/riscv/cpu_loop.c | 5 +++++
>   1 file changed, 5 insertions(+)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 09/14] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-20 13:37 ` [PATCH v1 09/14] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
@ 2021-03-20 16:11   ` Richard Henderson
  0 siblings, 0 replies; 149+ messages in thread
From: Richard Henderson @ 2021-03-20 16:11 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel

On 3/20/21 7:37 AM, Alex Bennée wrote:
> +    if (info.heap_base == NULL || info.heap_limit == NULL) {
> +        printf("null heap: %p -> %p\n", info.heap_base, info.heap_limit);
> +        exit(1);
> +    } else if (info.heap_base != NULL && info.heap_limit != NULL) {

Useless inversion of first test?

> +    if (info.stack_base == NULL) {
> +        printf("null stack: %p -> %p\n", info.stack_base, info.stack_limit);
> +        exit(3);
> +    } else if (info.stack_base != NULL && info.stack_limit != NULL) {

So... we're expecting stack_limit unset is valid?

Perhaps a check that stack and heap do not intersect?
Perhaps a check that &info is within the stack bounds?


r~


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 04/14] tools/virtiofsd: include --socket-group in help
  2021-03-20 13:36 ` [PATCH v1 04/14] tools/virtiofsd: include --socket-group in help Alex Bennée
@ 2021-03-22 11:46   ` Stefan Hajnoczi
  0 siblings, 0 replies; 149+ messages in thread
From: Stefan Hajnoczi @ 2021-03-22 11:46 UTC (permalink / raw)
  To: Alex Bennée; +Cc: Connor Kuehl, qemu-devel, Dr. David Alan Gilbert

[-- Attachment #1: Type: text/plain, Size: 616 bytes --]

On Sat, Mar 20, 2021 at 01:36:56PM +0000, Alex Bennée wrote:
> I confused myself wandering if this had been merged by looking at the
> help output. It seems fuse_opt doesn't automagically add to help
> output so lets do it now.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Connor Kuehl <ckuehl@redhat.com>
> Updates: f6698f2b03 ("tools/virtiofsd: add support for --socket-group")
> Message-Id: <20210318100911.16261-1-alex.bennee@linaro.org>
> ---
>  tools/virtiofsd/fuse_lowlevel.c | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v1 10/14] gitlab-ci.yml: Merge the trace-backend testing into other jobs
  2021-03-20 13:37 ` [PATCH v1 10/14] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
@ 2021-03-22 17:03   ` Willian Rampazzo
  0 siblings, 0 replies; 149+ messages in thread
From: Willian Rampazzo @ 2021-03-22 17:03 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Willian Rampazzo, Thomas Huth, qemu-devel,
	Wainer dos Santos Moschetta, Philippe Mathieu-Daudé

On Sat, Mar 20, 2021 at 10:37 AM Alex Bennée <alex.bennee@linaro.org> wrote:
>
> From: Thomas Huth <thuth@redhat.com>
>
> Our gitlab-ci got quite slow in the past weeks, due to the immense amount
> of jobs that we have, so we should try to reduce the number of jobs.
> There is no real good reason for having separate jobs just to test the
> trace backends, we can do this just fine in other jobs, too.
>
> Signed-off-by: Thomas Huth <thuth@redhat.com>
> Message-Id: <20210319095726.45965-1-thuth@redhat.com>
> Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>  .gitlab-ci.yml | 30 +++---------------------------
>  1 file changed, 3 insertions(+), 27 deletions(-)
>

Reviewed-by: Willian Rampazzo <willianr@redhat.com>



^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing)
@ 2021-03-23 16:52 Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 01/22] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
                   ` (23 more replies)
  0 siblings, 24 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée

Hi,

I've added a testing patch to extend the CFI times, Laurent's series
to fix the iotest regressions currently keeping the CI from going
green and an optimisation to the --enable-docs build to try and start
bringing the total CI time down a bit. rc0 is being tagged today so
I'll probably roll a PR from this later in the week in time for rc1.

The following are still need review:

 - tests/tcg: add HeapInfo checking to semihosting test

Alex Bennée (11):
  scripts/kernel-doc: strip QEMU_ from function definitions
  docs/devel: include the plugin API information from the headers
  docs/devel: expand style section of memory management
  tools/virtiofsd: include --socket-group in help
  semihosting: move semihosting tests to multiarch
  semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  linux-user/riscv: initialise the TaskState heap/stack info
  tests/tcg: add HeapInfo checking to semihosting test
  gitlab: extend timeouts for CFI builds
  gitlab: default to not building the documentation

Eric Blake (2):
  utils: Tighter tests for qemu_strtosz
  utils: Work around mingw strto*l bug with 0x

Laurent Vivier (6):
  qdev: define list of archs with virtio-pci or virtio-ccw
  m68k: add the virtio devices aliases
  blockdev: with -drive if=virtio, use generic virtio-blk
  iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"
  iotests: test m68k with the virt machine
  iotests: iothreads need ioeventfd

Thomas Huth (3):
  gitlab-ci.yml: Merge the trace-backend testing into other jobs
  configure: Don't use the __atomic_*_16 functions for testing 128-bit
    support
  cirrus.yml: Update the FreeBSD task to version 12.2

 docs/devel/style.rst                          |  46 +++--
 docs/devel/tcg-plugins.rst                    |   5 +
 configure                                     |   6 +-
 include/sysemu/arch_init.h                    |   9 +
 tests/tcg/aarch64/semicall.h                  |  18 ++
 tests/tcg/arm/semicall.h                      |  15 +-
 tests/tcg/riscv64/semicall.h                  |  22 +++
 blockdev.c                                    |   6 +-
 linux-user/riscv/cpu_loop.c                   |   5 +
 semihosting/arm-compat-semi.c                 |  62 +++----
 softmmu/qdev-monitor.c                        |  65 ++++---
 tests/tcg/arm/semihosting.c                   |  26 ---
 .../arm-compat-semi}/semiconsole.c            |   2 +
 .../multiarch/arm-compat-semi/semihosting.c   |  82 +++++++++
 tests/unit/test-cutils.c                      | 171 +++++++++++++++++-
 tools/virtiofsd/fuse_lowlevel.c               |   1 +
 util/cutils.c                                 |  33 +++-
 .cirrus.yml                                   |   7 +-
 .gitlab-ci.d/crossbuilds.yml                  |  15 +-
 .gitlab-ci.yml                                |  43 ++---
 MAINTAINERS                                   |   1 +
 scripts/kernel-doc                            |   3 +
 tests/qemu-iotests/040                        |   2 +-
 tests/qemu-iotests/051                        |  12 +-
 tests/qemu-iotests/051.out                    |   2 +-
 tests/qemu-iotests/051.pc.out                 |   2 +-
 tests/qemu-iotests/068                        |   4 +-
 tests/qemu-iotests/093                        |   3 +-
 tests/qemu-iotests/127                        |   3 +-
 tests/qemu-iotests/139                        |   9 +-
 tests/qemu-iotests/182                        |  13 +-
 tests/qemu-iotests/238                        |   4 +-
 tests/qemu-iotests/240                        |  10 +-
 tests/qemu-iotests/256                        |   6 +-
 tests/qemu-iotests/257                        |   4 +-
 tests/qemu-iotests/307                        |   4 +-
 tests/qemu-iotests/common.rc                  |  13 ++
 tests/qemu-iotests/iotests.py                 |  10 +-
 tests/qemu-iotests/testenv.py                 |   1 +
 tests/tcg/Makefile.target                     |   3 +
 tests/tcg/aarch64/Makefile.target             |  18 --
 tests/tcg/arm/Makefile.target                 |  22 +--
 tests/tcg/multiarch/Makefile.target           |  31 ++++
 43 files changed, 548 insertions(+), 271 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 delete mode 100644 tests/tcg/arm/semihosting.c
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 create mode 100644 tests/tcg/multiarch/arm-compat-semi/semihosting.c

-- 
2.20.1



^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PATCH v2 01/22] scripts/kernel-doc: strip QEMU_ from function definitions
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 02/22] docs/devel: include the plugin API information from the headers Alex Bennée
                   ` (22 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Richard Henderson, Alex Bennée

Some packaged versions of Sphinx (fedora33/alpine so far) have issues
with the annotated C code that kernel-doc spits out. Without knowing
about things like QEMU_PLUGIN_EXPORT it chokes trying to understand
the code. Evidently this is a problem for the kernel as well as the
long stream of regex substitutions we add to in this patch can attest.

Fortunately we have a fairly common format for all our compiler
shenanigans as applied to functions so lets just filter them all out.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210320133706.21475-2-alex.bennee@linaro.org>
---
 scripts/kernel-doc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/scripts/kernel-doc b/scripts/kernel-doc
index 4b19851b2d..240923d509 100755
--- a/scripts/kernel-doc
+++ b/scripts/kernel-doc
@@ -1745,6 +1745,9 @@ sub dump_function($$) {
             )+
           \)\)\s+//x;
 
+    # Strip QEMU specific compiler annotations
+    $prototype =~ s/QEMU_[A-Z_]+ +//;
+
     # Yes, this truly is vile.  We are looking for:
     # 1. Return type (may be nothing if we're looking at a macro)
     # 2. Function name
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 02/22] docs/devel: include the plugin API information from the headers
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 01/22] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 03/22] docs/devel: expand style section of memory management Alex Bennée
                   ` (21 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Aaron Lindsay, Alex Bennée

We have kerneldoc tags for the headers so we might as well extract
them into our developer documentation whilst we are at it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Message-Id: <20210312172821.31647-4-alex.bennee@linaro.org>
Message-Id: <20210320133706.21475-3-alex.bennee@linaro.org>
---
 docs/devel/tcg-plugins.rst | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst
index 39ce86ed96..18c6581d85 100644
--- a/docs/devel/tcg-plugins.rst
+++ b/docs/devel/tcg-plugins.rst
@@ -63,6 +63,11 @@ valid during the lifetime of the callback so it is important that any
 information that is needed is extracted during the callback and saved
 by the plugin.
 
+API
+===
+
+.. kernel-doc:: include/qemu/qemu-plugin.h
+
 Usage
 =====
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 03/22] docs/devel: expand style section of memory management
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 01/22] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 02/22] docs/devel: include the plugin API information from the headers Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 04/22] tools/virtiofsd: include --socket-group in help Alex Bennée
                   ` (20 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Richard Henderson, Alex Bennée

This aims to provide a bit more guidance for those who take on one of
our "clean up memory allocation" bite-sized tasks.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210320133706.21475-4-alex.bennee@linaro.org>
---
 docs/devel/style.rst | 46 ++++++++++++++++++++++++++++++++------------
 1 file changed, 34 insertions(+), 12 deletions(-)

diff --git a/docs/devel/style.rst b/docs/devel/style.rst
index 8b0bdb3570..260e3263fa 100644
--- a/docs/devel/style.rst
+++ b/docs/devel/style.rst
@@ -385,17 +385,37 @@ avoided.
 Low level memory management
 ===========================
 
-Use of the malloc/free/realloc/calloc/valloc/memalign/posix_memalign
+Use of the ``malloc/free/realloc/calloc/valloc/memalign/posix_memalign``
 APIs is not allowed in the QEMU codebase. Instead of these routines,
-use the GLib memory allocation routines g_malloc/g_malloc0/g_new/
-g_new0/g_realloc/g_free or QEMU's qemu_memalign/qemu_blockalign/qemu_vfree
-APIs.
-
-Please note that g_malloc will exit on allocation failure, so there
-is no need to test for failure (as you would have to with malloc).
-Calling g_malloc with a zero size is valid and will return NULL.
-
-Prefer g_new(T, n) instead of g_malloc(sizeof(T) ``*`` n) for the following
+use the GLib memory allocation routines
+``g_malloc/g_malloc0/g_new/g_new0/g_realloc/g_free``
+or QEMU's ``qemu_memalign/qemu_blockalign/qemu_vfree`` APIs.
+
+Please note that ``g_malloc`` will exit on allocation failure, so
+there is no need to test for failure (as you would have to with
+``malloc``). Generally using ``g_malloc`` on start-up is fine as the
+result of a failure to allocate memory is going to be a fatal exit
+anyway. There may be some start-up cases where failing is unreasonable
+(for example speculatively loading a large debug symbol table).
+
+Care should be taken to avoid introducing places where the guest could
+trigger an exit by causing a large allocation. For small allocations,
+of the order of 4k, a failure to allocate is likely indicative of an
+overloaded host and allowing ``g_malloc`` to ``exit`` is a reasonable
+approach. However for larger allocations where we could realistically
+fall-back to a smaller one if need be we should use functions like
+``g_try_new`` and check the result. For example this is valid approach
+for a time/space trade-off like ``tlb_mmu_resize_locked`` in the
+SoftMMU TLB code.
+
+If the lifetime of the allocation is within the function and there are
+multiple exist paths you can also improve the readability of the code
+by using ``g_autofree`` and related annotations. See :ref:`autofree-ref`
+for more details.
+
+Calling ``g_malloc`` with a zero size is valid and will return NULL.
+
+Prefer ``g_new(T, n)`` instead of ``g_malloc(sizeof(T) * n)`` for the following
 reasons:
 
 * It catches multiplication overflowing size_t;
@@ -409,8 +429,8 @@ Declarations like
 
 are acceptable, though.
 
-Memory allocated by qemu_memalign or qemu_blockalign must be freed with
-qemu_vfree, since breaking this will cause problems on Win32.
+Memory allocated by ``qemu_memalign`` or ``qemu_blockalign`` must be freed with
+``qemu_vfree``, since breaking this will cause problems on Win32.
 
 String manipulation
 ===================
@@ -485,6 +505,8 @@ In addition, QEMU assumes that the compiler does not use the latitude
 given in C99 and C11 to treat aspects of signed '<<' as undefined, as
 documented in the GNU Compiler Collection manual starting at version 4.0.
 
+.. _autofree-ref:
+
 Automatic memory deallocation
 =============================
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 04/22] tools/virtiofsd: include --socket-group in help
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (2 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 03/22] docs/devel: expand style section of memory management Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 05/22] semihosting: move semihosting tests to multiarch Alex Bennée
                   ` (19 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel
  Cc: Connor Kuehl, Alex Bennée, Dr. David Alan Gilbert, Stefan Hajnoczi

I confused myself wandering if this had been merged by looking at the
help output. It seems fuse_opt doesn't automagically add to help
output so lets do it now.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Connor Kuehl <ckuehl@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Updates: f6698f2b03 ("tools/virtiofsd: add support for --socket-group")
Message-Id: <20210318100911.16261-1-alex.bennee@linaro.org>
Message-Id: <20210320133706.21475-5-alex.bennee@linaro.org>
---
 tools/virtiofsd/fuse_lowlevel.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tools/virtiofsd/fuse_lowlevel.c b/tools/virtiofsd/fuse_lowlevel.c
index 1aa26c6333..58e32fc963 100644
--- a/tools/virtiofsd/fuse_lowlevel.c
+++ b/tools/virtiofsd/fuse_lowlevel.c
@@ -2450,6 +2450,7 @@ void fuse_lowlevel_help(void)
     printf(
         "    -o allow_root              allow access by root\n"
         "    --socket-path=PATH         path for the vhost-user socket\n"
+        "    --socket-group=GRNAME      name of group for the vhost-user socket\n"
         "    --fd=FDNUM                 fd number of vhost-user socket\n"
         "    --thread-pool-size=NUM     thread pool size limit (default %d)\n",
         THREAD_POOL_SIZE);
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 05/22] semihosting: move semihosting tests to multiarch
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (3 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 04/22] tools/virtiofsd: include --socket-group in help Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 06/22] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
                   ` (18 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel
  Cc: Richard Henderson, open list:ARM TCG CPUs, Alex Bennée,
	Philippe Mathieu-Daudé,
	Peter Maydell

It may be arm-compat-semihosting but more than one architecture uses
it so lets move the tests into the multiarch area. We gate it on the
feature and split the semicall.h header between the arches.

Also clean-up a bit of the Makefile messing about to one common set of
runners.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210312102029.17017-2-alex.bennee@linaro.org>
Message-Id: <20210320133706.21475-6-alex.bennee@linaro.org>
---
 tests/tcg/aarch64/semicall.h                  | 18 +++++++++++
 tests/tcg/arm/semicall.h                      | 15 +--------
 tests/tcg/riscv64/semicall.h                  | 22 +++++++++++++
 .../arm-compat-semi}/semiconsole.c            |  2 ++
 .../arm-compat-semi}/semihosting.c            |  5 ++-
 MAINTAINERS                                   |  1 +
 tests/tcg/Makefile.target                     |  3 ++
 tests/tcg/aarch64/Makefile.target             | 18 -----------
 tests/tcg/arm/Makefile.target                 | 22 ++++++-------
 tests/tcg/multiarch/Makefile.target           | 31 +++++++++++++++++++
 10 files changed, 91 insertions(+), 46 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semihosting.c (85%)

diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h
new file mode 100644
index 0000000000..8a3fce35c5
--- /dev/null
+++ b/tests/tcg/aarch64/semicall.h
@@ -0,0 +1,18 @@
+/*
+ * Semihosting Tests - AArch64 helper
+ *
+ * Copyright (c) 2019
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("x0") = type;
+    register uintptr_t a0 asm("x1") = arg0;
+    asm("hlt 0xf000"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h
index d4f6818192..ad8ac51310 100644
--- a/tests/tcg/arm/semicall.h
+++ b/tests/tcg/arm/semicall.h
@@ -1,5 +1,5 @@
 /*
- * Semihosting Tests
+ * Semihosting Tests - ARM Helper
  *
  * Copyright (c) 2019
  * Written by Alex Bennée <alex.bennee@linaro.org>
@@ -7,13 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
-#define SYS_WRITE0      0x04
-#define SYS_READC       0x07
-#define SYS_REPORTEXC   0x18
-
 uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 {
-#if defined(__arm__)
     register uintptr_t t asm("r0") = type;
     register uintptr_t a0 asm("r1") = arg0;
 #ifdef __thumb__
@@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 #endif
     asm(SVC : "=r" (t)
         : "r" (t), "r" (a0));
-#else
-    register uintptr_t t asm("x0") = type;
-    register uintptr_t a0 asm("x1") = arg0;
-    asm("hlt 0xf000"
-        : "=r" (t)
-        : "r" (t), "r" (a0));
-#endif
-
     return t;
 }
diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h
new file mode 100644
index 0000000000..f8c88f32dc
--- /dev/null
+++ b/tests/tcg/riscv64/semicall.h
@@ -0,0 +1,22 @@
+/*
+ * Semihosting Tests - RiscV64 Helper
+ *
+ * Copyright (c) 2021
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("a0") = type;
+    register uintptr_t a0 asm("a1") = arg0;
+    asm(".option norvc\n\t"
+        ".balign 16\n\t"
+        "slli zero, zero, 0x1f\n\t"
+        "ebreak\n\t"
+        "srai zero, zero, 0x7\n\t"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
similarity index 93%
rename from tests/tcg/arm/semiconsole.c
rename to tests/tcg/multiarch/arm-compat-semi/semiconsole.c
index 6ef0bd2450..1d82efc589 100644
--- a/tests/tcg/arm/semiconsole.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_READC       0x07
+
 #include <stdio.h>
 #include <stdint.h>
 #include "semicall.h"
diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
similarity index 85%
rename from tests/tcg/arm/semihosting.c
rename to tests/tcg/multiarch/arm-compat-semi/semihosting.c
index 33faac9916..b3fd16cd12 100644
--- a/tests/tcg/arm/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -7,12 +7,15 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_WRITE0      0x04
+#define SYS_REPORTEXC   0x18
+
 #include <stdint.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
 {
-#if defined(__arm__)
+#if UINTPTR_MAX == UINT32_MAX
     uintptr_t exit_code = 0x20026;
 #else
     uintptr_t exit_block[2] = {0x20026, 0};
diff --git a/MAINTAINERS b/MAINTAINERS
index 9147e9a429..8249014614 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3284,6 +3284,7 @@ M: Alex Bennée <alex.bennee@linaro.org>
 S: Maintained
 F: semihosting/
 F: include/semihosting/
+F: tests/tcg/multiarch/arm-compat-semi/
 
 Multi-process QEMU
 M: Elena Ufimtseva <elena.ufimtseva@oracle.com>
diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target
index 24d75a5801..cab8c6b3a2 100644
--- a/tests/tcg/Makefile.target
+++ b/tests/tcg/Makefile.target
@@ -32,6 +32,9 @@
 all:
 -include ../../../config-host.mak
 -include ../config-$(TARGET).mak
+ifeq ($(CONFIG_USER_ONLY),y)
+-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak
+endif
 
 # for including , in command strings
 COMMA := ,
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index bf53ad0087..56e48f4b34 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -41,24 +41,6 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4
 mte-%: CFLAGS += -march=armv8.5-a+memtag
 endif
 
-# Semihosting smoke test for linux-user
-AARCH64_TESTS += semihosting
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
-
-run-plugin-semihosting-with-%:
-	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
-		 $(call strip-plugin,$<) 2> $<.err, \
-		"$< on $(TARGET_NAME) with $*")
-
-AARCH64_TESTS += semiconsole
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
 ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
 # System Registers Tests
 AARCH64_TESTS += sysregs
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index ec95156562..5ab59ed6ce 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -29,37 +29,31 @@ run-fcvt: fcvt
 	$(call run-test,fcvt,$(QEMU) $<,"$< on $(TARGET_NAME)")
 	$(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref)
 
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+
 # Semihosting smoke test for linux-user
-ARM_TESTS += semihosting
 semihosting: CFLAGS += -mthumb
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
 ARM_TESTS += semihosting-arm
-semihosting-arm: CFLAGS += -marm
+semihosting-arm: CFLAGS += -marm -I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
 semihosting-arm: semihosting.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semihosting-arm: semihosting-arm
 	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
-run-plugin-semihosting-with-%:
+run-plugin-semihosting-arm-with-%:
 	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
 		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
 		 $(call strip-plugin,$<) 2> $<.err, \
 		"$< on $(TARGET_NAME) with $*")
 
-ARM_TESTS += semiconsole semiconsole-arm
+ARM_TESTS += semiconsole-arm
 
 semiconsole: CFLAGS += -mthumb
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
 
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
-semiconsole-arm: CFLAGS += -marm
-semiconsole-arm: semiconsole.c
+semiconsole-arm: CFLAGS += -marm -I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+semiconsole-arm: semihosting.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semiconsole-arm: semiconsole-arm
@@ -68,6 +62,8 @@ run-semiconsole-arm: semiconsole-arm
 run-plugin-semiconsole-arm-with-%:
 	$(call skip-test, $<, "MANUAL ONLY")
 
+endif
+
 ARM_TESTS += commpage
 
 TESTS += $(ARM_TESTS)
diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target
index abbdb2e126..a3a751723d 100644
--- a/tests/tcg/multiarch/Makefile.target
+++ b/tests/tcg/multiarch/Makefile.target
@@ -69,6 +69,37 @@ run-gdbstub-%:
 endif
 EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read
 
+# ARM Compatible Semi Hosting Tests
+#
+# Despite having ARM in the name we actually have several
+# architectures that implement it. We gate the tests on the feature
+# appearing in config.
+#
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+VPATH += $(MULTIARCH_SRC)/arm-compat-semi
+
+# Add -I path back to TARGET_NAME for semicall.h
+semihosting: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semihosting: semihosting
+	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
+
+run-plugin-semihosting-with-%:
+	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
+		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
+		 $(call strip-plugin,$<) 2> $<.err, \
+		"$< on $(TARGET_NAME) with $*")
+
+semiconsole: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semiconsole: semiconsole
+	$(call skip-test, $<, "MANUAL ONLY")
+
+run-plugin-semiconsole-with-%:
+	$(call skip-test, $<, "MANUAL ONLY")
+
+TESTS += semihosting semiconsole
+endif
 
 # Update TESTS
 TESTS += $(MULTIARCH_TESTS)
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 06/22] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (4 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 05/22] semihosting: move semihosting tests to multiarch Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
                   ` (17 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, Keith Packard, Alex Bennée

>>From the semihosting point of view what we want to know is the current
mode of the processor. Unify this into a single helper and allow us to
use the same GET/SET_ARG helpers for the rest of the code. Having the
helper will also be useful later.

Note: we aren't currently testing riscv32 due to missing toolchain for
check-tcg tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Message-Id: <20210312102029.17017-3-alex.bennee@linaro.org>
Message-Id: <20210320133706.21475-7-alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 56 ++++++++++++-----------------------
 1 file changed, 19 insertions(+), 37 deletions(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 94950b6c56..0f0e129a7c 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] = {
     },
 };
 
-/* Read the input value from the argument block; fail the semihosting
- * call if the memory read fails.
+/*
+ * Read the input value from the argument block; fail the semihosting
+ * call if the memory read fails. Eventually we could use a generic
+ * CPUState helper function here.
  */
-#ifdef TARGET_ARM
+static inline bool is_64bit_semihosting(CPUArchState *env)
+{
+#if defined(TARGET_ARM)
+    return is_a64(env);
+#elif defined(TARGET_RISCV)
+    return !riscv_cpu_is_32bit(env);
+#else
+#error un-handled architecture
+#endif
+}
+
+
 #define GET_ARG(n) do {                                 \
-    if (is_a64(env)) {                                  \
+    if (is_64bit_semihosting(env)) {                    \
         if (get_user_u64(arg ## n, args + (n) * 8)) {   \
             errno = EFAULT;                             \
-            return set_swi_errno(cs, -1);              \
+            return set_swi_errno(cs, -1);               \
         }                                               \
     } else {                                            \
         if (get_user_u32(arg ## n, args + (n) * 4)) {   \
@@ -786,41 +799,10 @@ static const GuestFDFunctions guestfd_fns[] = {
 } while (0)
 
 #define SET_ARG(n, val)                                 \
-    (is_a64(env) ?                                      \
+    (is_64bit_semihosting(env) ?                        \
      put_user_u64(val, args + (n) * 8) :                \
      put_user_u32(val, args + (n) * 4))
-#endif
 
-#ifdef TARGET_RISCV
-
-/*
- * get_user_ual is defined as get_user_u32 in softmmu-semi.h,
- * we need a macro that fetches a target_ulong
- */
-#define get_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     get_user_u64(arg, p) :                     \
-     get_user_u32(arg, p))
-
-/*
- * put_user_ual is defined as put_user_u32 in softmmu-semi.h,
- * we need a macro that stores a target_ulong
- */
-#define put_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     put_user_u64(arg, p) :                     \
-     put_user_u32(arg, p))
-
-#define GET_ARG(n) do {                                                 \
-        if (get_user_utl(arg ## n, args + (n) * sizeof(target_ulong))) { \
-            errno = EFAULT;                                             \
-            return set_swi_errno(cs, -1);                              \
-        }                                                               \
-    } while (0)
-
-#define SET_ARG(n, val)                                 \
-    put_user_utl(val, args + (n) * sizeof(target_ulong))
-#endif
 
 /*
  * Do a semihosting call.
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (5 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 06/22] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52   ` [Bug 1915925] " Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 08/22] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
                   ` (16 subsequent siblings)
  23 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Peter Maydell, Keith Packard, Alex Bennée, Bug 1915925

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Bug: https://bugs.launchpad.net/bugs/1915925
Message-Id: <20210312102029.17017-4-alex.bennee@linaro.org>
Message-Id: <20210320133706.21475-8-alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [Bug 1915925] [PATCH v2 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-23 16:52 ` [PATCH v2 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-23 16:52   ` Alex Bennée
  0 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Bug: https://bugs.launchpad.net/bugs/1915925
Message-Id: <20210312102029.17017-4-alex.bennee@linaro.org>
Message-Id: <20210320133706.21475-8-alex.bennee@linaro.org>
---
 semihosting/arm-compat-semi.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  In Progress

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 08/22] linux-user/riscv: initialise the TaskState heap/stack info
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (6 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 21:29   ` Alistair Francis
  2021-03-23 16:52 ` [PATCH v2 09/22] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
                   ` (15 subsequent siblings)
  23 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Richard Henderson, Alex Bennée, Laurent Vivier

Arguably the target_cpu_copy_regs function for each architecture is
misnamed as a number of the architectures also take the opportunity to
fill out the TaskState structure. This could arguably be factored out
into common code but that would require a wider audit of the
architectures. For now just replicate for riscv so we can correctly
report semihosting information for SYS_HEAPINFO.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210312102029.17017-5-alex.bennee@linaro.org>
Message-Id: <20210320133706.21475-9-alex.bennee@linaro.org>
---
 linux-user/riscv/cpu_loop.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c
index 6767f941e8..74a9628dc9 100644
--- a/linux-user/riscv/cpu_loop.c
+++ b/linux-user/riscv/cpu_loop.c
@@ -135,4 +135,9 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
         error_report("Incompatible ELF: RVE cpu requires RVE ABI binary");
         exit(EXIT_FAILURE);
     }
+
+    ts->stack_base = info->start_stack;
+    ts->heap_base = info->brk;
+    /* This will be filled in on the first SYS_HEAPINFO call.  */
+    ts->heap_limit = 0;
 }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 09/22] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (7 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 08/22] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-24  6:11   ` Thomas Huth
  2021-03-24 14:09   ` Richard Henderson
  2021-03-23 16:52 ` [PATCH v2 10/22] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
                   ` (14 subsequent siblings)
  23 siblings, 2 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée

Query the SYS_HEAPINFO semicall and do some basic verification of the
information via libc calls.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210320133706.21475-10-alex.bennee@linaro.org>

---
v2
  - expand test as suggested by Richard
---
 .../multiarch/arm-compat-semi/semihosting.c   | 55 ++++++++++++++++++-
 1 file changed, 54 insertions(+), 1 deletion(-)

diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
index b3fd16cd12..8627eee3cf 100644
--- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -8,9 +8,13 @@
  */
 
 #define SYS_WRITE0      0x04
+#define SYS_HEAPINFO    0x16
 #define SYS_REPORTEXC   0x18
 
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
@@ -21,8 +25,57 @@ int main(int argc, char *argv[argc])
     uintptr_t exit_block[2] = {0x20026, 0};
     uintptr_t exit_code = (uintptr_t) &exit_block;
 #endif
+    struct {
+        void *heap_base;
+        void *heap_limit;
+        void *stack_base;
+        void *stack_limit;
+    } info;
+    void *ptr_to_info = (void *) &info;
 
-    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
+    __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n");
+
+    memset(&info, 0, sizeof(info));
+    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
+
+    if (info.heap_base == NULL || info.heap_limit == NULL) {
+        printf("null heap: %p -> %p\n", info.heap_base, info.heap_limit);
+        exit(1);
+    }
+
+    /* Error if heap base is above limit */
+    if ((uintptr_t) info.heap_base >= (uintptr_t) info.heap_limit) {
+        printf("heap base %p >= heap_limit %p\n",
+               info.heap_base, info.heap_limit);
+        exit(2);
+    }
+
+    if (info.stack_base == NULL || info.stack_limit) {
+        printf("null stack: %p -> %p\n", info.stack_base, info.stack_limit);
+        exit(3);
+    }
+
+    /* check our local variables are indeed inside the reported stack */
+    if (ptr_to_info > info.stack_base) {
+        printf("info appears to be above stack: %p > %p\n", ptr_to_info,
+               info.stack_base);
+        exit(4);
+    } else if (ptr_to_info < info.stack_limit) {
+        printf("info appears to be outside stack: %p < %p\n", ptr_to_info,
+               info.stack_limit);
+        exit(5);
+    }
+
+    if (ptr_to_info > info.heap_base && ptr_to_info < info.heap_limit) {
+        printf("info appears to be inside the heap: %p in %p:%p\n",
+               ptr_to_info, info.heap_base, info.heap_limit);
+        exit(6);
+    }
+
+    printf("heap: %p -> %p\n", info.heap_base, info.heap_limit);
+    printf("stack: %p -> %p\n", info.stack_base, info.stack_limit);
+
+    __semi_call(SYS_WRITE0, (uintptr_t) "Passed HeapInfo checks");
     __semi_call(SYS_REPORTEXC, exit_code);
     /* if we get here we failed */
     return -1;
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 10/22] gitlab-ci.yml: Merge the trace-backend testing into other jobs
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (8 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 09/22] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 11/22] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
                   ` (13 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel
  Cc: Willian Rampazzo, Thomas Huth, Alex Bennée,
	Philippe Mathieu-Daudé,
	Wainer dos Santos Moschetta

From: Thomas Huth <thuth@redhat.com>

Our gitlab-ci got quite slow in the past weeks, due to the immense amount
of jobs that we have, so we should try to reduce the number of jobs.
There is no real good reason for having separate jobs just to test the
trace backends, we can do this just fine in other jobs, too.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20210319095726.45965-1-thuth@redhat.com>
Message-Id: <20210320133706.21475-11-alex.bennee@linaro.org>
---
 .gitlab-ci.yml | 30 +++---------------------------
 1 file changed, 3 insertions(+), 27 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index f65cb11c4d..f746d5fbea 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -87,7 +87,7 @@ build-system-alpine:
     TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu
       moxie-softmmu microblazeel-softmmu mips64el-softmmu
     MAKE_CHECK_ARGS: check-build
-    CONFIGURE_ARGS: --enable-docs
+    CONFIGURE_ARGS: --enable-docs --enable-trace-backends=log,simple,syslog
   artifacts:
     expire_in: 2 days
     paths:
@@ -605,7 +605,7 @@ tsan-build:
   variables:
     IMAGE: ubuntu2004
     CONFIGURE_ARGS: --enable-tsan --cc=clang-10 --cxx=clang++-10 --disable-docs
-                    --enable-fdt=system --enable-slirp=system
+          --enable-trace-backends=ust --enable-fdt=system --enable-slirp=system
     TARGETS: x86_64-softmmu ppc64-softmmu riscv64-softmmu x86_64-linux-user
     MAKE_CHECK_ARGS: bench V=1
 
@@ -702,6 +702,7 @@ build-coroutine-sigaltstack:
   variables:
     IMAGE: ubuntu2004
     CONFIGURE_ARGS: --with-coroutine=sigaltstack --disable-tcg
+                    --enable-trace-backends=ftrace
     MAKE_CHECK_ARGS: check-unit
 
 # Most jobs test latest gcrypt or nettle builds
@@ -739,31 +740,6 @@ crypto-only-gnutls:
     MAKE_CHECK_ARGS: check
 
 
-# We don't need to exercise every backend with every front-end
-build-trace-multi-user:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=log,simple,syslog --disable-system
-
-build-trace-ftrace-system:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=ftrace --target-list=x86_64-softmmu
-
-build-trace-ust-system:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=ust --target-list=x86_64-softmmu
-
 # Check our reduced build configurations
 build-without-default-devices:
   <<: *native_build_job_definition
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 11/22] configure: Don't use the __atomic_*_16 functions for testing 128-bit support
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (9 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 10/22] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 12/22] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
                   ` (12 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel
  Cc: Richard Henderson, Thomas Huth, Alex Bennée, Paolo Bonzini

From: Thomas Huth <thuth@redhat.com>

The test for 128-bit atomics is causing trouble with FreeBSD 12.2 and
--enable-werror:

 cc -Werror -fPIE -DPIE -std=gnu99 -Wall -m64 -mcx16 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wold-style-definition -Wtype-limits -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wempty-body -Wnested-externs -Wendif-labels -Wexpansion-to-defined -Wno-initializer-overrides -Wno-missing-include-dirs -Wno-shift-negative-value -Wno-string-plus-int -Wno-typedef-redefinition -Wno-tautological-type-limit-compare -fstack-protector-strong -o config-temp/qemu-conf.exe config-temp/qemu-conf.c -pie -Wl,-z,relro -Wl,-z,now -m64 -fstack-protector-strong
 config-temp/qemu-conf.c:4:7: error: implicit declaration of function '__atomic_load_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   y = __atomic_load_16(&x, 0);
       ^
 config-temp/qemu-conf.c:5:3: error: implicit declaration of function '__atomic_store_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   __atomic_store_16(&x, y, 0);
   ^
 config-temp/qemu-conf.c:5:3: note: did you mean '__atomic_load_16'?
 config-temp/qemu-conf.c:4:7: note: '__atomic_load_16' declared here
   y = __atomic_load_16(&x, 0);
       ^
 config-temp/qemu-conf.c:6:3: error: implicit declaration of function '__atomic_compare_exchange_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0);
   ^
 3 errors generated.

Looking for they way we are using atomic functions in QEMU, we are not
using these functions with the _16 suffix anyway. Switch to the same
functions that we use in the include/qemu/atomic.h header.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210317110512.583747-2-thuth@redhat.com>
Message-Id: <20210320133706.21475-12-alex.bennee@linaro.org>
---
 configure | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/configure b/configure
index 61872096a8..69f9f05673 100755
--- a/configure
+++ b/configure
@@ -4779,9 +4779,9 @@ if test "$int128" = "yes"; then
 int main(void)
 {
   unsigned __int128 x = 0, y = 0;
-  y = __atomic_load_16(&x, 0);
-  __atomic_store_16(&x, y, 0);
-  __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0);
+  y = __atomic_load(&x, 0);
+  __atomic_store(&x, y, 0);
+  __atomic_compare_exchange(&x, &y, x, 0, 0, 0);
   return 0;
 }
 EOF
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 12/22] cirrus.yml: Update the FreeBSD task to version 12.2
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (10 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 11/22] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:52 ` [PATCH v2 13/22] utils: Tighter tests for qemu_strtosz Alex Bennée
                   ` (11 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel
  Cc: Ed Maste, Thomas Huth, Alex Bennée, Yonggang Luo, Li-Wen Hsu

From: Thomas Huth <thuth@redhat.com>

FreeBSD version 12.1 is out of service now, and the task in the
Cirrus-CI is failing. Update to 12.2 to get it working again.
Unfortunately, there is a bug in libtasn1 that triggers with the
new version of Clang that is used there (see this thread for details:
https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg00739.html ),
so we have to disable gnutls for now to make it work again. We can
enable it later again once libtasn1 has been fixed in FreeBSD.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210319101402.48871-1-thuth@redhat.com>
Message-Id: <20210320133706.21475-13-alex.bennee@linaro.org>
---
 .cirrus.yml | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/.cirrus.yml b/.cirrus.yml
index bc40a0550d..f53c519447 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -3,7 +3,7 @@ env:
 
 freebsd_12_task:
   freebsd_instance:
-    image_family: freebsd-12-1
+    image_family: freebsd-12-2
     cpu: 8
     memory: 8G
   install_script:
@@ -13,7 +13,10 @@ freebsd_12_task:
   script:
     - mkdir build
     - cd build
-    - ../configure --enable-werror || { cat config.log meson-logs/meson-log.txt; exit 1; }
+    # TODO: Enable gnutls again once FreeBSD's libtasn1 got fixed
+    # See: https://gitlab.com/gnutls/libtasn1/-/merge_requests/71
+    - ../configure --enable-werror --disable-gnutls
+      || { cat config.log meson-logs/meson-log.txt; exit 1; }
     - gmake -j$(sysctl -n hw.ncpu)
     - gmake -j$(sysctl -n hw.ncpu) check V=1
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 13/22] utils: Tighter tests for qemu_strtosz
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (11 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 12/22] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
@ 2021-03-23 16:52 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 14/22] utils: Work around mingw strto*l bug with 0x Alex Bennée
                   ` (10 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:52 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, Thomas Huth

From: Eric Blake <eblake@redhat.com>

Our tests were not validating the return value in all cases, nor was
it guaranteeing our documented claim that 'res' is unchanged on error.
For that matter, it wasn't as thorough as the existing tests for
qemu_strtoi() and friends for proving that endptr and res are sanely
set.  Enhancing the test found one case where we violated our
documentation: namely, when failing with EINVAL when endptr is NULL,
we shouldn't modify res.

Signed-off-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210317143325.2165821-2-eblake@redhat.com>
Message-Id: <20210320133706.21475-14-alex.bennee@linaro.org>
---
 tests/unit/test-cutils.c | 117 +++++++++++++++++++++++++++++++++++++--
 util/cutils.c            |   4 +-
 2 files changed, 114 insertions(+), 7 deletions(-)

diff --git a/tests/unit/test-cutils.c b/tests/unit/test-cutils.c
index e025b54c05..5908de4fd0 100644
--- a/tests/unit/test-cutils.c
+++ b/tests/unit/test-cutils.c
@@ -1952,9 +1952,11 @@ static void test_qemu_strtosz_simple(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
@@ -1962,6 +1964,8 @@ static void test_qemu_strtosz_simple(void)
 
     /* Leading 0 gives decimal results, not octal */
     str = "08";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 8);
@@ -1969,46 +1973,61 @@ static void test_qemu_strtosz_simple(void)
 
     /* Leading space is ignored */
     str = " 12345";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345);
     g_assert(endptr == str + 6);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345);
 
     str = "9007199254740991"; /* 2^53-1 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x1fffffffffffff);
     g_assert(endptr == str + 16);
 
     str = "9007199254740992"; /* 2^53 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x20000000000000);
     g_assert(endptr == str + 16);
 
     str = "9007199254740993"; /* 2^53+1 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x20000000000001);
     g_assert(endptr == str + 16);
 
     str = "18446744073709549568"; /* 0xfffffffffffff800 (53 msbs set) */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xfffffffffffff800);
     g_assert(endptr == str + 20);
 
     str = "18446744073709550591"; /* 0xfffffffffffffbff */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xfffffffffffffbff);
     g_assert(endptr == str + 20);
 
     str = "18446744073709551615"; /* 0xffffffffffffffff */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xffffffffffffffff);
@@ -2020,21 +2039,27 @@ static void test_qemu_strtosz_hex(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0x0";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 3);
 
     str = "0xab";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 171);
     g_assert(endptr == str + 4);
 
     str = "0xae";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 174);
@@ -2053,44 +2078,60 @@ static void test_qemu_strtosz_units(void)
     const char *e = "1E";
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     /* default is M */
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz_MiB(none, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, MiB);
     g_assert(endptr == none + 1);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(b, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1);
     g_assert(endptr == b + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(k, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, KiB);
     g_assert(endptr == k + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(m, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, MiB);
     g_assert(endptr == m + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(g, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, GiB);
     g_assert(endptr == g + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(t, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, TiB);
     g_assert(endptr == t + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(p, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, PiB);
     g_assert(endptr == p + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(e, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, EiB);
@@ -2102,9 +2143,11 @@ static void test_qemu_strtosz_float(void)
     const char *str;
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0.5E";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, EiB / 2);
@@ -2112,6 +2155,8 @@ static void test_qemu_strtosz_float(void)
 
     /* For convenience, a fraction of 0 is tolerated even on bytes */
     str = "1.0B";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1);
@@ -2119,6 +2164,8 @@ static void test_qemu_strtosz_float(void)
 
     /* An empty fraction is tolerated */
     str = "1.k";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1024);
@@ -2126,6 +2173,8 @@ static void test_qemu_strtosz_float(void)
 
     /* For convenience, we permit values that are not byte-exact */
     str = "12.345M";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, (uint64_t) (12.345 * MiB + 0.5));
@@ -2140,67 +2189,91 @@ static void test_qemu_strtosz_invalid(void)
     uint64_t res = 0xbaadf00d;
 
     str = "";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = " \t ";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "crap";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "inf";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "NaN";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* Fractional values require scale larger than bytes */
     str = "1.1B";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "1.1";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No floating point exponents */
     str = "1.5e1k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "1.5E+0k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No hex fractions */
     str = "0x1.8k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No negative values */
     str = "-0";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "-1";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 }
 
@@ -2209,48 +2282,72 @@ static void test_qemu_strtosz_trailing(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "123xxx";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz_MiB(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 123 * MiB);
     g_assert(endptr == str + 3);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "1kiB";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1024);
     g_assert(endptr == str + 2);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "0x";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 1);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "0.NaN";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 2);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "123-45";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 123);
     g_assert(endptr == str + 3);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 }
 
 static void test_qemu_strtosz_erange(void)
@@ -2261,13 +2358,17 @@ static void test_qemu_strtosz_erange(void)
     uint64_t res = 0xbaadf00d;
 
     str = "18446744073709551616"; /* 2^64; see strtosz_simple for 2^64-1 */
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -ERANGE);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str + 20);
 
     str = "20E";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -ERANGE);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str + 3);
 }
 
@@ -2276,15 +2377,19 @@ static void test_qemu_strtosz_metric(void)
     const char *str;
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "12345k";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz_metric(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345000);
     g_assert(endptr == str + 6);
 
     str = "12.345M";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz_metric(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345000);
diff --git a/util/cutils.c b/util/cutils.c
index c442882b88..b425ed6570 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -362,7 +362,6 @@ static int do_strtosz(const char *nptr, const char **end,
         }
     }
 
-    *result = val;
     retval = 0;
 
 out:
@@ -371,6 +370,9 @@ out:
     } else if (*endptr) {
         retval = -EINVAL;
     }
+    if (retval == 0) {
+        *result = val;
+    }
 
     return retval;
 }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 14/22] utils: Work around mingw strto*l bug with 0x
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (12 preceding siblings ...)
  2021-03-23 16:52 ` [PATCH v2 13/22] utils: Tighter tests for qemu_strtosz Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 15/22] gitlab: extend timeouts for CFI builds Alex Bennée
                   ` (9 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel; +Cc: Alex Bennée, Thomas Huth

From: Eric Blake <eblake@redhat.com>

Mingw recognizes that "0x" has value 0 without setting errno, but
fails to advance endptr to the trailing garbage 'x'.  This in turn
showed up in our recent testsuite additions for qemu_strtosz (commit
1657ba44b4 utils: Enhance testsuite for do_strtosz()); adjust our
remaining tests to show that we now work around this windows bug.

This patch intentionally fails check-syntax for use of strtol.

Signed-off-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210317143325.2165821-3-eblake@redhat.com>
Message-Id: <20210320133706.21475-15-alex.bennee@linaro.org>
---
 tests/unit/test-cutils.c | 54 ++++++++++++++++++++++++++++++++++++++++
 util/cutils.c            | 29 +++++++++++++++------
 2 files changed, 75 insertions(+), 8 deletions(-)

diff --git a/tests/unit/test-cutils.c b/tests/unit/test-cutils.c
index 5908de4fd0..98671f1ac3 100644
--- a/tests/unit/test-cutils.c
+++ b/tests/unit/test-cutils.c
@@ -378,6 +378,15 @@ static void test_qemu_strtoi_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoi(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoi_max(void)
@@ -669,6 +678,15 @@ static void test_qemu_strtoui_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoui(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoui_max(void)
@@ -955,6 +973,15 @@ static void test_qemu_strtol_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtol(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtol_max(void)
@@ -1244,6 +1271,15 @@ static void test_qemu_strtoul_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoul(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoul_max(void)
@@ -1528,6 +1564,15 @@ static void test_qemu_strtoi64_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    endptr = &f;
+    res = 999;
+    err = qemu_strtoi64(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoi64_max(void)
@@ -1815,6 +1860,15 @@ static void test_qemu_strtou64_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    endptr = &f;
+    res = 999;
+    err = qemu_strtou64(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtou64_max(void)
diff --git a/util/cutils.c b/util/cutils.c
index b425ed6570..ee908486da 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -396,9 +396,22 @@ int qemu_strtosz_metric(const char *nptr, const char **end, uint64_t *result)
  * Helper function for error checking after strtol() and the like
  */
 static int check_strtox_error(const char *nptr, char *ep,
-                              const char **endptr, int libc_errno)
+                              const char **endptr, bool check_zero,
+                              int libc_errno)
 {
     assert(ep >= nptr);
+
+    /* Windows has a bug in that it fails to parse 0 from "0x" in base 16 */
+    if (check_zero && ep == nptr && libc_errno == 0) {
+        char *tmp;
+
+        errno = 0;
+        if (strtol(nptr, &tmp, 10) == 0 && errno == 0 &&
+            (*tmp == 'x' || *tmp == 'X')) {
+            ep = tmp;
+        }
+    }
+
     if (endptr) {
         *endptr = ep;
     }
@@ -465,7 +478,7 @@ int qemu_strtoi(const char *nptr, const char **endptr, int base,
     } else {
         *result = lresult;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, lresult == 0, errno);
 }
 
 /**
@@ -524,7 +537,7 @@ int qemu_strtoui(const char *nptr, const char **endptr, int base,
             *result = lresult;
         }
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, lresult == 0, errno);
 }
 
 /**
@@ -566,7 +579,7 @@ int qemu_strtol(const char *nptr, const char **endptr, int base,
 
     errno = 0;
     *result = strtol(nptr, &ep, base);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -613,7 +626,7 @@ int qemu_strtoul(const char *nptr, const char **endptr, int base,
     if (errno == ERANGE) {
         *result = -1;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -639,7 +652,7 @@ int qemu_strtoi64(const char *nptr, const char **endptr, int base,
     QEMU_BUILD_BUG_ON(sizeof(int64_t) != sizeof(long long));
     errno = 0;
     *result = strtoll(nptr, &ep, base);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -668,7 +681,7 @@ int qemu_strtou64(const char *nptr, const char **endptr, int base,
     if (errno == ERANGE) {
         *result = -1;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -708,7 +721,7 @@ int qemu_strtod(const char *nptr, const char **endptr, double *result)
 
     errno = 0;
     *result = strtod(nptr, &ep);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, false, errno);
 }
 
 /**
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 15/22] gitlab: extend timeouts for CFI builds
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (13 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 14/22] utils: Work around mingw strto*l bug with 0x Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 16/22] qdev: define list of archs with virtio-pci or virtio-ccw Alex Bennée
                   ` (8 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel
  Cc: Willian Rampazzo, Thomas Huth, Alex Bennée,
	Philippe Mathieu-Daudé,
	Wainer dos Santos Moschetta

These builds are running very close to the default build limit and as
they are already pared down the only other option is to extend the
timeout a little to give some breathing room.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210322142110.4766-1-alex.bennee@linaro.org>
---
 .gitlab-ci.yml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index f746d5fbea..9ffbaa7ffb 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -502,6 +502,7 @@ build-cfi-aarch64:
       --enable-safe-stack --enable-slirp=git
     TARGETS: aarch64-softmmu
     MAKE_CHECK_ARGS: check-build
+  timeout: 70m
   artifacts:
     expire_in: 2 days
     paths:
@@ -538,6 +539,7 @@ build-cfi-ppc64-s390x:
       --enable-safe-stack --enable-slirp=git
     TARGETS: ppc64-softmmu s390x-softmmu
     MAKE_CHECK_ARGS: check-build
+  timeout: 70m
   artifacts:
     expire_in: 2 days
     paths:
@@ -574,6 +576,7 @@ build-cfi-x86_64:
       --enable-safe-stack --enable-slirp=git
     TARGETS: x86_64-softmmu
     MAKE_CHECK_ARGS: check-build
+  timeout: 70m
   artifacts:
     expire_in: 2 days
     paths:
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 16/22] qdev: define list of archs with virtio-pci or virtio-ccw
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (14 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 15/22] gitlab: extend timeouts for CFI builds Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 17/22] m68k: add the virtio devices aliases Alex Bennée
                   ` (7 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel
  Cc: Daniel P. Berrangé,
	Eduardo Habkost, Cornelia Huck, Laurent Vivier, Paolo Bonzini,
	Alex Bennée

From: Laurent Vivier <laurent@vivier.eu>

This is used to define virtio-*-pci and virtio-*-ccw aliases
rather than substracting the CCW architecture from all the others.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20210319202335.2397060-2-laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 include/sysemu/arch_init.h |  8 ++++++
 softmmu/qdev-monitor.c     | 53 ++++++++++++++++++--------------------
 2 files changed, 33 insertions(+), 28 deletions(-)

diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
index 54f069d491..0c90706516 100644
--- a/include/sysemu/arch_init.h
+++ b/include/sysemu/arch_init.h
@@ -35,4 +35,12 @@ extern const uint32_t arch_type;
 int kvm_available(void);
 int xen_available(void);
 
+/* default virtio transport per architecture */
+#define QEMU_ARCH_VIRTIO_PCI (QEMU_ARCH_ALPHA | QEMU_ARCH_ARM | \
+                              QEMU_ARCH_HPPA | QEMU_ARCH_I386 | \
+                              QEMU_ARCH_MIPS | QEMU_ARCH_PPC |  \
+                              QEMU_ARCH_RISCV | QEMU_ARCH_SH4 | \
+                              QEMU_ARCH_SPARC | QEMU_ARCH_XTENSA)
+#define QEMU_ARCH_VIRTIO_CCW (QEMU_ARCH_S390X)
+
 #endif
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 8dc656becc..0b40c97c6e 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
@@ -60,34 +60,31 @@ static const QDevAlias qdev_alias_table[] = {
     { "ES1370", "es1370" }, /* -soundhw name */
     { "ich9-ahci", "ahci" },
     { "lsi53c895a", "lsi" },
-    { "virtio-9p-ccw", "virtio-9p", QEMU_ARCH_S390X },
-    { "virtio-9p-pci", "virtio-9p", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-balloon-ccw", "virtio-balloon", QEMU_ARCH_S390X },
-    { "virtio-balloon-pci", "virtio-balloon",
-            QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-blk-ccw", "virtio-blk", QEMU_ARCH_S390X },
-    { "virtio-blk-pci", "virtio-blk", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-gpu-ccw", "virtio-gpu", QEMU_ARCH_S390X },
-    { "virtio-gpu-pci", "virtio-gpu", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-input-host-ccw", "virtio-input-host", QEMU_ARCH_S390X },
-    { "virtio-input-host-pci", "virtio-input-host",
-            QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-iommu-pci", "virtio-iommu", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-keyboard-ccw", "virtio-keyboard", QEMU_ARCH_S390X },
-    { "virtio-keyboard-pci", "virtio-keyboard",
-            QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-mouse-ccw", "virtio-mouse", QEMU_ARCH_S390X },
-    { "virtio-mouse-pci", "virtio-mouse", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-net-ccw", "virtio-net", QEMU_ARCH_S390X },
-    { "virtio-net-pci", "virtio-net", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-rng-ccw", "virtio-rng", QEMU_ARCH_S390X },
-    { "virtio-rng-pci", "virtio-rng", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-scsi-ccw", "virtio-scsi", QEMU_ARCH_S390X },
-    { "virtio-scsi-pci", "virtio-scsi", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-serial-ccw", "virtio-serial", QEMU_ARCH_S390X },
-    { "virtio-serial-pci", "virtio-serial", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-tablet-ccw", "virtio-tablet", QEMU_ARCH_S390X },
-    { "virtio-tablet-pci", "virtio-tablet", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
+    { "virtio-9p-ccw", "virtio-9p", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-9p-pci", "virtio-9p", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-balloon-ccw", "virtio-balloon", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-balloon-pci", "virtio-balloon", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-blk-ccw", "virtio-blk", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-blk-pci", "virtio-blk", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-gpu-ccw", "virtio-gpu", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-gpu-pci", "virtio-gpu", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-input-host-ccw", "virtio-input-host", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-input-host-pci", "virtio-input-host", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-iommu-pci", "virtio-iommu", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-keyboard-ccw", "virtio-keyboard", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-keyboard-pci", "virtio-keyboard", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-mouse-ccw", "virtio-mouse", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-mouse-pci", "virtio-mouse", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-net-ccw", "virtio-net", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-net-pci", "virtio-net", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-rng-ccw", "virtio-rng", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-rng-pci", "virtio-rng", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-scsi-ccw", "virtio-scsi", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-scsi-pci", "virtio-scsi", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-serial-ccw", "virtio-serial", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-serial-pci", "virtio-serial", QEMU_ARCH_VIRTIO_PCI},
+    { "virtio-tablet-ccw", "virtio-tablet", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-tablet-pci", "virtio-tablet", QEMU_ARCH_VIRTIO_PCI },
     { }
 };
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 17/22] m68k: add the virtio devices aliases
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (15 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 16/22] qdev: define list of archs with virtio-pci or virtio-ccw Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 18/22] blockdev: with -drive if=virtio, use generic virtio-blk Alex Bennée
                   ` (6 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel
  Cc: Daniel P. Berrangé,
	Eduardo Habkost, Cornelia Huck, Laurent Vivier,
	Philippe Mathieu-Daudé,
	Paolo Bonzini, Alex Bennée

From: Laurent Vivier <laurent@vivier.eu>

Similarly to 5f629d943cb0 ("s390x: fix s390 virtio aliases"),
define the virtio aliases.

This allows to start machines with virtio devices without
knowledge of the implementation type.

For instance, we can use "-device virtio-scsi" on
m68k, s390x or PC, and the device will be respectively
"virtio-scsi-device", "virtio-scsi-ccw" or "virtio-scsi-pci".

This already exists for s390x and -ccw interfaces, add them
for m68k and MMIO (-device) interfaces.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20210319202335.2397060-3-laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 include/sysemu/arch_init.h |  1 +
 softmmu/qdev-monitor.c     | 12 ++++++++++++
 2 files changed, 13 insertions(+)

diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
index 0c90706516..16da279696 100644
--- a/include/sysemu/arch_init.h
+++ b/include/sysemu/arch_init.h
@@ -42,5 +42,6 @@ int xen_available(void);
                               QEMU_ARCH_RISCV | QEMU_ARCH_SH4 | \
                               QEMU_ARCH_SPARC | QEMU_ARCH_XTENSA)
 #define QEMU_ARCH_VIRTIO_CCW (QEMU_ARCH_S390X)
+#define QEMU_ARCH_VIRTIO_MMIO (QEMU_ARCH_M68K)
 
 #endif
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 0b40c97c6e..a9955b97a0 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
@@ -60,29 +60,41 @@ static const QDevAlias qdev_alias_table[] = {
     { "ES1370", "es1370" }, /* -soundhw name */
     { "ich9-ahci", "ahci" },
     { "lsi53c895a", "lsi" },
+    { "virtio-9p-device", "virtio-9p", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-9p-ccw", "virtio-9p", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-9p-pci", "virtio-9p", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-balloon-device", "virtio-balloon", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-balloon-ccw", "virtio-balloon", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-balloon-pci", "virtio-balloon", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-blk-device", "virtio-blk", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-blk-ccw", "virtio-blk", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-blk-pci", "virtio-blk", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-gpu-device", "virtio-gpu", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-gpu-ccw", "virtio-gpu", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-gpu-pci", "virtio-gpu", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-input-host-device", "virtio-input-host", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-input-host-ccw", "virtio-input-host", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-input-host-pci", "virtio-input-host", QEMU_ARCH_VIRTIO_PCI },
     { "virtio-iommu-pci", "virtio-iommu", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-keyboard-device", "virtio-keyboard", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-keyboard-ccw", "virtio-keyboard", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-keyboard-pci", "virtio-keyboard", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-mouse-device", "virtio-mouse", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-mouse-ccw", "virtio-mouse", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-mouse-pci", "virtio-mouse", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-net-device", "virtio-net", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-net-ccw", "virtio-net", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-net-pci", "virtio-net", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-rng-device", "virtio-rng", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-rng-ccw", "virtio-rng", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-rng-pci", "virtio-rng", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-scsi-device", "virtio-scsi", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-scsi-ccw", "virtio-scsi", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-scsi-pci", "virtio-scsi", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-serial-device", "virtio-serial", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-serial-ccw", "virtio-serial", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-serial-pci", "virtio-serial", QEMU_ARCH_VIRTIO_PCI},
+    { "virtio-tablet-device", "virtio-tablet", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-tablet-ccw", "virtio-tablet", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-tablet-pci", "virtio-tablet", QEMU_ARCH_VIRTIO_PCI },
     { }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 18/22] blockdev: with -drive if=virtio, use generic virtio-blk
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (16 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 17/22] m68k: add the virtio devices aliases Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 19/22] iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182" Alex Bennée
                   ` (5 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel
  Cc: Kevin Wolf, open list:Block layer core,
	Philippe Mathieu-Daudé,
	Laurent Vivier, Max Reitz, Alex Bennée, Markus Armbruster

From: Laurent Vivier <laurent@vivier.eu>

Rather than checking if the machine is an s390x to use virtio-blk-ccw
instead of virtio-blk-pci, use the alias virtio-blk that is set to
the expected target.

This also enables the use of virtio-blk-device for targets without
PCI or CCW.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20210319202335.2397060-4-laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 blockdev.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/blockdev.c b/blockdev.c
index cf70bb4e43..413aacf604 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -962,11 +962,7 @@ DriveInfo *drive_new(QemuOpts *all_opts, BlockInterfaceType block_default_type,
         QemuOpts *devopts;
         devopts = qemu_opts_create(qemu_find_opts("device"), NULL, 0,
                                    &error_abort);
-        if (arch_type == QEMU_ARCH_S390X) {
-            qemu_opt_set(devopts, "driver", "virtio-blk-ccw", &error_abort);
-        } else {
-            qemu_opt_set(devopts, "driver", "virtio-blk-pci", &error_abort);
-        }
+        qemu_opt_set(devopts, "driver", "virtio-blk", &error_abort);
         qemu_opt_set(devopts, "drive", qdict_get_str(bs_opts, "id"),
                      &error_abort);
     }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH v2 19/22] iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (17 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 18/22] blockdev: with -drive if=virtio, use generic virtio-blk Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 20/22] iotests: test m68k with the virt machine Alex Bennée
                   ` (4 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel
  Cc: Kevin Wolf, Thomas Huth, open list:Block layer core,
	Philippe Mathieu-Daudé,
	Cornelia Huck, Laurent Vivier, Max Reitz,
	open list:S390 general arch...,
	Alex Bennée

From: Laurent Vivier <laurent@vivier.eu>

Commit f1d5516ab583 introduces a test in some iotests to check if
the machine is a s390-ccw-virtio and to select virtio-*-ccw rather
than virtio-*-pci.

We don't need that because QEMU already provides aliases to use the correct
virtio interface according to the machine type.

This patch removes all virtio-*-pci and virtio-*-ccw to use virtio-*
instead and remove get_virtio_scsi_device().
This also enables virtio-mmio devices (virtio-*-device)

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20210319202335.2397060-5-laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/qemu-iotests/040        |  2 +-
 tests/qemu-iotests/051        | 12 +-----------
 tests/qemu-iotests/051.out    |  2 +-
 tests/qemu-iotests/051.pc.out |  2 +-
 tests/qemu-iotests/068        |  4 +---
 tests/qemu-iotests/093        |  3 +--
 tests/qemu-iotests/139        |  9 ++-------
 tests/qemu-iotests/182        | 13 ++-----------
 tests/qemu-iotests/238        |  4 +---
 tests/qemu-iotests/240        | 10 +++++-----
 tests/qemu-iotests/257        |  4 ++--
 tests/qemu-iotests/307        |  4 +---
 tests/qemu-iotests/iotests.py |  5 -----
 13 files changed, 19 insertions(+), 55 deletions(-)

diff --git a/tests/qemu-iotests/040 b/tests/qemu-iotests/040
index 336ff7c4f2..ba7cb34ce8 100755
--- a/tests/qemu-iotests/040
+++ b/tests/qemu-iotests/040
@@ -89,7 +89,7 @@ class TestSingleDrive(ImageCommitTestCase):
         qemu_io('-f', 'raw', '-c', 'write -P 0xab 0 524288', backing_img)
         qemu_io('-f', iotests.imgfmt, '-c', 'write -P 0xef 524288 524288', mid_img)
         self.vm = iotests.VM().add_drive(test_img, "node-name=top,backing.node-name=mid,backing.backing.node-name=base", interface="none")
-        self.vm.add_device(iotests.get_virtio_scsi_device())
+        self.vm.add_device('virtio-scsi')
         self.vm.add_device("scsi-hd,id=scsi0,drive=drive0")
         self.vm.launch()
         self.has_quit = False
diff --git a/tests/qemu-iotests/051 b/tests/qemu-iotests/051
index f92161d8ef..333cc81818 100755
--- a/tests/qemu-iotests/051
+++ b/tests/qemu-iotests/051
@@ -119,17 +119,7 @@ echo
 echo === Device without drive ===
 echo
 
-case "$QEMU_DEFAULT_MACHINE" in
-  s390-ccw-virtio)
-      virtio_scsi=virtio-scsi-ccw
-      ;;
-  *)
-      virtio_scsi=virtio-scsi-pci
-      ;;
-esac
-
-run_qemu -device $virtio_scsi -device scsi-hd |
-    sed -e "s/$virtio_scsi/VIRTIO_SCSI/"
+run_qemu -device virtio-scsi -device scsi-hd
 
 echo
 echo === Overriding backing file ===
diff --git a/tests/qemu-iotests/051.out b/tests/qemu-iotests/051.out
index de4771bcb3..437053c839 100644
--- a/tests/qemu-iotests/051.out
+++ b/tests/qemu-iotests/051.out
@@ -72,7 +72,7 @@ QEMU_PROG: -drive file=TEST_DIR/t.qcow2,node-name=foo#12: Invalid node name
 
 === Device without drive ===
 
-Testing: -device VIRTIO_SCSI -device scsi-hd
+Testing: -device virtio-scsi -device scsi-hd
 QEMU X.Y.Z monitor - type 'help' for more information
 (qemu) QEMU_PROG: -device scsi-hd: drive property not set
 
diff --git a/tests/qemu-iotests/051.pc.out b/tests/qemu-iotests/051.pc.out
index a28e3fc124..e95bd42b8d 100644
--- a/tests/qemu-iotests/051.pc.out
+++ b/tests/qemu-iotests/051.pc.out
@@ -72,7 +72,7 @@ QEMU_PROG: -drive file=TEST_DIR/t.qcow2,node-name=foo#12: Invalid node-name: 'fo
 
 === Device without drive ===
 
-Testing: -device VIRTIO_SCSI -device scsi-hd
+Testing: -device virtio-scsi -device scsi-hd
 QEMU X.Y.Z monitor - type 'help' for more information
 (qemu) QEMU_PROG: -device scsi-hd: drive property not set
 
diff --git a/tests/qemu-iotests/068 b/tests/qemu-iotests/068
index 03e03508a6..54e49c8ffa 100755
--- a/tests/qemu-iotests/068
+++ b/tests/qemu-iotests/068
@@ -49,11 +49,9 @@ IMG_SIZE=128K
 case "$QEMU_DEFAULT_MACHINE" in
   s390-ccw-virtio)
       platform_parm="-no-shutdown"
-      hba=virtio-scsi-ccw
       ;;
   *)
       platform_parm=""
-      hba=virtio-scsi-pci
       ;;
 esac
 
@@ -61,7 +59,7 @@ _qemu()
 {
     $QEMU $platform_parm -nographic -monitor stdio -serial none \
           -drive if=none,id=drive0,file="$TEST_IMG",format="$IMGFMT" \
-          -device $hba,id=hba0 \
+          -device virtio-scsi,id=hba0 \
           -device scsi-hd,drive=drive0 \
           "$@" |\
     _filter_qemu | _filter_hmp
diff --git a/tests/qemu-iotests/093 b/tests/qemu-iotests/093
index 7745cb04b6..93274dc8cb 100755
--- a/tests/qemu-iotests/093
+++ b/tests/qemu-iotests/093
@@ -371,8 +371,7 @@ class ThrottleTestGroupNames(iotests.QMPTestCase):
 class ThrottleTestRemovableMedia(iotests.QMPTestCase):
     def setUp(self):
         self.vm = iotests.VM()
-        self.vm.add_device("{},id=virtio-scsi".format(
-            iotests.get_virtio_scsi_device()))
+        self.vm.add_device("{},id=virtio-scsi".format('virtio-scsi'))
         self.vm.launch()
 
     def tearDown(self):
diff --git a/tests/qemu-iotests/139 b/tests/qemu-iotests/139
index e79b3c21fd..178b1ee230 100755
--- a/tests/qemu-iotests/139
+++ b/tests/qemu-iotests/139
@@ -26,18 +26,13 @@ import time
 
 base_img = os.path.join(iotests.test_dir, 'base.img')
 new_img = os.path.join(iotests.test_dir, 'new.img')
-if iotests.qemu_default_machine == 's390-ccw-virtio':
-    default_virtio_blk = 'virtio-blk-ccw'
-else:
-    default_virtio_blk = 'virtio-blk-pci'
 
 class TestBlockdevDel(iotests.QMPTestCase):
 
     def setUp(self):
         iotests.qemu_img('create', '-f', iotests.imgfmt, base_img, '1M')
         self.vm = iotests.VM()
-        self.vm.add_device("{},id=virtio-scsi".format(
-            iotests.get_virtio_scsi_device()))
+        self.vm.add_device("{},id=virtio-scsi".format('virtio-scsi'))
         self.vm.launch()
 
     def tearDown(self):
@@ -93,7 +88,7 @@ class TestBlockdevDel(iotests.QMPTestCase):
         self.checkBlockDriverState(node, expect_error)
 
     # Add a device model
-    def addDeviceModel(self, device, backend, driver = default_virtio_blk):
+    def addDeviceModel(self, device, backend, driver = 'virtio-blk'):
         result = self.vm.qmp('device_add', id = device,
                              driver = driver, drive = backend)
         self.assert_qmp(result, 'return', {})
diff --git a/tests/qemu-iotests/182 b/tests/qemu-iotests/182
index 55a0384c08..fcd1d796eb 100755
--- a/tests/qemu-iotests/182
+++ b/tests/qemu-iotests/182
@@ -46,26 +46,17 @@ _supported_proto file
 
 size=32M
 
-case "$QEMU_DEFAULT_MACHINE" in
-  s390-ccw-virtio)
-      virtioblk=virtio-blk-ccw
-      ;;
-  *)
-      virtioblk=virtio-blk-pci
-      ;;
-esac
-
 _make_test_img $size
 
 echo "Starting QEMU"
 _launch_qemu -drive file=$TEST_IMG,if=none,id=drive0,file.locking=on \
-    -device $virtioblk,drive=drive0
+    -device virtio-blk,drive=drive0
 
 echo
 echo "Starting a second QEMU using the same image should fail"
 echo 'quit' | $QEMU -nographic -monitor stdio \
     -drive file=$TEST_IMG,if=none,id=drive0,file.locking=on \
-    -device $virtioblk,drive=drive0 2>&1 | _filter_testdir 2>&1 |
+    -device virtio-blk,drive=drive0 2>&1 | _filter_testdir 2>&1 |
     _filter_qemu |
     sed -e '/falling back to POSIX file/d' \
         -e '/locks can be lost unexpectedly/d'
diff --git a/tests/qemu-iotests/238 b/tests/qemu-iotests/238
index 8a10af57f1..38bd3744e6 100755
--- a/tests/qemu-iotests/238
+++ b/tests/qemu-iotests/238
@@ -26,14 +26,12 @@ from iotests import log
 
 iotests.script_initialize()
 
-virtio_scsi_device = iotests.get_virtio_scsi_device()
-
 vm = iotests.VM()
 vm.launch()
 
 log(vm.qmp('blockdev-add', node_name='hd0', driver='null-co', read_zeroes=True))
 log(vm.qmp('object-add', qom_type='iothread', id='iothread0'))
-log(vm.qmp('device_add', id='scsi0', driver=virtio_scsi_device, iothread='iothread0'))
+log(vm.qmp('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0'))
 log(vm.qmp('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0'))
 log(vm.qmp('block_set_io_throttle', id='scsi-hd0', bps=0, bps_rd=0, bps_wr=0,
            iops=1000, iops_rd=0, iops_wr=0, conv_keys=False))
diff --git a/tests/qemu-iotests/240 b/tests/qemu-iotests/240
index ab077f4ceb..9b281e1dc0 100755
--- a/tests/qemu-iotests/240
+++ b/tests/qemu-iotests/240
@@ -42,7 +42,7 @@ class TestCase(iotests.QMPTestCase):
         iotests.log('==Unplug a SCSI disk and then plug it again==')
         self.vm.qmp_log('blockdev-add', driver='null-co', read_zeroes=True, node_name='hd0')
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread0")
-        self.vm.qmp_log('device_add', id='scsi0', driver=iotests.get_virtio_scsi_device(), iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
         self.vm.qmp_log('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0')
         self.vm.qmp_log('device_del', id='scsi-hd0')
         self.vm.event_wait('DEVICE_DELETED')
@@ -55,7 +55,7 @@ class TestCase(iotests.QMPTestCase):
         iotests.log('==Attach two SCSI disks using the same block device and the same iothread==')
         self.vm.qmp_log('blockdev-add', driver='null-co', read_zeroes=True, node_name='hd0', read_only=True)
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread0")
-        self.vm.qmp_log('device_add', id='scsi0', driver=iotests.get_virtio_scsi_device(), iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
 
         self.vm.qmp_log('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0')
         self.vm.qmp_log('device_add', id='scsi-hd1', driver='scsi-hd', drive='hd0')
@@ -73,8 +73,8 @@ class TestCase(iotests.QMPTestCase):
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread0")
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread1")
 
-        self.vm.qmp_log('device_add', id='scsi0', driver=iotests.get_virtio_scsi_device(), iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
-        self.vm.qmp_log('device_add', id='scsi1', driver=iotests.get_virtio_scsi_device(), iothread='iothread1', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi1', driver='virtio-scsi', iothread='iothread1', filters=[iotests.filter_qmp_virtio_scsi])
 
         self.vm.qmp_log('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0', bus="scsi0.0")
         self.vm.qmp_log('device_add', id='scsi-hd1', driver='scsi-hd', drive='hd0', bus="scsi1.0")
@@ -99,7 +99,7 @@ class TestCase(iotests.QMPTestCase):
         self.vm.qmp_log('nbd-server-add', device='hd0')
 
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread0")
-        self.vm.qmp_log('device_add', id='scsi0', driver=iotests.get_virtio_scsi_device(), iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
         self.vm.qmp_log('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0')
 
 if __name__ == '__main__':
diff --git a/tests/qemu-iotests/257 b/tests/qemu-iotests/257
index 7cd2520829..c72c82a171 100755
--- a/tests/qemu-iotests/257
+++ b/tests/qemu-iotests/257
@@ -292,7 +292,7 @@ def test_bitmap_sync(bsync_mode, msync_mode='bitmap', failure=None):
         log('--- Preparing image & VM ---\n')
         drive0 = Drive(img_path, vm=vm)
         drive0.img_create(iotests.imgfmt, SIZE)
-        vm.add_device("{},id=scsi0".format(iotests.get_virtio_scsi_device()))
+        vm.add_device("{},id=scsi0".format('virtio-scsi'))
         vm.launch()
 
         file_config = {
@@ -449,7 +449,7 @@ def test_backup_api():
         log('--- Preparing image & VM ---\n')
         drive0 = Drive(img_path, vm=vm)
         drive0.img_create(iotests.imgfmt, SIZE)
-        vm.add_device("{},id=scsi0".format(iotests.get_virtio_scsi_device()))
+        vm.add_device("{},id=scsi0".format('virtio-scsi'))
         vm.launch()
 
         file_config = {
diff --git a/tests/qemu-iotests/307 b/tests/qemu-iotests/307
index 9008974346..c7685347bc 100755
--- a/tests/qemu-iotests/307
+++ b/tests/qemu-iotests/307
@@ -40,13 +40,11 @@ with iotests.FilePath('image') as img, \
 
     iotests.log('=== Launch VM ===')
 
-    virtio_scsi_device = iotests.get_virtio_scsi_device()
-
     vm.add_object('iothread,id=iothread0')
     vm.add_blockdev(f'file,filename={img},node-name=file')
     vm.add_blockdev(f'{iotests.imgfmt},file=file,node-name=fmt')
     vm.add_blockdev('raw,file=file,node-name=ro,read-only=on')
-    vm.add_device(f'id=scsi0,driver={virtio_scsi_device},iothread=iothread0')
+    vm.add_device(f'id=scsi0,driver=virtio-scsi,iothread=iothread0')
     vm.launch()
 
     vm.qmp_log('nbd-server-start',
diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
index 90d0b62523..1e9e6a066e 100644
--- a/tests/qemu-iotests/iotests.py
+++ b/tests/qemu-iotests/iotests.py
@@ -234,11 +234,6 @@ def qemu_io_silent_check(*args):
                                stderr=subprocess.STDOUT)
     return exitcode == 0
 
-def get_virtio_scsi_device():
-    if qemu_default_machine == 's390-ccw-virtio':
-        return 'virtio-scsi-ccw'
-    return 'virtio-scsi-pci'
-
 class QemuIoInteractive:
     def __init__(self, *args):
         self.args = qemu_io_args_no_fmt + list(args)
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 20/22] iotests: test m68k with the virt machine
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (18 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 19/22] iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182" Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 21/22] iotests: iothreads need ioeventfd Alex Bennée
                   ` (3 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel
  Cc: Kevin Wolf, open list:Block layer core, Cornelia Huck,
	Laurent Vivier, Max Reitz, Alex Bennée,
	Philippe Mathieu-Daudé

From: Laurent Vivier <laurent@vivier.eu>

This allows to cover the virtio tests with a 32bit big-endian
virtio-mmio machine.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20210319202335.2397060-6-laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/qemu-iotests/testenv.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/qemu-iotests/testenv.py b/tests/qemu-iotests/testenv.py
index 1fbec854c1..6d27712617 100644
--- a/tests/qemu-iotests/testenv.py
+++ b/tests/qemu-iotests/testenv.py
@@ -208,6 +208,7 @@ def __init__(self, imgfmt: str, imgproto: str, aiomode: str,
             ('arm', 'virt'),
             ('aarch64', 'virt'),
             ('avr', 'mega2560'),
+            ('m68k', 'virt'),
             ('rx', 'gdbsim-r5f562n8'),
             ('tricore', 'tricore_testboard')
         )
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 21/22] iotests: iothreads need ioeventfd
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (19 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 20/22] iotests: test m68k with the virt machine Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 16:53 ` [PATCH v2 22/22] gitlab: default to not building the documentation Alex Bennée
                   ` (2 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel
  Cc: Kevin Wolf, Thomas Huth, open list:Block layer core,
	Laurent Vivier, Max Reitz, Alex Bennée

From: Laurent Vivier <laurent@vivier.eu>

And ioeventfd are only available with virtio-scsi-pci or virtio-scsi-ccw,
use the alias but add a rule to require virtio-scsi-pci or virtio-scsi-ccw
for the tests that use iothreads.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210319202335.2397060-7-laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 tests/qemu-iotests/127        |  3 ++-
 tests/qemu-iotests/256        |  6 ++++--
 tests/qemu-iotests/common.rc  | 13 +++++++++++++
 tests/qemu-iotests/iotests.py |  5 +++++
 4 files changed, 24 insertions(+), 3 deletions(-)

diff --git a/tests/qemu-iotests/127 b/tests/qemu-iotests/127
index 98e8e82a82..32edc3b068 100755
--- a/tests/qemu-iotests/127
+++ b/tests/qemu-iotests/127
@@ -44,7 +44,8 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
 _supported_fmt qcow2
 _supported_proto file fuse
 
-_require_devices virtio-scsi scsi-hd
+_require_devices scsi-hd
+_require_one_device_of virtio-scsi-pci virtio-scsi-ccw
 
 IMG_SIZE=64K
 
diff --git a/tests/qemu-iotests/256 b/tests/qemu-iotests/256
index 8d82a1dd86..13666813bd 100755
--- a/tests/qemu-iotests/256
+++ b/tests/qemu-iotests/256
@@ -24,6 +24,8 @@ import os
 import iotests
 from iotests import log
 
+iotests._verify_virtio_scsi_pci_or_ccw()
+
 iotests.script_initialize(supported_fmts=['qcow2'])
 size = 64 * 1024 * 1024
 
@@ -61,8 +63,8 @@ with iotests.FilePath('img0') as img0_path, \
     log('--- Preparing images & VM ---\n')
     vm.add_object('iothread,id=iothread0')
     vm.add_object('iothread,id=iothread1')
-    vm.add_device('virtio-scsi-pci,id=scsi0,iothread=iothread0')
-    vm.add_device('virtio-scsi-pci,id=scsi1,iothread=iothread1')
+    vm.add_device('virtio-scsi,id=scsi0,iothread=iothread0')
+    vm.add_device('virtio-scsi,id=scsi1,iothread=iothread1')
     iotests.qemu_img_create('-f', iotests.imgfmt, img0_path, str(size))
     iotests.qemu_img_create('-f', iotests.imgfmt, img1_path, str(size))
     vm.add_drive(img0_path, interface='none')
diff --git a/tests/qemu-iotests/common.rc b/tests/qemu-iotests/common.rc
index 65cdba5723..7f49c9716d 100644
--- a/tests/qemu-iotests/common.rc
+++ b/tests/qemu-iotests/common.rc
@@ -977,5 +977,18 @@ _require_devices()
     done
 }
 
+_require_one_device_of()
+{
+    available=$($QEMU -M none -device help | \
+                grep ^name | sed -e 's/^name "//' -e 's/".*$//')
+    for device
+    do
+        if echo "$available" | grep -q "$device" ; then
+            return
+        fi
+    done
+    _notrun "$* not available"
+}
+
 # make sure this script returns success
 true
diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
index 1e9e6a066e..5af0182895 100644
--- a/tests/qemu-iotests/iotests.py
+++ b/tests/qemu-iotests/iotests.py
@@ -1146,6 +1146,11 @@ def _verify_virtio_blk() -> None:
     if 'virtio-blk' not in out:
         notrun('Missing virtio-blk in QEMU binary')
 
+def _verify_virtio_scsi_pci_or_ccw() -> None:
+    out = qemu_pipe('-M', 'none', '-device', 'help')
+    if 'virtio-scsi-pci' not in out and 'virtio-scsi-ccw' not in out:
+        notrun('Missing virtio-scsi-pci or virtio-scsi-ccw in QEMU binary')
+
 
 def supports_quorum():
     return 'quorum' in qemu_img_pipe('--help')
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PATCH  v2 22/22] gitlab: default to not building the documentation
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (20 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 21/22] iotests: iothreads need ioeventfd Alex Bennée
@ 2021-03-23 16:53 ` Alex Bennée
  2021-03-23 18:21 ` [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing) no-reply
  2021-03-24 13:40 ` Peter Maydell
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-23 16:53 UTC (permalink / raw)
  To: qemu-devel
  Cc: Willian Rampazzo, Thomas Huth, Alex Bennée,
	Philippe Mathieu-Daudé,
	Wainer dos Santos Moschetta

In d0f26e68a0 ("gitlab: force enable docs build in Fedora, Ubuntu,
Debian") we made sure we can build the documents on more than one
system. However we don't want to build documents all the time as it's
a waste of cycles (and energy). So lets reduce the total amount of
documentation we build while still keeping coverage of at least one
build on each supported target.

Fixes: a8a3abe0b3 ("gitlab: move docs and tools build across from Travis")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>

---
v2
  - enable for OpenSUSE LEAP and Centos8 as well
  - disable for all cross builds
  - minor re-word of the commit text
v3
  - revert: enable for OpenSUSE LEAP and Centos8 as well
---
 .gitlab-ci.d/crossbuilds.yml | 15 ++++++++-------
 .gitlab-ci.yml               | 10 +++++-----
 2 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/crossbuilds.yml
index d5098c986b..2d95784ed5 100644
--- a/.gitlab-ci.d/crossbuilds.yml
+++ b/.gitlab-ci.d/crossbuilds.yml
@@ -6,10 +6,10 @@
     - mkdir build
     - cd build
     - PKG_CONFIG_PATH=$PKG_CONFIG_PATH
-      ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-user
-        --target-list-exclude="arm-softmmu cris-softmmu i386-softmmu
-          microblaze-softmmu mips-softmmu mipsel-softmmu mips64-softmmu
-          ppc-softmmu sh4-softmmu xtensa-softmmu"
+      ../configure --enable-werror --disable-docs $QEMU_CONFIGURE_OPTS
+        --disable-user --target-list-exclude="arm-softmmu cris-softmmu
+          i386-softmmu microblaze-softmmu mips-softmmu mipsel-softmmu
+          mips64-softmmu ppc-softmmu sh4-softmmu xtensa-softmmu"
     - make -j$(expr $(nproc) + 1) all check-build $MAKE_CHECK_ARGS
 
 # Job to cross-build specific accelerators.
@@ -25,8 +25,8 @@
     - mkdir build
     - cd build
     - PKG_CONFIG_PATH=$PKG_CONFIG_PATH
-      ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-tools
-        --enable-${ACCEL:-kvm} $ACCEL_CONFIGURE_OPTS
+      ../configure --enable-werror --disable-docs $QEMU_CONFIGURE_OPTS
+        --disable-tools --enable-${ACCEL:-kvm} $ACCEL_CONFIGURE_OPTS
     - make -j$(expr $(nproc) + 1) all check-build
 
 .cross_user_build_job:
@@ -36,7 +36,8 @@
     - mkdir build
     - cd build
     - PKG_CONFIG_PATH=$PKG_CONFIG_PATH
-      ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-system
+      ../configure --enable-werror --disable-docs $QEMU_CONFIGURE_OPTS
+        --disable-system
     - make -j$(expr $(nproc) + 1) all check-build $MAKE_CHECK_ARGS
 
 cross-armel-system:
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 9ffbaa7ffb..3480d79db3 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -23,9 +23,9 @@ include:
     - cd build
     - if test -n "$TARGETS";
       then
-        ../configure --enable-werror $CONFIGURE_ARGS --target-list="$TARGETS" ;
+        ../configure --enable-werror --disable-docs $CONFIGURE_ARGS --target-list="$TARGETS" ;
       else
-        ../configure --enable-werror $CONFIGURE_ARGS ;
+        ../configure --enable-werror --disable-docs $CONFIGURE_ARGS ;
       fi || { cat config.log meson-logs/meson-log.txt && exit 1; }
     - if test -n "$LD_JOBS";
       then
@@ -119,7 +119,7 @@ build-system-ubuntu:
     job: amd64-ubuntu2004-container
   variables:
     IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-fdt=system --enable-slirp=system
+    CONFIGURE_ARGS: --enable-docs --enable-fdt=system --enable-slirp=system
     TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu
       moxie-softmmu microblazeel-softmmu mips64el-softmmu
     MAKE_CHECK_ARGS: check-build
@@ -607,7 +607,7 @@ tsan-build:
     job: amd64-ubuntu2004-container
   variables:
     IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-tsan --cc=clang-10 --cxx=clang++-10 --disable-docs
+    CONFIGURE_ARGS: --enable-tsan --cc=clang-10 --cxx=clang++-10
           --enable-trace-backends=ust --enable-fdt=system --enable-slirp=system
     TARGETS: x86_64-softmmu ppc64-softmmu riscv64-softmmu x86_64-linux-user
     MAKE_CHECK_ARGS: bench V=1
@@ -619,7 +619,7 @@ build-deprecated:
     job: amd64-debian-user-cross-container
   variables:
     IMAGE: debian-all-test-cross
-    CONFIGURE_ARGS: --disable-docs --disable-tools
+    CONFIGURE_ARGS: --disable-tools
     MAKE_CHECK_ARGS: build-tcg
     TARGETS: ppc64abi32-linux-user lm32-softmmu unicore32-softmmu
   artifacts:
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* Re: [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing)
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (21 preceding siblings ...)
  2021-03-23 16:53 ` [PATCH v2 22/22] gitlab: default to not building the documentation Alex Bennée
@ 2021-03-23 18:21 ` no-reply
  2021-03-24 13:40 ` Peter Maydell
  23 siblings, 0 replies; 149+ messages in thread
From: no-reply @ 2021-03-23 18:21 UTC (permalink / raw)
  To: alex.bennee; +Cc: alex.bennee, qemu-devel

Patchew URL: https://patchew.org/QEMU/20210323165308.15244-1-alex.bennee@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20210323165308.15244-1-alex.bennee@linaro.org
Subject: [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing)

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/20210323094025.3569441-1-armbru@redhat.com -> patchew/20210323094025.3569441-1-armbru@redhat.com
 - [tag update]      patchew/20210323130614.146399-1-pbonzini@redhat.com -> patchew/20210323130614.146399-1-pbonzini@redhat.com
 * [new tag]         patchew/20210323165308.15244-1-alex.bennee@linaro.org -> patchew/20210323165308.15244-1-alex.bennee@linaro.org
Switched to a new branch 'test'
bcc7547 gitlab: default to not building the documentation
38b6266 iotests: iothreads need ioeventfd
7d603bd iotests: test m68k with the virt machine
175b36e iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"
c1434e3 blockdev: with -drive if=virtio, use generic virtio-blk
d9a5d5d m68k: add the virtio devices aliases
c077a9b qdev: define list of archs with virtio-pci or virtio-ccw
fe1df61 gitlab: extend timeouts for CFI builds
90e13f7 utils: Work around mingw strto*l bug with 0x
185f381 utils: Tighter tests for qemu_strtosz
d5854c3 cirrus.yml: Update the FreeBSD task to version 12.2
22b3df6 configure: Don't use the __atomic_*_16 functions for testing 128-bit support
527d4ef gitlab-ci.yml: Merge the trace-backend testing into other jobs
25e535d tests/tcg: add HeapInfo checking to semihosting test
fec9305 linux-user/riscv: initialise the TaskState heap/stack info
bdc3001 semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
a1a5d52 semihosting/arm-compat-semi: unify GET/SET_ARG helpers
0270290 semihosting: move semihosting tests to multiarch
a5310d0 tools/virtiofsd: include --socket-group in help
cecadd6 docs/devel: expand style section of memory management
2494a85 docs/devel: include the plugin API information from the headers
0967712 scripts/kernel-doc: strip QEMU_ from function definitions

=== OUTPUT BEGIN ===
1/22 Checking commit 0967712253a3 (scripts/kernel-doc: strip QEMU_ from function definitions)
2/22 Checking commit 2494a8533c43 (docs/devel: include the plugin API information from the headers)
3/22 Checking commit cecadd684571 (docs/devel: expand style section of memory management)
4/22 Checking commit a5310d05fd4b (tools/virtiofsd: include --socket-group in help)
5/22 Checking commit 0270290bfb74 (semihosting: move semihosting tests to multiarch)
6/22 Checking commit a1a5d52d3a8e (semihosting/arm-compat-semi: unify GET/SET_ARG helpers)
7/22 Checking commit bdc30013e582 (semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO)
8/22 Checking commit fec930576473 (linux-user/riscv: initialise the TaskState heap/stack info)
9/22 Checking commit 25e535d4c651 (tests/tcg: add HeapInfo checking to semihosting test)
10/22 Checking commit 527d4eff0f98 (gitlab-ci.yml: Merge the trace-backend testing into other jobs)
11/22 Checking commit 22b3df69b30c (configure: Don't use the __atomic_*_16 functions for testing 128-bit support)
12/22 Checking commit d5854c333694 (cirrus.yml: Update the FreeBSD task to version 12.2)
13/22 Checking commit 185f381817cd (utils: Tighter tests for qemu_strtosz)
14/22 Checking commit 90e13f730562 (utils: Work around mingw strto*l bug with 0x)
ERROR: consider using qemu_strtol in preference to strtol
#145: FILE: util/cutils.c:409:
+        if (strtol(nptr, &tmp, 10) == 0 && errno == 0 &&

total: 1 errors, 0 warnings, 169 lines checked

Patch 14/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/22 Checking commit fe1df614ddcc (gitlab: extend timeouts for CFI builds)
16/22 Checking commit c077a9b1d7be (qdev: define list of archs with virtio-pci or virtio-ccw)
17/22 Checking commit d9a5d5dfab12 (m68k: add the virtio devices aliases)
18/22 Checking commit c1434e384903 (blockdev: with -drive if=virtio, use generic virtio-blk)
19/22 Checking commit 175b36e18a3b (iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182")
20/22 Checking commit 7d603bdf27b0 (iotests: test m68k with the virt machine)
21/22 Checking commit 38b626694291 (iotests: iothreads need ioeventfd)
22/22 Checking commit bcc75474045f (gitlab: default to not building the documentation)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20210323165308.15244-1-alex.bennee@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v2 08/22] linux-user/riscv: initialise the TaskState heap/stack info
  2021-03-23 16:52 ` [PATCH v2 08/22] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
@ 2021-03-23 21:29   ` Alistair Francis
  0 siblings, 0 replies; 149+ messages in thread
From: Alistair Francis @ 2021-03-23 21:29 UTC (permalink / raw)
  To: Alex Bennée
  Cc: Richard Henderson, qemu-devel@nongnu.org Developers, Laurent Vivier

On Tue, Mar 23, 2021 at 1:07 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
> Arguably the target_cpu_copy_regs function for each architecture is
> misnamed as a number of the architectures also take the opportunity to
> fill out the TaskState structure. This could arguably be factored out
> into common code but that would require a wider audit of the
> architectures. For now just replicate for riscv so we can correctly
> report semihosting information for SYS_HEAPINFO.
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> Message-Id: <20210312102029.17017-5-alex.bennee@linaro.org>
> Message-Id: <20210320133706.21475-9-alex.bennee@linaro.org>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  linux-user/riscv/cpu_loop.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c
> index 6767f941e8..74a9628dc9 100644
> --- a/linux-user/riscv/cpu_loop.c
> +++ b/linux-user/riscv/cpu_loop.c
> @@ -135,4 +135,9 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
>          error_report("Incompatible ELF: RVE cpu requires RVE ABI binary");
>          exit(EXIT_FAILURE);
>      }
> +
> +    ts->stack_base = info->start_stack;
> +    ts->heap_base = info->brk;
> +    /* This will be filled in on the first SYS_HEAPINFO call.  */
> +    ts->heap_limit = 0;
>  }
> --
> 2.20.1
>
>


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v2 09/22] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-23 16:52 ` [PATCH v2 09/22] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
@ 2021-03-24  6:11   ` Thomas Huth
  2021-03-24 14:09   ` Richard Henderson
  1 sibling, 0 replies; 149+ messages in thread
From: Thomas Huth @ 2021-03-24  6:11 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel; +Cc: Richard Henderson

On 23/03/2021 17.52, Alex Bennée wrote:
> Query the SYS_HEAPINFO semicall and do some basic verification of the
> information via libc calls.
> 
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Message-Id: <20210320133706.21475-10-alex.bennee@linaro.org>
> 
> ---
> v2
>    - expand test as suggested by Richard
> ---
>   .../multiarch/arm-compat-semi/semihosting.c   | 55 ++++++++++++++++++-
>   1 file changed, 54 insertions(+), 1 deletion(-)
> 
> diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
> index b3fd16cd12..8627eee3cf 100644
> --- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c
> +++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
> @@ -8,9 +8,13 @@
>    */
>   
>   #define SYS_WRITE0      0x04
> +#define SYS_HEAPINFO    0x16
>   #define SYS_REPORTEXC   0x18
>   
>   #include <stdint.h>
> +#include <stdlib.h>
> +#include <stdio.h>
> +#include <string.h>
>   #include "semicall.h"
>   
>   int main(int argc, char *argv[argc])
> @@ -21,8 +25,57 @@ int main(int argc, char *argv[argc])
>       uintptr_t exit_block[2] = {0x20026, 0};
>       uintptr_t exit_code = (uintptr_t) &exit_block;
>   #endif
> +    struct {
> +        void *heap_base;
> +        void *heap_limit;
> +        void *stack_base;
> +        void *stack_limit;
> +    } info;
> +    void *ptr_to_info = (void *) &info;
>   
> -    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
> +    __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n");
> +
> +    memset(&info, 0, sizeof(info));
> +    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
> +
> +    if (info.heap_base == NULL || info.heap_limit == NULL) {
> +        printf("null heap: %p -> %p\n", info.heap_base, info.heap_limit);
> +        exit(1);
> +    }
> +
> +    /* Error if heap base is above limit */
> +    if ((uintptr_t) info.heap_base >= (uintptr_t) info.heap_limit) {
> +        printf("heap base %p >= heap_limit %p\n",
> +               info.heap_base, info.heap_limit);
> +        exit(2);
> +    }
> +
> +    if (info.stack_base == NULL || info.stack_limit) {
> +        printf("null stack: %p -> %p\n", info.stack_base, info.stack_limit);
> +        exit(3);
> +    }
> +
> +    /* check our local variables are indeed inside the reported stack */
> +    if (ptr_to_info > info.stack_base) {
> +        printf("info appears to be above stack: %p > %p\n", ptr_to_info,
> +               info.stack_base);
> +        exit(4);
> +    } else if (ptr_to_info < info.stack_limit) {
> +        printf("info appears to be outside stack: %p < %p\n", ptr_to_info,
> +               info.stack_limit);
> +        exit(5);
> +    }
> +
> +    if (ptr_to_info > info.heap_base && ptr_to_info < info.heap_limit) {
> +        printf("info appears to be inside the heap: %p in %p:%p\n",
> +               ptr_to_info, info.heap_base, info.heap_limit);
> +        exit(6);
> +    }
> +
> +    printf("heap: %p -> %p\n", info.heap_base, info.heap_limit);
> +    printf("stack: %p -> %p\n", info.stack_base, info.stack_limit);
> +
> +    __semi_call(SYS_WRITE0, (uintptr_t) "Passed HeapInfo checks");
>       __semi_call(SYS_REPORTEXC, exit_code);
>       /* if we get here we failed */
>       return -1;
> 

Reviewed-by: Thomas Huth <thuth@redhat.com>



^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing)
  2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
                   ` (22 preceding siblings ...)
  2021-03-23 18:21 ` [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing) no-reply
@ 2021-03-24 13:40 ` Peter Maydell
  2021-03-24 14:22   ` Alex Bennée
  23 siblings, 1 reply; 149+ messages in thread
From: Peter Maydell @ 2021-03-24 13:40 UTC (permalink / raw)
  To: Alex Bennée; +Cc: QEMU Developers

On Tue, 23 Mar 2021 at 17:59, Alex Bennée <alex.bennee@linaro.org> wrote:
> I've added a testing patch to extend the CFI times, Laurent's series
> to fix the iotest regressions currently keeping the CI from going
> green and an optimisation to the --enable-docs build to try and start
> bringing the total CI time down a bit. rc0 is being tagged today so
> I'll probably roll a PR from this later in the week in time for rc1.

That's tricky given you sent this patchseries at 6pm on the day
when rc1 was nominally going to be tagged :-)

I was kinda hoping to get the iotest regression fixed in rc1,
but I want to tag it today. Oh well, it's only the CI, not an
actual bug, so no big deal I guess.

thanks
-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH v2 09/22] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-23 16:52 ` [PATCH v2 09/22] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
  2021-03-24  6:11   ` Thomas Huth
@ 2021-03-24 14:09   ` Richard Henderson
  1 sibling, 0 replies; 149+ messages in thread
From: Richard Henderson @ 2021-03-24 14:09 UTC (permalink / raw)
  To: Alex Bennée, qemu-devel

On 3/23/21 10:52 AM, Alex Bennée wrote:
> Query the SYS_HEAPINFO semicall and do some basic verification of the
> information via libc calls.
> 
> Signed-off-by: Alex Bennée<alex.bennee@linaro.org>
> Message-Id:<20210320133706.21475-10-alex.bennee@linaro.org>
> 
> ---
> v2
>    - expand test as suggested by Richard
> ---
>   .../multiarch/arm-compat-semi/semihosting.c   | 55 ++++++++++++++++++-
>   1 file changed, 54 insertions(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing)
  2021-03-24 13:40 ` Peter Maydell
@ 2021-03-24 14:22   ` Alex Bennée
  2021-03-24 15:58     ` Peter Maydell
  0 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:22 UTC (permalink / raw)
  To: Peter Maydell; +Cc: QEMU Developers


Peter Maydell <peter.maydell@linaro.org> writes:

> On Tue, 23 Mar 2021 at 17:59, Alex Bennée <alex.bennee@linaro.org> wrote:
>> I've added a testing patch to extend the CFI times, Laurent's series
>> to fix the iotest regressions currently keeping the CI from going
>> green and an optimisation to the --enable-docs build to try and start
>> bringing the total CI time down a bit. rc0 is being tagged today so
>> I'll probably roll a PR from this later in the week in time for rc1.
>
> That's tricky given you sent this patchseries at 6pm on the day
> when rc1 was nominally going to be tagged :-)

The wiki says:

  2021-03-30 	Tag rc1 

so I thought I had a few days. I wasn't aiming for rc0 just to give time
for final review comments to come in.

>
> I was kinda hoping to get the iotest regression fixed in rc1,
> but I want to tag it today. Oh well, it's only the CI, not an
> actual bug, so no big deal I guess.
>
> thanks
> -- PMM


-- 
Alex Bennée


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing)
@ 2021-03-24 14:29 Alex Bennée
  2021-03-24 14:30 ` [PULL 01/22] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
                   ` (23 more replies)
  0 siblings, 24 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:29 UTC (permalink / raw)
  To: peter.maydell; +Cc: Alex Bennée, qemu-devel

The following changes since commit 01874b15d36e3f9a3506c47941a92ccf8d8bed98:

  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210323' into staging (2021-03-24 11:22:08 +0000)

are available in the Git repository at:

  https://github.com/stsquad/qemu.git tags/pull-6.0-rc0-fixed-240321-1

for you to fetch changes up to a9eb2df27f117bbac9f370bf8cb79532005f19c2:

  gitlab: default to not building the documentation (2021-03-24 14:25:48 +0000)

----------------------------------------------------------------
Various fixes for 6.0:

  - include kernel-doc API reference for plugins
  - fix semihosting SYS_HEAPINFO
  - various tweaks to improve CI runtime
  - more stroz fixes
  - fix iotest CI regressions

----------------------------------------------------------------
Alex Bennée (11):
      scripts/kernel-doc: strip QEMU_ from function definitions
      docs/devel: include the plugin API information from the headers
      docs/devel: expand style section of memory management
      tools/virtiofsd: include --socket-group in help
      semihosting: move semihosting tests to multiarch
      semihosting/arm-compat-semi: unify GET/SET_ARG helpers
      semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
      linux-user/riscv: initialise the TaskState heap/stack info
      tests/tcg: add HeapInfo checking to semihosting test
      gitlab: extend timeouts for CFI builds
      gitlab: default to not building the documentation

Eric Blake (2):
      utils: Tighter tests for qemu_strtosz
      utils: Work around mingw strto*l bug with 0x

Laurent Vivier (6):
      qdev: define list of archs with virtio-pci or virtio-ccw
      m68k: add the virtio devices aliases
      blockdev: with -drive if=virtio, use generic virtio-blk
      iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"
      iotests: test m68k with the virt machine
      iotests: iothreads need ioeventfd

Thomas Huth (3):
      gitlab-ci.yml: Merge the trace-backend testing into other jobs
      configure: Don't use the __atomic_*_16 functions for testing 128-bit support
      cirrus.yml: Update the FreeBSD task to version 12.2

 docs/devel/style.rst                               |  46 ++++--
 docs/devel/tcg-plugins.rst                         |   5 +
 configure                                          |   6 +-
 include/sysemu/arch_init.h                         |   9 ++
 tests/tcg/aarch64/semicall.h                       |  18 +++
 tests/tcg/arm/semicall.h                           |  15 +-
 tests/tcg/riscv64/semicall.h                       |  22 +++
 blockdev.c                                         |   6 +-
 linux-user/riscv/cpu_loop.c                        |   5 +
 semihosting/arm-compat-semi.c                      |  62 +++-----
 softmmu/qdev-monitor.c                             |  65 ++++----
 tests/tcg/arm/semihosting.c                        |  26 ----
 .../arm-compat-semi}/semiconsole.c                 |   2 +
 tests/tcg/multiarch/arm-compat-semi/semihosting.c  |  82 ++++++++++
 tests/unit/test-cutils.c                           | 171 ++++++++++++++++++++-
 tools/virtiofsd/fuse_lowlevel.c                    |   1 +
 util/cutils.c                                      |  33 ++--
 .cirrus.yml                                        |   7 +-
 .gitlab-ci.d/crossbuilds.yml                       |  15 +-
 .gitlab-ci.yml                                     |  43 ++----
 MAINTAINERS                                        |   1 +
 scripts/kernel-doc                                 |   3 +
 tests/qemu-iotests/040                             |   2 +-
 tests/qemu-iotests/051                             |  12 +-
 tests/qemu-iotests/051.out                         |   2 +-
 tests/qemu-iotests/051.pc.out                      |   2 +-
 tests/qemu-iotests/068                             |   4 +-
 tests/qemu-iotests/093                             |   3 +-
 tests/qemu-iotests/127                             |   3 +-
 tests/qemu-iotests/139                             |   9 +-
 tests/qemu-iotests/182                             |  13 +-
 tests/qemu-iotests/238                             |   4 +-
 tests/qemu-iotests/240                             |  10 +-
 tests/qemu-iotests/256                             |   6 +-
 tests/qemu-iotests/257                             |   4 +-
 tests/qemu-iotests/307                             |   4 +-
 tests/qemu-iotests/common.rc                       |  13 ++
 tests/qemu-iotests/iotests.py                      |  10 +-
 tests/qemu-iotests/testenv.py                      |   1 +
 tests/tcg/Makefile.target                          |   3 +
 tests/tcg/aarch64/Makefile.target                  |  18 ---
 tests/tcg/arm/Makefile.target                      |  22 ++-
 tests/tcg/multiarch/Makefile.target                |  31 ++++
 43 files changed, 548 insertions(+), 271 deletions(-)
 create mode 100644 tests/tcg/aarch64/semicall.h
 create mode 100644 tests/tcg/riscv64/semicall.h
 delete mode 100644 tests/tcg/arm/semihosting.c
 rename tests/tcg/{arm => multiarch/arm-compat-semi}/semiconsole.c (93%)
 create mode 100644 tests/tcg/multiarch/arm-compat-semi/semihosting.c

-- 
2.20.1



^ permalink raw reply	[flat|nested] 149+ messages in thread

* [PULL 01/22] scripts/kernel-doc: strip QEMU_ from function definitions
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 02/22] docs/devel: include the plugin API information from the headers Alex Bennée
                   ` (22 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell; +Cc: Richard Henderson, Alex Bennée, qemu-devel

Some packaged versions of Sphinx (fedora33/alpine so far) have issues
with the annotated C code that kernel-doc spits out. Without knowing
about things like QEMU_PLUGIN_EXPORT it chokes trying to understand
the code. Evidently this is a problem for the kernel as well as the
long stream of regex substitutions we add to in this patch can attest.

Fortunately we have a fairly common format for all our compiler
shenanigans as applied to functions so lets just filter them all out.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323165308.15244-2-alex.bennee@linaro.org>

diff --git a/scripts/kernel-doc b/scripts/kernel-doc
index 4b19851b2d..240923d509 100755
--- a/scripts/kernel-doc
+++ b/scripts/kernel-doc
@@ -1745,6 +1745,9 @@ sub dump_function($$) {
             )+
           \)\)\s+//x;
 
+    # Strip QEMU specific compiler annotations
+    $prototype =~ s/QEMU_[A-Z_]+ +//;
+
     # Yes, this truly is vile.  We are looking for:
     # 1. Return type (may be nothing if we're looking at a macro)
     # 2. Function name
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 02/22] docs/devel: include the plugin API information from the headers
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
  2021-03-24 14:30 ` [PULL 01/22] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 03/22] docs/devel: expand style section of memory management Alex Bennée
                   ` (21 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell; +Cc: Aaron Lindsay, Alex Bennée, qemu-devel

We have kerneldoc tags for the headers so we might as well extract
them into our developer documentation whilst we are at it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Message-Id: <20210323165308.15244-3-alex.bennee@linaro.org>

diff --git a/docs/devel/tcg-plugins.rst b/docs/devel/tcg-plugins.rst
index 39ce86ed96..18c6581d85 100644
--- a/docs/devel/tcg-plugins.rst
+++ b/docs/devel/tcg-plugins.rst
@@ -63,6 +63,11 @@ valid during the lifetime of the callback so it is important that any
 information that is needed is extracted during the callback and saved
 by the plugin.
 
+API
+===
+
+.. kernel-doc:: include/qemu/qemu-plugin.h
+
 Usage
 =====
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 03/22] docs/devel: expand style section of memory management
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
  2021-03-24 14:30 ` [PULL 01/22] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
  2021-03-24 14:30 ` [PULL 02/22] docs/devel: include the plugin API information from the headers Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 04/22] tools/virtiofsd: include --socket-group in help Alex Bennée
                   ` (20 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell; +Cc: Richard Henderson, Alex Bennée, qemu-devel

This aims to provide a bit more guidance for those who take on one of
our "clean up memory allocation" bite-sized tasks.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323165308.15244-4-alex.bennee@linaro.org>

diff --git a/docs/devel/style.rst b/docs/devel/style.rst
index 8b0bdb3570..260e3263fa 100644
--- a/docs/devel/style.rst
+++ b/docs/devel/style.rst
@@ -385,17 +385,37 @@ avoided.
 Low level memory management
 ===========================
 
-Use of the malloc/free/realloc/calloc/valloc/memalign/posix_memalign
+Use of the ``malloc/free/realloc/calloc/valloc/memalign/posix_memalign``
 APIs is not allowed in the QEMU codebase. Instead of these routines,
-use the GLib memory allocation routines g_malloc/g_malloc0/g_new/
-g_new0/g_realloc/g_free or QEMU's qemu_memalign/qemu_blockalign/qemu_vfree
-APIs.
-
-Please note that g_malloc will exit on allocation failure, so there
-is no need to test for failure (as you would have to with malloc).
-Calling g_malloc with a zero size is valid and will return NULL.
-
-Prefer g_new(T, n) instead of g_malloc(sizeof(T) ``*`` n) for the following
+use the GLib memory allocation routines
+``g_malloc/g_malloc0/g_new/g_new0/g_realloc/g_free``
+or QEMU's ``qemu_memalign/qemu_blockalign/qemu_vfree`` APIs.
+
+Please note that ``g_malloc`` will exit on allocation failure, so
+there is no need to test for failure (as you would have to with
+``malloc``). Generally using ``g_malloc`` on start-up is fine as the
+result of a failure to allocate memory is going to be a fatal exit
+anyway. There may be some start-up cases where failing is unreasonable
+(for example speculatively loading a large debug symbol table).
+
+Care should be taken to avoid introducing places where the guest could
+trigger an exit by causing a large allocation. For small allocations,
+of the order of 4k, a failure to allocate is likely indicative of an
+overloaded host and allowing ``g_malloc`` to ``exit`` is a reasonable
+approach. However for larger allocations where we could realistically
+fall-back to a smaller one if need be we should use functions like
+``g_try_new`` and check the result. For example this is valid approach
+for a time/space trade-off like ``tlb_mmu_resize_locked`` in the
+SoftMMU TLB code.
+
+If the lifetime of the allocation is within the function and there are
+multiple exist paths you can also improve the readability of the code
+by using ``g_autofree`` and related annotations. See :ref:`autofree-ref`
+for more details.
+
+Calling ``g_malloc`` with a zero size is valid and will return NULL.
+
+Prefer ``g_new(T, n)`` instead of ``g_malloc(sizeof(T) * n)`` for the following
 reasons:
 
 * It catches multiplication overflowing size_t;
@@ -409,8 +429,8 @@ Declarations like
 
 are acceptable, though.
 
-Memory allocated by qemu_memalign or qemu_blockalign must be freed with
-qemu_vfree, since breaking this will cause problems on Win32.
+Memory allocated by ``qemu_memalign`` or ``qemu_blockalign`` must be freed with
+``qemu_vfree``, since breaking this will cause problems on Win32.
 
 String manipulation
 ===================
@@ -485,6 +505,8 @@ In addition, QEMU assumes that the compiler does not use the latitude
 given in C99 and C11 to treat aspects of signed '<<' as undefined, as
 documented in the GNU Compiler Collection manual starting at version 4.0.
 
+.. _autofree-ref:
+
 Automatic memory deallocation
 =============================
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 04/22] tools/virtiofsd: include --socket-group in help
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (2 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 03/22] docs/devel: expand style section of memory management Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 05/22] semihosting: move semihosting tests to multiarch Alex Bennée
                   ` (19 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Connor Kuehl, Alex Bennée, qemu-devel, Stefan Hajnoczi,
	Dr. David Alan Gilbert

I confused myself wandering if this had been merged by looking at the
help output. It seems fuse_opt doesn't automagically add to help
output so lets do it now.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Connor Kuehl <ckuehl@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Updates: f6698f2b03 ("tools/virtiofsd: add support for --socket-group")
Message-Id: <20210323165308.15244-5-alex.bennee@linaro.org>

diff --git a/tools/virtiofsd/fuse_lowlevel.c b/tools/virtiofsd/fuse_lowlevel.c
index 1aa26c6333..58e32fc963 100644
--- a/tools/virtiofsd/fuse_lowlevel.c
+++ b/tools/virtiofsd/fuse_lowlevel.c
@@ -2450,6 +2450,7 @@ void fuse_lowlevel_help(void)
     printf(
         "    -o allow_root              allow access by root\n"
         "    --socket-path=PATH         path for the vhost-user socket\n"
+        "    --socket-group=GRNAME      name of group for the vhost-user socket\n"
         "    --fd=FDNUM                 fd number of vhost-user socket\n"
         "    --thread-pool-size=NUM     thread pool size limit (default %d)\n",
         THREAD_POOL_SIZE);
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 05/22] semihosting: move semihosting tests to multiarch
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (3 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 04/22] tools/virtiofsd: include --socket-group in help Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 06/22] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
                   ` (18 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Richard Henderson, open list:ARM TCG CPUs, Alex Bennée,
	qemu-devel, Philippe Mathieu-Daudé

It may be arm-compat-semihosting but more than one architecture uses
it so lets move the tests into the multiarch area. We gate it on the
feature and split the semicall.h header between the arches.

Also clean-up a bit of the Makefile messing about to one common set of
runners.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323165308.15244-6-alex.bennee@linaro.org>

diff --git a/tests/tcg/aarch64/semicall.h b/tests/tcg/aarch64/semicall.h
new file mode 100644
index 0000000000..8a3fce35c5
--- /dev/null
+++ b/tests/tcg/aarch64/semicall.h
@@ -0,0 +1,18 @@
+/*
+ * Semihosting Tests - AArch64 helper
+ *
+ * Copyright (c) 2019
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("x0") = type;
+    register uintptr_t a0 asm("x1") = arg0;
+    asm("hlt 0xf000"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semicall.h b/tests/tcg/arm/semicall.h
index d4f6818192..ad8ac51310 100644
--- a/tests/tcg/arm/semicall.h
+++ b/tests/tcg/arm/semicall.h
@@ -1,5 +1,5 @@
 /*
- * Semihosting Tests
+ * Semihosting Tests - ARM Helper
  *
  * Copyright (c) 2019
  * Written by Alex Bennée <alex.bennee@linaro.org>
@@ -7,13 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
-#define SYS_WRITE0      0x04
-#define SYS_READC       0x07
-#define SYS_REPORTEXC   0x18
-
 uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 {
-#if defined(__arm__)
     register uintptr_t t asm("r0") = type;
     register uintptr_t a0 asm("r1") = arg0;
 #ifdef __thumb__
@@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
 #endif
     asm(SVC : "=r" (t)
         : "r" (t), "r" (a0));
-#else
-    register uintptr_t t asm("x0") = type;
-    register uintptr_t a0 asm("x1") = arg0;
-    asm("hlt 0xf000"
-        : "=r" (t)
-        : "r" (t), "r" (a0));
-#endif
-
     return t;
 }
diff --git a/tests/tcg/riscv64/semicall.h b/tests/tcg/riscv64/semicall.h
new file mode 100644
index 0000000000..f8c88f32dc
--- /dev/null
+++ b/tests/tcg/riscv64/semicall.h
@@ -0,0 +1,22 @@
+/*
+ * Semihosting Tests - RiscV64 Helper
+ *
+ * Copyright (c) 2021
+ * Written by Alex Bennée <alex.bennee@linaro.org>
+ *
+ * SPDX-License-Identifier: GPL-3.0-or-later
+ */
+
+uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
+{
+    register uintptr_t t asm("a0") = type;
+    register uintptr_t a0 asm("a1") = arg0;
+    asm(".option norvc\n\t"
+        ".balign 16\n\t"
+        "slli zero, zero, 0x1f\n\t"
+        "ebreak\n\t"
+        "srai zero, zero, 0x7\n\t"
+        : "=r" (t)
+        : "r" (t), "r" (a0));
+    return t;
+}
diff --git a/tests/tcg/arm/semiconsole.c b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
similarity index 93%
rename from tests/tcg/arm/semiconsole.c
rename to tests/tcg/multiarch/arm-compat-semi/semiconsole.c
index 6ef0bd2450..1d82efc589 100644
--- a/tests/tcg/arm/semiconsole.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semiconsole.c
@@ -7,6 +7,8 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_READC       0x07
+
 #include <stdio.h>
 #include <stdint.h>
 #include "semicall.h"
diff --git a/tests/tcg/arm/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
similarity index 85%
rename from tests/tcg/arm/semihosting.c
rename to tests/tcg/multiarch/arm-compat-semi/semihosting.c
index 33faac9916..b3fd16cd12 100644
--- a/tests/tcg/arm/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -7,12 +7,15 @@
  * SPDX-License-Identifier: GPL-3.0-or-later
  */
 
+#define SYS_WRITE0      0x04
+#define SYS_REPORTEXC   0x18
+
 #include <stdint.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
 {
-#if defined(__arm__)
+#if UINTPTR_MAX == UINT32_MAX
     uintptr_t exit_code = 0x20026;
 #else
     uintptr_t exit_block[2] = {0x20026, 0};
diff --git a/MAINTAINERS b/MAINTAINERS
index 10ed6d7624..554be84b32 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3286,6 +3286,7 @@ M: Alex Bennée <alex.bennee@linaro.org>
 S: Maintained
 F: semihosting/
 F: include/semihosting/
+F: tests/tcg/multiarch/arm-compat-semi/
 
 Multi-process QEMU
 M: Elena Ufimtseva <elena.ufimtseva@oracle.com>
diff --git a/tests/tcg/Makefile.target b/tests/tcg/Makefile.target
index 24d75a5801..cab8c6b3a2 100644
--- a/tests/tcg/Makefile.target
+++ b/tests/tcg/Makefile.target
@@ -32,6 +32,9 @@
 all:
 -include ../../../config-host.mak
 -include ../config-$(TARGET).mak
+ifeq ($(CONFIG_USER_ONLY),y)
+-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak
+endif
 
 # for including , in command strings
 COMMA := ,
diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target
index bf53ad0087..56e48f4b34 100644
--- a/tests/tcg/aarch64/Makefile.target
+++ b/tests/tcg/aarch64/Makefile.target
@@ -41,24 +41,6 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4
 mte-%: CFLAGS += -march=armv8.5-a+memtag
 endif
 
-# Semihosting smoke test for linux-user
-AARCH64_TESTS += semihosting
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
-
-run-plugin-semihosting-with-%:
-	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
-		 $(call strip-plugin,$<) 2> $<.err, \
-		"$< on $(TARGET_NAME) with $*")
-
-AARCH64_TESTS += semiconsole
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
-
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
 ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
 # System Registers Tests
 AARCH64_TESTS += sysregs
diff --git a/tests/tcg/arm/Makefile.target b/tests/tcg/arm/Makefile.target
index ec95156562..5ab59ed6ce 100644
--- a/tests/tcg/arm/Makefile.target
+++ b/tests/tcg/arm/Makefile.target
@@ -29,37 +29,31 @@ run-fcvt: fcvt
 	$(call run-test,fcvt,$(QEMU) $<,"$< on $(TARGET_NAME)")
 	$(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref)
 
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+
 # Semihosting smoke test for linux-user
-ARM_TESTS += semihosting
 semihosting: CFLAGS += -mthumb
-run-semihosting: semihosting
-	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
 ARM_TESTS += semihosting-arm
-semihosting-arm: CFLAGS += -marm
+semihosting-arm: CFLAGS += -marm -I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
 semihosting-arm: semihosting.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semihosting-arm: semihosting-arm
 	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
 
-run-plugin-semihosting-with-%:
+run-plugin-semihosting-arm-with-%:
 	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
 		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
 		 $(call strip-plugin,$<) 2> $<.err, \
 		"$< on $(TARGET_NAME) with $*")
 
-ARM_TESTS += semiconsole semiconsole-arm
+ARM_TESTS += semiconsole-arm
 
 semiconsole: CFLAGS += -mthumb
-run-semiconsole: semiconsole
-	$(call skip-test, $<, "MANUAL ONLY")
 
-run-plugin-semiconsole-with-%:
-	$(call skip-test, $<, "MANUAL ONLY")
-
-semiconsole-arm: CFLAGS += -marm
-semiconsole-arm: semiconsole.c
+semiconsole-arm: CFLAGS += -marm -I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+semiconsole-arm: semihosting.c
 	$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
 
 run-semiconsole-arm: semiconsole-arm
@@ -68,6 +62,8 @@ run-semiconsole-arm: semiconsole-arm
 run-plugin-semiconsole-arm-with-%:
 	$(call skip-test, $<, "MANUAL ONLY")
 
+endif
+
 ARM_TESTS += commpage
 
 TESTS += $(ARM_TESTS)
diff --git a/tests/tcg/multiarch/Makefile.target b/tests/tcg/multiarch/Makefile.target
index abbdb2e126..a3a751723d 100644
--- a/tests/tcg/multiarch/Makefile.target
+++ b/tests/tcg/multiarch/Makefile.target
@@ -69,6 +69,37 @@ run-gdbstub-%:
 endif
 EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read
 
+# ARM Compatible Semi Hosting Tests
+#
+# Despite having ARM in the name we actually have several
+# architectures that implement it. We gate the tests on the feature
+# appearing in config.
+#
+ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
+VPATH += $(MULTIARCH_SRC)/arm-compat-semi
+
+# Add -I path back to TARGET_NAME for semicall.h
+semihosting: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semihosting: semihosting
+	$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
+
+run-plugin-semihosting-with-%:
+	$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
+		-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
+		 $(call strip-plugin,$<) 2> $<.err, \
+		"$< on $(TARGET_NAME) with $*")
+
+semiconsole: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
+
+run-semiconsole: semiconsole
+	$(call skip-test, $<, "MANUAL ONLY")
+
+run-plugin-semiconsole-with-%:
+	$(call skip-test, $<, "MANUAL ONLY")
+
+TESTS += semihosting semiconsole
+endif
 
 # Update TESTS
 TESTS += $(MULTIARCH_TESTS)
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 06/22] semihosting/arm-compat-semi: unify GET/SET_ARG helpers
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (4 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 05/22] semihosting: move semihosting tests to multiarch Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
                   ` (17 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell; +Cc: Keith Packard, Alex Bennée, qemu-devel

>>>From the semihosting point of view what we want to know is the current
mode of the processor. Unify this into a single helper and allow us to
use the same GET/SET_ARG helpers for the rest of the code. Having the
helper will also be useful later.

Note: we aren't currently testing riscv32 due to missing toolchain for
check-tcg tests.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Keith Packard <keithp@keithp.com>
Message-Id: <20210323165308.15244-7-alex.bennee@linaro.org>

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 94950b6c56..0f0e129a7c 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -767,15 +767,28 @@ static const GuestFDFunctions guestfd_fns[] = {
     },
 };
 
-/* Read the input value from the argument block; fail the semihosting
- * call if the memory read fails.
+/*
+ * Read the input value from the argument block; fail the semihosting
+ * call if the memory read fails. Eventually we could use a generic
+ * CPUState helper function here.
  */
-#ifdef TARGET_ARM
+static inline bool is_64bit_semihosting(CPUArchState *env)
+{
+#if defined(TARGET_ARM)
+    return is_a64(env);
+#elif defined(TARGET_RISCV)
+    return !riscv_cpu_is_32bit(env);
+#else
+#error un-handled architecture
+#endif
+}
+
+
 #define GET_ARG(n) do {                                 \
-    if (is_a64(env)) {                                  \
+    if (is_64bit_semihosting(env)) {                    \
         if (get_user_u64(arg ## n, args + (n) * 8)) {   \
             errno = EFAULT;                             \
-            return set_swi_errno(cs, -1);              \
+            return set_swi_errno(cs, -1);               \
         }                                               \
     } else {                                            \
         if (get_user_u32(arg ## n, args + (n) * 4)) {   \
@@ -786,41 +799,10 @@ static const GuestFDFunctions guestfd_fns[] = {
 } while (0)
 
 #define SET_ARG(n, val)                                 \
-    (is_a64(env) ?                                      \
+    (is_64bit_semihosting(env) ?                        \
      put_user_u64(val, args + (n) * 8) :                \
      put_user_u32(val, args + (n) * 4))
-#endif
 
-#ifdef TARGET_RISCV
-
-/*
- * get_user_ual is defined as get_user_u32 in softmmu-semi.h,
- * we need a macro that fetches a target_ulong
- */
-#define get_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     get_user_u64(arg, p) :                     \
-     get_user_u32(arg, p))
-
-/*
- * put_user_ual is defined as put_user_u32 in softmmu-semi.h,
- * we need a macro that stores a target_ulong
- */
-#define put_user_utl(arg, p)                    \
-    ((sizeof(target_ulong) == 8) ?              \
-     put_user_u64(arg, p) :                     \
-     put_user_u32(arg, p))
-
-#define GET_ARG(n) do {                                                 \
-        if (get_user_utl(arg ## n, args + (n) * sizeof(target_ulong))) { \
-            errno = EFAULT;                                             \
-            return set_swi_errno(cs, -1);                              \
-        }                                                               \
-    } while (0)
-
-#define SET_ARG(n, val)                                 \
-    put_user_utl(val, args + (n) * sizeof(target_ulong))
-#endif
 
 /*
  * Do a semihosting call.
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (5 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 06/22] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30   ` [Bug 1915925] " Alex Bennée
  2021-03-24 14:30 ` [PULL 08/22] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
                   ` (16 subsequent siblings)
  23 siblings, 1 reply; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell; +Cc: Bug 1915925, Keith Packard, Alex Bennée, qemu-devel

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Bug: https://bugs.launchpad.net/bugs/1915925
Message-Id: <20210323165308.15244-8-alex.bennee@linaro.org>

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [Bug 1915925] [PULL 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
  2021-03-24 14:30 ` [PULL 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-24 14:30   ` Alex Bennée
  0 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: qemu-devel

As per the spec:

  the PARAMETER REGISTER contains the address of a pointer to a
  four-field data block.

So we need to follow arg0 and place the results of SYS_HEAPINFO there.

Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces to use CPUState *")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Cc: Bug 1915925 <1915925@bugs.launchpad.net>
Cc: Keith Packard <keithp@keithp.com>
Bug: https://bugs.launchpad.net/bugs/1915925
Message-Id: <20210323165308.15244-8-alex.bennee@linaro.org>

diff --git a/semihosting/arm-compat-semi.c b/semihosting/arm-compat-semi.c
index 0f0e129a7c..fe079ca93a 100644
--- a/semihosting/arm-compat-semi.c
+++ b/semihosting/arm-compat-semi.c
@@ -1214,7 +1214,11 @@ target_ulong do_common_semihosting(CPUState *cs)
             for (i = 0; i < ARRAY_SIZE(retvals); i++) {
                 bool fail;
 
-                fail = SET_ARG(i, retvals[i]);
+                if (is_64bit_semihosting(env)) {
+                    fail = put_user_u64(retvals[i], arg0 + i * 8);
+                } else {
+                    fail = put_user_u32(retvals[i], arg0 + i * 4);
+                }
 
                 if (fail) {
                     /* Couldn't write back to argument block */
-- 
2.20.1

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  In Progress

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 08/22] linux-user/riscv: initialise the TaskState heap/stack info
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (6 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 09/22] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
                   ` (15 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Richard Henderson, Alistair Francis, Alex Bennée,
	qemu-devel, Laurent Vivier

Arguably the target_cpu_copy_regs function for each architecture is
misnamed as a number of the architectures also take the opportunity to
fill out the TaskState structure. This could arguably be factored out
into common code but that would require a wider audit of the
architectures. For now just replicate for riscv so we can correctly
report semihosting information for SYS_HEAPINFO.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20210323165308.15244-9-alex.bennee@linaro.org>

diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c
index 6767f941e8..74a9628dc9 100644
--- a/linux-user/riscv/cpu_loop.c
+++ b/linux-user/riscv/cpu_loop.c
@@ -135,4 +135,9 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
         error_report("Incompatible ELF: RVE cpu requires RVE ABI binary");
         exit(EXIT_FAILURE);
     }
+
+    ts->stack_base = info->start_stack;
+    ts->heap_base = info->brk;
+    /* This will be filled in on the first SYS_HEAPINFO call.  */
+    ts->heap_limit = 0;
 }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 09/22] tests/tcg: add HeapInfo checking to semihosting test
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (7 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 08/22] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 10/22] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
                   ` (14 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Richard Henderson, Thomas Huth, Alex Bennée, qemu-devel

Query the SYS_HEAPINFO semicall and do some basic verification of the
information via libc calls.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210323165308.15244-10-alex.bennee@linaro.org>

diff --git a/tests/tcg/multiarch/arm-compat-semi/semihosting.c b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
index b3fd16cd12..8627eee3cf 100644
--- a/tests/tcg/multiarch/arm-compat-semi/semihosting.c
+++ b/tests/tcg/multiarch/arm-compat-semi/semihosting.c
@@ -8,9 +8,13 @@
  */
 
 #define SYS_WRITE0      0x04
+#define SYS_HEAPINFO    0x16
 #define SYS_REPORTEXC   0x18
 
 #include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
 #include "semicall.h"
 
 int main(int argc, char *argv[argc])
@@ -21,8 +25,57 @@ int main(int argc, char *argv[argc])
     uintptr_t exit_block[2] = {0x20026, 0};
     uintptr_t exit_code = (uintptr_t) &exit_block;
 #endif
+    struct {
+        void *heap_base;
+        void *heap_limit;
+        void *stack_base;
+        void *stack_limit;
+    } info;
+    void *ptr_to_info = (void *) &info;
 
-    __semi_call(SYS_WRITE0, (uintptr_t) "Hello World");
+    __semi_call(SYS_WRITE0, (uintptr_t) "Checking HeapInfo\n");
+
+    memset(&info, 0, sizeof(info));
+    __semi_call(SYS_HEAPINFO, (uintptr_t) &ptr_to_info);
+
+    if (info.heap_base == NULL || info.heap_limit == NULL) {
+        printf("null heap: %p -> %p\n", info.heap_base, info.heap_limit);
+        exit(1);
+    }
+
+    /* Error if heap base is above limit */
+    if ((uintptr_t) info.heap_base >= (uintptr_t) info.heap_limit) {
+        printf("heap base %p >= heap_limit %p\n",
+               info.heap_base, info.heap_limit);
+        exit(2);
+    }
+
+    if (info.stack_base == NULL || info.stack_limit) {
+        printf("null stack: %p -> %p\n", info.stack_base, info.stack_limit);
+        exit(3);
+    }
+
+    /* check our local variables are indeed inside the reported stack */
+    if (ptr_to_info > info.stack_base) {
+        printf("info appears to be above stack: %p > %p\n", ptr_to_info,
+               info.stack_base);
+        exit(4);
+    } else if (ptr_to_info < info.stack_limit) {
+        printf("info appears to be outside stack: %p < %p\n", ptr_to_info,
+               info.stack_limit);
+        exit(5);
+    }
+
+    if (ptr_to_info > info.heap_base && ptr_to_info < info.heap_limit) {
+        printf("info appears to be inside the heap: %p in %p:%p\n",
+               ptr_to_info, info.heap_base, info.heap_limit);
+        exit(6);
+    }
+
+    printf("heap: %p -> %p\n", info.heap_base, info.heap_limit);
+    printf("stack: %p -> %p\n", info.stack_base, info.stack_limit);
+
+    __semi_call(SYS_WRITE0, (uintptr_t) "Passed HeapInfo checks");
     __semi_call(SYS_REPORTEXC, exit_code);
     /* if we get here we failed */
     return -1;
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 10/22] gitlab-ci.yml: Merge the trace-backend testing into other jobs
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (8 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 09/22] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 11/22] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
                   ` (13 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Thomas Huth, qemu-devel, Wainer dos Santos Moschetta,
	Philippe Mathieu-Daudé,
	Willian Rampazzo, Alex Bennée

From: Thomas Huth <thuth@redhat.com>

Our gitlab-ci got quite slow in the past weeks, due to the immense amount
of jobs that we have, so we should try to reduce the number of jobs.
There is no real good reason for having separate jobs just to test the
trace backends, we can do this just fine in other jobs, too.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Message-Id: <20210319095726.45965-1-thuth@redhat.com>
Message-Id: <20210323165308.15244-11-alex.bennee@linaro.org>

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index f65cb11c4d..f746d5fbea 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -87,7 +87,7 @@ build-system-alpine:
     TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu
       moxie-softmmu microblazeel-softmmu mips64el-softmmu
     MAKE_CHECK_ARGS: check-build
-    CONFIGURE_ARGS: --enable-docs
+    CONFIGURE_ARGS: --enable-docs --enable-trace-backends=log,simple,syslog
   artifacts:
     expire_in: 2 days
     paths:
@@ -605,7 +605,7 @@ tsan-build:
   variables:
     IMAGE: ubuntu2004
     CONFIGURE_ARGS: --enable-tsan --cc=clang-10 --cxx=clang++-10 --disable-docs
-                    --enable-fdt=system --enable-slirp=system
+          --enable-trace-backends=ust --enable-fdt=system --enable-slirp=system
     TARGETS: x86_64-softmmu ppc64-softmmu riscv64-softmmu x86_64-linux-user
     MAKE_CHECK_ARGS: bench V=1
 
@@ -702,6 +702,7 @@ build-coroutine-sigaltstack:
   variables:
     IMAGE: ubuntu2004
     CONFIGURE_ARGS: --with-coroutine=sigaltstack --disable-tcg
+                    --enable-trace-backends=ftrace
     MAKE_CHECK_ARGS: check-unit
 
 # Most jobs test latest gcrypt or nettle builds
@@ -739,31 +740,6 @@ crypto-only-gnutls:
     MAKE_CHECK_ARGS: check
 
 
-# We don't need to exercise every backend with every front-end
-build-trace-multi-user:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=log,simple,syslog --disable-system
-
-build-trace-ftrace-system:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=ftrace --target-list=x86_64-softmmu
-
-build-trace-ust-system:
-  <<: *native_build_job_definition
-  needs:
-    job: amd64-ubuntu2004-container
-  variables:
-    IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-trace-backends=ust --target-list=x86_64-softmmu
-
 # Check our reduced build configurations
 build-without-default-devices:
   <<: *native_build_job_definition
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 11/22] configure: Don't use the __atomic_*_16 functions for testing 128-bit support
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (9 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 10/22] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 12/22] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
                   ` (12 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Richard Henderson, Thomas Huth, Alex Bennée, qemu-devel,
	Paolo Bonzini

From: Thomas Huth <thuth@redhat.com>

The test for 128-bit atomics is causing trouble with FreeBSD 12.2 and
--enable-werror:

 cc -Werror -fPIE -DPIE -std=gnu99 -Wall -m64 -mcx16 -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-decls -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv -Wold-style-definition -Wtype-limits -Wformat-security -Wformat-y2k -Winit-self -Wignored-qualifiers -Wempty-body -Wnested-externs -Wendif-labels -Wexpansion-to-defined -Wno-initializer-overrides -Wno-missing-include-dirs -Wno-shift-negative-value -Wno-string-plus-int -Wno-typedef-redefinition -Wno-tautological-type-limit-compare -fstack-protector-strong -o config-temp/qemu-conf.exe config-temp/qemu-conf.c -pie -Wl,-z,relro -Wl,-z,now -m64 -fstack-protector-strong
 config-temp/qemu-conf.c:4:7: error: implicit declaration of function '__atomic_load_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   y = __atomic_load_16(&x, 0);
       ^
 config-temp/qemu-conf.c:5:3: error: implicit declaration of function '__atomic_store_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   __atomic_store_16(&x, y, 0);
   ^
 config-temp/qemu-conf.c:5:3: note: did you mean '__atomic_load_16'?
 config-temp/qemu-conf.c:4:7: note: '__atomic_load_16' declared here
   y = __atomic_load_16(&x, 0);
       ^
 config-temp/qemu-conf.c:6:3: error: implicit declaration of function '__atomic_compare_exchange_16' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0);
   ^
 3 errors generated.

Looking for they way we are using atomic functions in QEMU, we are not
using these functions with the _16 suffix anyway. Switch to the same
functions that we use in the include/qemu/atomic.h header.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20210317110512.583747-2-thuth@redhat.com>
Message-Id: <20210323165308.15244-12-alex.bennee@linaro.org>

diff --git a/configure b/configure
index edf9dc8985..535e6a9269 100755
--- a/configure
+++ b/configure
@@ -4779,9 +4779,9 @@ if test "$int128" = "yes"; then
 int main(void)
 {
   unsigned __int128 x = 0, y = 0;
-  y = __atomic_load_16(&x, 0);
-  __atomic_store_16(&x, y, 0);
-  __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0);
+  y = __atomic_load(&x, 0);
+  __atomic_store(&x, y, 0);
+  __atomic_compare_exchange(&x, &y, x, 0, 0, 0);
   return 0;
 }
 EOF
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 12/22] cirrus.yml: Update the FreeBSD task to version 12.2
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (10 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 11/22] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 13/22] utils: Tighter tests for qemu_strtosz Alex Bennée
                   ` (11 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Thomas Huth, Ed Maste, qemu-devel, Yonggang Luo,
	Alex Bennée, Li-Wen Hsu

From: Thomas Huth <thuth@redhat.com>

FreeBSD version 12.1 is out of service now, and the task in the
Cirrus-CI is failing. Update to 12.2 to get it working again.
Unfortunately, there is a bug in libtasn1 that triggers with the
new version of Clang that is used there (see this thread for details:
https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg00739.html ),
so we have to disable gnutls for now to make it work again. We can
enable it later again once libtasn1 has been fixed in FreeBSD.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20210319101402.48871-1-thuth@redhat.com>
Message-Id: <20210323165308.15244-13-alex.bennee@linaro.org>

diff --git a/.cirrus.yml b/.cirrus.yml
index bc40a0550d..f53c519447 100644
--- a/.cirrus.yml
+++ b/.cirrus.yml
@@ -3,7 +3,7 @@ env:
 
 freebsd_12_task:
   freebsd_instance:
-    image_family: freebsd-12-1
+    image_family: freebsd-12-2
     cpu: 8
     memory: 8G
   install_script:
@@ -13,7 +13,10 @@ freebsd_12_task:
   script:
     - mkdir build
     - cd build
-    - ../configure --enable-werror || { cat config.log meson-logs/meson-log.txt; exit 1; }
+    # TODO: Enable gnutls again once FreeBSD's libtasn1 got fixed
+    # See: https://gitlab.com/gnutls/libtasn1/-/merge_requests/71
+    - ../configure --enable-werror --disable-gnutls
+      || { cat config.log meson-logs/meson-log.txt; exit 1; }
     - gmake -j$(sysctl -n hw.ncpu)
     - gmake -j$(sysctl -n hw.ncpu) check V=1
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 13/22] utils: Tighter tests for qemu_strtosz
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (11 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 12/22] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 14/22] utils: Work around mingw strto*l bug with 0x Alex Bennée
                   ` (10 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell; +Cc: Alex Bennée, Thomas Huth, qemu-devel

From: Eric Blake <eblake@redhat.com>

Our tests were not validating the return value in all cases, nor was
it guaranteeing our documented claim that 'res' is unchanged on error.
For that matter, it wasn't as thorough as the existing tests for
qemu_strtoi() and friends for proving that endptr and res are sanely
set.  Enhancing the test found one case where we violated our
documentation: namely, when failing with EINVAL when endptr is NULL,
we shouldn't modify res.

Signed-off-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210317143325.2165821-2-eblake@redhat.com>
Message-Id: <20210323165308.15244-14-alex.bennee@linaro.org>

diff --git a/tests/unit/test-cutils.c b/tests/unit/test-cutils.c
index e025b54c05..5908de4fd0 100644
--- a/tests/unit/test-cutils.c
+++ b/tests/unit/test-cutils.c
@@ -1952,9 +1952,11 @@ static void test_qemu_strtosz_simple(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
@@ -1962,6 +1964,8 @@ static void test_qemu_strtosz_simple(void)
 
     /* Leading 0 gives decimal results, not octal */
     str = "08";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 8);
@@ -1969,46 +1973,61 @@ static void test_qemu_strtosz_simple(void)
 
     /* Leading space is ignored */
     str = " 12345";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345);
     g_assert(endptr == str + 6);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345);
 
     str = "9007199254740991"; /* 2^53-1 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x1fffffffffffff);
     g_assert(endptr == str + 16);
 
     str = "9007199254740992"; /* 2^53 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x20000000000000);
     g_assert(endptr == str + 16);
 
     str = "9007199254740993"; /* 2^53+1 */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x20000000000001);
     g_assert(endptr == str + 16);
 
     str = "18446744073709549568"; /* 0xfffffffffffff800 (53 msbs set) */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xfffffffffffff800);
     g_assert(endptr == str + 20);
 
     str = "18446744073709550591"; /* 0xfffffffffffffbff */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xfffffffffffffbff);
     g_assert(endptr == str + 20);
 
     str = "18446744073709551615"; /* 0xffffffffffffffff */
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0xffffffffffffffff);
@@ -2020,21 +2039,27 @@ static void test_qemu_strtosz_hex(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0x0";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 3);
 
     str = "0xab";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 171);
     g_assert(endptr == str + 4);
 
     str = "0xae";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 174);
@@ -2053,44 +2078,60 @@ static void test_qemu_strtosz_units(void)
     const char *e = "1E";
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     /* default is M */
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz_MiB(none, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, MiB);
     g_assert(endptr == none + 1);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(b, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1);
     g_assert(endptr == b + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(k, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, KiB);
     g_assert(endptr == k + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(m, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, MiB);
     g_assert(endptr == m + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(g, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, GiB);
     g_assert(endptr == g + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(t, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, TiB);
     g_assert(endptr == t + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(p, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, PiB);
     g_assert(endptr == p + 2);
 
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(e, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, EiB);
@@ -2102,9 +2143,11 @@ static void test_qemu_strtosz_float(void)
     const char *str;
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "0.5E";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, EiB / 2);
@@ -2112,6 +2155,8 @@ static void test_qemu_strtosz_float(void)
 
     /* For convenience, a fraction of 0 is tolerated even on bytes */
     str = "1.0B";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1);
@@ -2119,6 +2164,8 @@ static void test_qemu_strtosz_float(void)
 
     /* An empty fraction is tolerated */
     str = "1.k";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1024);
@@ -2126,6 +2173,8 @@ static void test_qemu_strtosz_float(void)
 
     /* For convenience, we permit values that are not byte-exact */
     str = "12.345M";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, (uint64_t) (12.345 * MiB + 0.5));
@@ -2140,67 +2189,91 @@ static void test_qemu_strtosz_invalid(void)
     uint64_t res = 0xbaadf00d;
 
     str = "";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = " \t ";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "crap";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "inf";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "NaN";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* Fractional values require scale larger than bytes */
     str = "1.1B";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "1.1";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No floating point exponents */
     str = "1.5e1k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "1.5E+0k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No hex fractions */
     str = "0x1.8k";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     /* No negative values */
     str = "-0";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 
     str = "-1";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str);
 }
 
@@ -2209,48 +2282,72 @@ static void test_qemu_strtosz_trailing(void)
     const char *str;
     const char *endptr;
     int err;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "123xxx";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz_MiB(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 123 * MiB);
     g_assert(endptr == str + 3);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "1kiB";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 1024);
     g_assert(endptr == str + 2);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "0x";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 1);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "0.NaN";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
     g_assert(endptr == str + 2);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 
     str = "123-45";
+    endptr = NULL;
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, &endptr, &res);
+    g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 123);
     g_assert(endptr == str + 3);
 
+    res = 0xbaadf00d;
     err = qemu_strtosz(str, NULL, &res);
     g_assert_cmpint(err, ==, -EINVAL);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
 }
 
 static void test_qemu_strtosz_erange(void)
@@ -2261,13 +2358,17 @@ static void test_qemu_strtosz_erange(void)
     uint64_t res = 0xbaadf00d;
 
     str = "18446744073709551616"; /* 2^64; see strtosz_simple for 2^64-1 */
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -ERANGE);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str + 20);
 
     str = "20E";
+    endptr = NULL;
     err = qemu_strtosz(str, &endptr, &res);
     g_assert_cmpint(err, ==, -ERANGE);
+    g_assert_cmpint(res, ==, 0xbaadf00d);
     g_assert(endptr == str + 3);
 }
 
@@ -2276,15 +2377,19 @@ static void test_qemu_strtosz_metric(void)
     const char *str;
     int err;
     const char *endptr;
-    uint64_t res = 0xbaadf00d;
+    uint64_t res;
 
     str = "12345k";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz_metric(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345000);
     g_assert(endptr == str + 6);
 
     str = "12.345M";
+    endptr = str;
+    res = 0xbaadf00d;
     err = qemu_strtosz_metric(str, &endptr, &res);
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 12345000);
diff --git a/util/cutils.c b/util/cutils.c
index c442882b88..b425ed6570 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -362,7 +362,6 @@ static int do_strtosz(const char *nptr, const char **end,
         }
     }
 
-    *result = val;
     retval = 0;
 
 out:
@@ -371,6 +370,9 @@ out:
     } else if (*endptr) {
         retval = -EINVAL;
     }
+    if (retval == 0) {
+        *result = val;
+    }
 
     return retval;
 }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 14/22] utils: Work around mingw strto*l bug with 0x
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (12 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 13/22] utils: Tighter tests for qemu_strtosz Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 15/22] gitlab: extend timeouts for CFI builds Alex Bennée
                   ` (9 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell; +Cc: Alex Bennée, Thomas Huth, qemu-devel

From: Eric Blake <eblake@redhat.com>

Mingw recognizes that "0x" has value 0 without setting errno, but
fails to advance endptr to the trailing garbage 'x'.  This in turn
showed up in our recent testsuite additions for qemu_strtosz (commit
1657ba44b4 utils: Enhance testsuite for do_strtosz()); adjust our
remaining tests to show that we now work around this windows bug.

This patch intentionally fails check-syntax for use of strtol.

Signed-off-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210317143325.2165821-3-eblake@redhat.com>
Message-Id: <20210323165308.15244-15-alex.bennee@linaro.org>

diff --git a/tests/unit/test-cutils.c b/tests/unit/test-cutils.c
index 5908de4fd0..98671f1ac3 100644
--- a/tests/unit/test-cutils.c
+++ b/tests/unit/test-cutils.c
@@ -378,6 +378,15 @@ static void test_qemu_strtoi_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoi(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoi_max(void)
@@ -669,6 +678,15 @@ static void test_qemu_strtoui_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoui(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoui_max(void)
@@ -955,6 +973,15 @@ static void test_qemu_strtol_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtol(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtol_max(void)
@@ -1244,6 +1271,15 @@ static void test_qemu_strtoul_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    res = 999;
+    endptr = &f;
+    err = qemu_strtoul(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoul_max(void)
@@ -1528,6 +1564,15 @@ static void test_qemu_strtoi64_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmpint(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    endptr = &f;
+    res = 999;
+    err = qemu_strtoi64(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmpint(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtoi64_max(void)
@@ -1815,6 +1860,15 @@ static void test_qemu_strtou64_hex(void)
     g_assert_cmpint(err, ==, 0);
     g_assert_cmphex(res, ==, 0x123);
     g_assert(endptr == str + strlen(str));
+
+    str = "0x";
+    endptr = &f;
+    res = 999;
+    err = qemu_strtou64(str, &endptr, 16, &res);
+
+    g_assert_cmpint(err, ==, 0);
+    g_assert_cmphex(res, ==, 0);
+    g_assert(endptr == str + 1);
 }
 
 static void test_qemu_strtou64_max(void)
diff --git a/util/cutils.c b/util/cutils.c
index b425ed6570..ee908486da 100644
--- a/util/cutils.c
+++ b/util/cutils.c
@@ -396,9 +396,22 @@ int qemu_strtosz_metric(const char *nptr, const char **end, uint64_t *result)
  * Helper function for error checking after strtol() and the like
  */
 static int check_strtox_error(const char *nptr, char *ep,
-                              const char **endptr, int libc_errno)
+                              const char **endptr, bool check_zero,
+                              int libc_errno)
 {
     assert(ep >= nptr);
+
+    /* Windows has a bug in that it fails to parse 0 from "0x" in base 16 */
+    if (check_zero && ep == nptr && libc_errno == 0) {
+        char *tmp;
+
+        errno = 0;
+        if (strtol(nptr, &tmp, 10) == 0 && errno == 0 &&
+            (*tmp == 'x' || *tmp == 'X')) {
+            ep = tmp;
+        }
+    }
+
     if (endptr) {
         *endptr = ep;
     }
@@ -465,7 +478,7 @@ int qemu_strtoi(const char *nptr, const char **endptr, int base,
     } else {
         *result = lresult;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, lresult == 0, errno);
 }
 
 /**
@@ -524,7 +537,7 @@ int qemu_strtoui(const char *nptr, const char **endptr, int base,
             *result = lresult;
         }
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, lresult == 0, errno);
 }
 
 /**
@@ -566,7 +579,7 @@ int qemu_strtol(const char *nptr, const char **endptr, int base,
 
     errno = 0;
     *result = strtol(nptr, &ep, base);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -613,7 +626,7 @@ int qemu_strtoul(const char *nptr, const char **endptr, int base,
     if (errno == ERANGE) {
         *result = -1;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -639,7 +652,7 @@ int qemu_strtoi64(const char *nptr, const char **endptr, int base,
     QEMU_BUILD_BUG_ON(sizeof(int64_t) != sizeof(long long));
     errno = 0;
     *result = strtoll(nptr, &ep, base);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -668,7 +681,7 @@ int qemu_strtou64(const char *nptr, const char **endptr, int base,
     if (errno == ERANGE) {
         *result = -1;
     }
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, *result == 0, errno);
 }
 
 /**
@@ -708,7 +721,7 @@ int qemu_strtod(const char *nptr, const char **endptr, double *result)
 
     errno = 0;
     *result = strtod(nptr, &ep);
-    return check_strtox_error(nptr, ep, endptr, errno);
+    return check_strtox_error(nptr, ep, endptr, false, errno);
 }
 
 /**
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 15/22] gitlab: extend timeouts for CFI builds
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (13 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 14/22] utils: Work around mingw strto*l bug with 0x Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 16/22] qdev: define list of archs with virtio-pci or virtio-ccw Alex Bennée
                   ` (8 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Thomas Huth, qemu-devel, Wainer dos Santos Moschetta,
	Philippe Mathieu-Daudé,
	Willian Rampazzo, Alex Bennée

These builds are running very close to the default build limit and as
they are already pared down the only other option is to extend the
timeout a little to give some breathing room.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210323165308.15244-16-alex.bennee@linaro.org>

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index f746d5fbea..9ffbaa7ffb 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -502,6 +502,7 @@ build-cfi-aarch64:
       --enable-safe-stack --enable-slirp=git
     TARGETS: aarch64-softmmu
     MAKE_CHECK_ARGS: check-build
+  timeout: 70m
   artifacts:
     expire_in: 2 days
     paths:
@@ -538,6 +539,7 @@ build-cfi-ppc64-s390x:
       --enable-safe-stack --enable-slirp=git
     TARGETS: ppc64-softmmu s390x-softmmu
     MAKE_CHECK_ARGS: check-build
+  timeout: 70m
   artifacts:
     expire_in: 2 days
     paths:
@@ -574,6 +576,7 @@ build-cfi-x86_64:
       --enable-safe-stack --enable-slirp=git
     TARGETS: x86_64-softmmu
     MAKE_CHECK_ARGS: check-build
+  timeout: 70m
   artifacts:
     expire_in: 2 days
     paths:
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 16/22] qdev: define list of archs with virtio-pci or virtio-ccw
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (14 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 15/22] gitlab: extend timeouts for CFI builds Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 17/22] m68k: add the virtio devices aliases Alex Bennée
                   ` (7 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Daniel P. Berrangé,
	Eduardo Habkost, Cornelia Huck, qemu-devel, Laurent Vivier,
	Paolo Bonzini, Alex Bennée

From: Laurent Vivier <laurent@vivier.eu>

This is used to define virtio-*-pci and virtio-*-ccw aliases
rather than substracting the CCW architecture from all the others.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20210319202335.2397060-2-laurent@vivier.eu>
Message-Id: <20210323165308.15244-17-alex.bennee@linaro.org>

diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
index 54f069d491..0c90706516 100644
--- a/include/sysemu/arch_init.h
+++ b/include/sysemu/arch_init.h
@@ -35,4 +35,12 @@ extern const uint32_t arch_type;
 int kvm_available(void);
 int xen_available(void);
 
+/* default virtio transport per architecture */
+#define QEMU_ARCH_VIRTIO_PCI (QEMU_ARCH_ALPHA | QEMU_ARCH_ARM | \
+                              QEMU_ARCH_HPPA | QEMU_ARCH_I386 | \
+                              QEMU_ARCH_MIPS | QEMU_ARCH_PPC |  \
+                              QEMU_ARCH_RISCV | QEMU_ARCH_SH4 | \
+                              QEMU_ARCH_SPARC | QEMU_ARCH_XTENSA)
+#define QEMU_ARCH_VIRTIO_CCW (QEMU_ARCH_S390X)
+
 #endif
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 8dc656becc..0b40c97c6e 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
@@ -60,34 +60,31 @@ static const QDevAlias qdev_alias_table[] = {
     { "ES1370", "es1370" }, /* -soundhw name */
     { "ich9-ahci", "ahci" },
     { "lsi53c895a", "lsi" },
-    { "virtio-9p-ccw", "virtio-9p", QEMU_ARCH_S390X },
-    { "virtio-9p-pci", "virtio-9p", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-balloon-ccw", "virtio-balloon", QEMU_ARCH_S390X },
-    { "virtio-balloon-pci", "virtio-balloon",
-            QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-blk-ccw", "virtio-blk", QEMU_ARCH_S390X },
-    { "virtio-blk-pci", "virtio-blk", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-gpu-ccw", "virtio-gpu", QEMU_ARCH_S390X },
-    { "virtio-gpu-pci", "virtio-gpu", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-input-host-ccw", "virtio-input-host", QEMU_ARCH_S390X },
-    { "virtio-input-host-pci", "virtio-input-host",
-            QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-iommu-pci", "virtio-iommu", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-keyboard-ccw", "virtio-keyboard", QEMU_ARCH_S390X },
-    { "virtio-keyboard-pci", "virtio-keyboard",
-            QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-mouse-ccw", "virtio-mouse", QEMU_ARCH_S390X },
-    { "virtio-mouse-pci", "virtio-mouse", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-net-ccw", "virtio-net", QEMU_ARCH_S390X },
-    { "virtio-net-pci", "virtio-net", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-rng-ccw", "virtio-rng", QEMU_ARCH_S390X },
-    { "virtio-rng-pci", "virtio-rng", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-scsi-ccw", "virtio-scsi", QEMU_ARCH_S390X },
-    { "virtio-scsi-pci", "virtio-scsi", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-serial-ccw", "virtio-serial", QEMU_ARCH_S390X },
-    { "virtio-serial-pci", "virtio-serial", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
-    { "virtio-tablet-ccw", "virtio-tablet", QEMU_ARCH_S390X },
-    { "virtio-tablet-pci", "virtio-tablet", QEMU_ARCH_ALL & ~QEMU_ARCH_S390X },
+    { "virtio-9p-ccw", "virtio-9p", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-9p-pci", "virtio-9p", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-balloon-ccw", "virtio-balloon", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-balloon-pci", "virtio-balloon", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-blk-ccw", "virtio-blk", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-blk-pci", "virtio-blk", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-gpu-ccw", "virtio-gpu", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-gpu-pci", "virtio-gpu", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-input-host-ccw", "virtio-input-host", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-input-host-pci", "virtio-input-host", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-iommu-pci", "virtio-iommu", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-keyboard-ccw", "virtio-keyboard", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-keyboard-pci", "virtio-keyboard", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-mouse-ccw", "virtio-mouse", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-mouse-pci", "virtio-mouse", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-net-ccw", "virtio-net", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-net-pci", "virtio-net", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-rng-ccw", "virtio-rng", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-rng-pci", "virtio-rng", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-scsi-ccw", "virtio-scsi", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-scsi-pci", "virtio-scsi", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-serial-ccw", "virtio-serial", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-serial-pci", "virtio-serial", QEMU_ARCH_VIRTIO_PCI},
+    { "virtio-tablet-ccw", "virtio-tablet", QEMU_ARCH_VIRTIO_CCW },
+    { "virtio-tablet-pci", "virtio-tablet", QEMU_ARCH_VIRTIO_PCI },
     { }
 };
 
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 17/22] m68k: add the virtio devices aliases
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (15 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 16/22] qdev: define list of archs with virtio-pci or virtio-ccw Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 18/22] blockdev: with -drive if=virtio, use generic virtio-blk Alex Bennée
                   ` (6 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Daniel P. Berrangé,
	Eduardo Habkost, Cornelia Huck, Philippe Mathieu-Daudé,
	qemu-devel, Paolo Bonzini, Alex Bennée, Laurent Vivier

From: Laurent Vivier <laurent@vivier.eu>

Similarly to 5f629d943cb0 ("s390x: fix s390 virtio aliases"),
define the virtio aliases.

This allows to start machines with virtio devices without
knowledge of the implementation type.

For instance, we can use "-device virtio-scsi" on
m68k, s390x or PC, and the device will be respectively
"virtio-scsi-device", "virtio-scsi-ccw" or "virtio-scsi-pci".

This already exists for s390x and -ccw interfaces, add them
for m68k and MMIO (-device) interfaces.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20210319202335.2397060-3-laurent@vivier.eu>
Message-Id: <20210323165308.15244-18-alex.bennee@linaro.org>

diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h
index 0c90706516..16da279696 100644
--- a/include/sysemu/arch_init.h
+++ b/include/sysemu/arch_init.h
@@ -42,5 +42,6 @@ int xen_available(void);
                               QEMU_ARCH_RISCV | QEMU_ARCH_SH4 | \
                               QEMU_ARCH_SPARC | QEMU_ARCH_XTENSA)
 #define QEMU_ARCH_VIRTIO_CCW (QEMU_ARCH_S390X)
+#define QEMU_ARCH_VIRTIO_MMIO (QEMU_ARCH_M68K)
 
 #endif
diff --git a/softmmu/qdev-monitor.c b/softmmu/qdev-monitor.c
index 0b40c97c6e..a9955b97a0 100644
--- a/softmmu/qdev-monitor.c
+++ b/softmmu/qdev-monitor.c
@@ -60,29 +60,41 @@ static const QDevAlias qdev_alias_table[] = {
     { "ES1370", "es1370" }, /* -soundhw name */
     { "ich9-ahci", "ahci" },
     { "lsi53c895a", "lsi" },
+    { "virtio-9p-device", "virtio-9p", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-9p-ccw", "virtio-9p", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-9p-pci", "virtio-9p", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-balloon-device", "virtio-balloon", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-balloon-ccw", "virtio-balloon", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-balloon-pci", "virtio-balloon", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-blk-device", "virtio-blk", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-blk-ccw", "virtio-blk", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-blk-pci", "virtio-blk", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-gpu-device", "virtio-gpu", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-gpu-ccw", "virtio-gpu", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-gpu-pci", "virtio-gpu", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-input-host-device", "virtio-input-host", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-input-host-ccw", "virtio-input-host", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-input-host-pci", "virtio-input-host", QEMU_ARCH_VIRTIO_PCI },
     { "virtio-iommu-pci", "virtio-iommu", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-keyboard-device", "virtio-keyboard", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-keyboard-ccw", "virtio-keyboard", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-keyboard-pci", "virtio-keyboard", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-mouse-device", "virtio-mouse", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-mouse-ccw", "virtio-mouse", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-mouse-pci", "virtio-mouse", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-net-device", "virtio-net", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-net-ccw", "virtio-net", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-net-pci", "virtio-net", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-rng-device", "virtio-rng", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-rng-ccw", "virtio-rng", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-rng-pci", "virtio-rng", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-scsi-device", "virtio-scsi", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-scsi-ccw", "virtio-scsi", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-scsi-pci", "virtio-scsi", QEMU_ARCH_VIRTIO_PCI },
+    { "virtio-serial-device", "virtio-serial", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-serial-ccw", "virtio-serial", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-serial-pci", "virtio-serial", QEMU_ARCH_VIRTIO_PCI},
+    { "virtio-tablet-device", "virtio-tablet", QEMU_ARCH_VIRTIO_MMIO },
     { "virtio-tablet-ccw", "virtio-tablet", QEMU_ARCH_VIRTIO_CCW },
     { "virtio-tablet-pci", "virtio-tablet", QEMU_ARCH_VIRTIO_PCI },
     { }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 18/22] blockdev: with -drive if=virtio, use generic virtio-blk
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (16 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 17/22] m68k: add the virtio devices aliases Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 19/22] iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182" Alex Bennée
                   ` (5 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Kevin Wolf, open list:Block layer core, Alex Bennée,
	qemu-devel, Markus Armbruster, Max Reitz,
	Philippe Mathieu-Daudé,
	Laurent Vivier

From: Laurent Vivier <laurent@vivier.eu>

Rather than checking if the machine is an s390x to use virtio-blk-ccw
instead of virtio-blk-pci, use the alias virtio-blk that is set to
the expected target.

This also enables the use of virtio-blk-device for targets without
PCI or CCW.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20210319202335.2397060-4-laurent@vivier.eu>
Message-Id: <20210323165308.15244-19-alex.bennee@linaro.org>

diff --git a/blockdev.c b/blockdev.c
index 621cc3b7c4..a57590aae4 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -962,11 +962,7 @@ DriveInfo *drive_new(QemuOpts *all_opts, BlockInterfaceType block_default_type,
         QemuOpts *devopts;
         devopts = qemu_opts_create(qemu_find_opts("device"), NULL, 0,
                                    &error_abort);
-        if (arch_type == QEMU_ARCH_S390X) {
-            qemu_opt_set(devopts, "driver", "virtio-blk-ccw", &error_abort);
-        } else {
-            qemu_opt_set(devopts, "driver", "virtio-blk-pci", &error_abort);
-        }
+        qemu_opt_set(devopts, "driver", "virtio-blk", &error_abort);
         qemu_opt_set(devopts, "drive", qdict_get_str(bs_opts, "id"),
                      &error_abort);
     }
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 19/22] iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (17 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 18/22] blockdev: with -drive if=virtio, use generic virtio-blk Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 20/22] iotests: test m68k with the virt machine Alex Bennée
                   ` (4 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Kevin Wolf, Thomas Huth, open list:Block layer core,
	Alex Bennée, Cornelia Huck, qemu-devel, Laurent Vivier,
	open list:S390 general arch...,
	Max Reitz, Philippe Mathieu-Daudé

From: Laurent Vivier <laurent@vivier.eu>

Commit f1d5516ab583 introduces a test in some iotests to check if
the machine is a s390-ccw-virtio and to select virtio-*-ccw rather
than virtio-*-pci.

We don't need that because QEMU already provides aliases to use the correct
virtio interface according to the machine type.

This patch removes all virtio-*-pci and virtio-*-ccw to use virtio-*
instead and remove get_virtio_scsi_device().
This also enables virtio-mmio devices (virtio-*-device)

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20210319202335.2397060-5-laurent@vivier.eu>
Message-Id: <20210323165308.15244-20-alex.bennee@linaro.org>

diff --git a/tests/qemu-iotests/040 b/tests/qemu-iotests/040
index 336ff7c4f2..ba7cb34ce8 100755
--- a/tests/qemu-iotests/040
+++ b/tests/qemu-iotests/040
@@ -89,7 +89,7 @@ class TestSingleDrive(ImageCommitTestCase):
         qemu_io('-f', 'raw', '-c', 'write -P 0xab 0 524288', backing_img)
         qemu_io('-f', iotests.imgfmt, '-c', 'write -P 0xef 524288 524288', mid_img)
         self.vm = iotests.VM().add_drive(test_img, "node-name=top,backing.node-name=mid,backing.backing.node-name=base", interface="none")
-        self.vm.add_device(iotests.get_virtio_scsi_device())
+        self.vm.add_device('virtio-scsi')
         self.vm.add_device("scsi-hd,id=scsi0,drive=drive0")
         self.vm.launch()
         self.has_quit = False
diff --git a/tests/qemu-iotests/051 b/tests/qemu-iotests/051
index f92161d8ef..333cc81818 100755
--- a/tests/qemu-iotests/051
+++ b/tests/qemu-iotests/051
@@ -119,17 +119,7 @@ echo
 echo === Device without drive ===
 echo
 
-case "$QEMU_DEFAULT_MACHINE" in
-  s390-ccw-virtio)
-      virtio_scsi=virtio-scsi-ccw
-      ;;
-  *)
-      virtio_scsi=virtio-scsi-pci
-      ;;
-esac
-
-run_qemu -device $virtio_scsi -device scsi-hd |
-    sed -e "s/$virtio_scsi/VIRTIO_SCSI/"
+run_qemu -device virtio-scsi -device scsi-hd
 
 echo
 echo === Overriding backing file ===
diff --git a/tests/qemu-iotests/051.out b/tests/qemu-iotests/051.out
index de4771bcb3..437053c839 100644
--- a/tests/qemu-iotests/051.out
+++ b/tests/qemu-iotests/051.out
@@ -72,7 +72,7 @@ QEMU_PROG: -drive file=TEST_DIR/t.qcow2,node-name=foo#12: Invalid node name
 
 === Device without drive ===
 
-Testing: -device VIRTIO_SCSI -device scsi-hd
+Testing: -device virtio-scsi -device scsi-hd
 QEMU X.Y.Z monitor - type 'help' for more information
 (qemu) QEMU_PROG: -device scsi-hd: drive property not set
 
diff --git a/tests/qemu-iotests/051.pc.out b/tests/qemu-iotests/051.pc.out
index a28e3fc124..e95bd42b8d 100644
--- a/tests/qemu-iotests/051.pc.out
+++ b/tests/qemu-iotests/051.pc.out
@@ -72,7 +72,7 @@ QEMU_PROG: -drive file=TEST_DIR/t.qcow2,node-name=foo#12: Invalid node-name: 'fo
 
 === Device without drive ===
 
-Testing: -device VIRTIO_SCSI -device scsi-hd
+Testing: -device virtio-scsi -device scsi-hd
 QEMU X.Y.Z monitor - type 'help' for more information
 (qemu) QEMU_PROG: -device scsi-hd: drive property not set
 
diff --git a/tests/qemu-iotests/068 b/tests/qemu-iotests/068
index 03e03508a6..54e49c8ffa 100755
--- a/tests/qemu-iotests/068
+++ b/tests/qemu-iotests/068
@@ -49,11 +49,9 @@ IMG_SIZE=128K
 case "$QEMU_DEFAULT_MACHINE" in
   s390-ccw-virtio)
       platform_parm="-no-shutdown"
-      hba=virtio-scsi-ccw
       ;;
   *)
       platform_parm=""
-      hba=virtio-scsi-pci
       ;;
 esac
 
@@ -61,7 +59,7 @@ _qemu()
 {
     $QEMU $platform_parm -nographic -monitor stdio -serial none \
           -drive if=none,id=drive0,file="$TEST_IMG",format="$IMGFMT" \
-          -device $hba,id=hba0 \
+          -device virtio-scsi,id=hba0 \
           -device scsi-hd,drive=drive0 \
           "$@" |\
     _filter_qemu | _filter_hmp
diff --git a/tests/qemu-iotests/093 b/tests/qemu-iotests/093
index 7745cb04b6..93274dc8cb 100755
--- a/tests/qemu-iotests/093
+++ b/tests/qemu-iotests/093
@@ -371,8 +371,7 @@ class ThrottleTestGroupNames(iotests.QMPTestCase):
 class ThrottleTestRemovableMedia(iotests.QMPTestCase):
     def setUp(self):
         self.vm = iotests.VM()
-        self.vm.add_device("{},id=virtio-scsi".format(
-            iotests.get_virtio_scsi_device()))
+        self.vm.add_device("{},id=virtio-scsi".format('virtio-scsi'))
         self.vm.launch()
 
     def tearDown(self):
diff --git a/tests/qemu-iotests/139 b/tests/qemu-iotests/139
index e79b3c21fd..178b1ee230 100755
--- a/tests/qemu-iotests/139
+++ b/tests/qemu-iotests/139
@@ -26,18 +26,13 @@ import time
 
 base_img = os.path.join(iotests.test_dir, 'base.img')
 new_img = os.path.join(iotests.test_dir, 'new.img')
-if iotests.qemu_default_machine == 's390-ccw-virtio':
-    default_virtio_blk = 'virtio-blk-ccw'
-else:
-    default_virtio_blk = 'virtio-blk-pci'
 
 class TestBlockdevDel(iotests.QMPTestCase):
 
     def setUp(self):
         iotests.qemu_img('create', '-f', iotests.imgfmt, base_img, '1M')
         self.vm = iotests.VM()
-        self.vm.add_device("{},id=virtio-scsi".format(
-            iotests.get_virtio_scsi_device()))
+        self.vm.add_device("{},id=virtio-scsi".format('virtio-scsi'))
         self.vm.launch()
 
     def tearDown(self):
@@ -93,7 +88,7 @@ class TestBlockdevDel(iotests.QMPTestCase):
         self.checkBlockDriverState(node, expect_error)
 
     # Add a device model
-    def addDeviceModel(self, device, backend, driver = default_virtio_blk):
+    def addDeviceModel(self, device, backend, driver = 'virtio-blk'):
         result = self.vm.qmp('device_add', id = device,
                              driver = driver, drive = backend)
         self.assert_qmp(result, 'return', {})
diff --git a/tests/qemu-iotests/182 b/tests/qemu-iotests/182
index 55a0384c08..fcd1d796eb 100755
--- a/tests/qemu-iotests/182
+++ b/tests/qemu-iotests/182
@@ -46,26 +46,17 @@ _supported_proto file
 
 size=32M
 
-case "$QEMU_DEFAULT_MACHINE" in
-  s390-ccw-virtio)
-      virtioblk=virtio-blk-ccw
-      ;;
-  *)
-      virtioblk=virtio-blk-pci
-      ;;
-esac
-
 _make_test_img $size
 
 echo "Starting QEMU"
 _launch_qemu -drive file=$TEST_IMG,if=none,id=drive0,file.locking=on \
-    -device $virtioblk,drive=drive0
+    -device virtio-blk,drive=drive0
 
 echo
 echo "Starting a second QEMU using the same image should fail"
 echo 'quit' | $QEMU -nographic -monitor stdio \
     -drive file=$TEST_IMG,if=none,id=drive0,file.locking=on \
-    -device $virtioblk,drive=drive0 2>&1 | _filter_testdir 2>&1 |
+    -device virtio-blk,drive=drive0 2>&1 | _filter_testdir 2>&1 |
     _filter_qemu |
     sed -e '/falling back to POSIX file/d' \
         -e '/locks can be lost unexpectedly/d'
diff --git a/tests/qemu-iotests/238 b/tests/qemu-iotests/238
index 8a10af57f1..38bd3744e6 100755
--- a/tests/qemu-iotests/238
+++ b/tests/qemu-iotests/238
@@ -26,14 +26,12 @@ from iotests import log
 
 iotests.script_initialize()
 
-virtio_scsi_device = iotests.get_virtio_scsi_device()
-
 vm = iotests.VM()
 vm.launch()
 
 log(vm.qmp('blockdev-add', node_name='hd0', driver='null-co', read_zeroes=True))
 log(vm.qmp('object-add', qom_type='iothread', id='iothread0'))
-log(vm.qmp('device_add', id='scsi0', driver=virtio_scsi_device, iothread='iothread0'))
+log(vm.qmp('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0'))
 log(vm.qmp('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0'))
 log(vm.qmp('block_set_io_throttle', id='scsi-hd0', bps=0, bps_rd=0, bps_wr=0,
            iops=1000, iops_rd=0, iops_wr=0, conv_keys=False))
diff --git a/tests/qemu-iotests/240 b/tests/qemu-iotests/240
index ab077f4ceb..9b281e1dc0 100755
--- a/tests/qemu-iotests/240
+++ b/tests/qemu-iotests/240
@@ -42,7 +42,7 @@ class TestCase(iotests.QMPTestCase):
         iotests.log('==Unplug a SCSI disk and then plug it again==')
         self.vm.qmp_log('blockdev-add', driver='null-co', read_zeroes=True, node_name='hd0')
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread0")
-        self.vm.qmp_log('device_add', id='scsi0', driver=iotests.get_virtio_scsi_device(), iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
         self.vm.qmp_log('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0')
         self.vm.qmp_log('device_del', id='scsi-hd0')
         self.vm.event_wait('DEVICE_DELETED')
@@ -55,7 +55,7 @@ class TestCase(iotests.QMPTestCase):
         iotests.log('==Attach two SCSI disks using the same block device and the same iothread==')
         self.vm.qmp_log('blockdev-add', driver='null-co', read_zeroes=True, node_name='hd0', read_only=True)
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread0")
-        self.vm.qmp_log('device_add', id='scsi0', driver=iotests.get_virtio_scsi_device(), iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
 
         self.vm.qmp_log('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0')
         self.vm.qmp_log('device_add', id='scsi-hd1', driver='scsi-hd', drive='hd0')
@@ -73,8 +73,8 @@ class TestCase(iotests.QMPTestCase):
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread0")
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread1")
 
-        self.vm.qmp_log('device_add', id='scsi0', driver=iotests.get_virtio_scsi_device(), iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
-        self.vm.qmp_log('device_add', id='scsi1', driver=iotests.get_virtio_scsi_device(), iothread='iothread1', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi1', driver='virtio-scsi', iothread='iothread1', filters=[iotests.filter_qmp_virtio_scsi])
 
         self.vm.qmp_log('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0', bus="scsi0.0")
         self.vm.qmp_log('device_add', id='scsi-hd1', driver='scsi-hd', drive='hd0', bus="scsi1.0")
@@ -99,7 +99,7 @@ class TestCase(iotests.QMPTestCase):
         self.vm.qmp_log('nbd-server-add', device='hd0')
 
         self.vm.qmp_log('object-add', qom_type='iothread', id="iothread0")
-        self.vm.qmp_log('device_add', id='scsi0', driver=iotests.get_virtio_scsi_device(), iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
+        self.vm.qmp_log('device_add', id='scsi0', driver='virtio-scsi', iothread='iothread0', filters=[iotests.filter_qmp_virtio_scsi])
         self.vm.qmp_log('device_add', id='scsi-hd0', driver='scsi-hd', drive='hd0')
 
 if __name__ == '__main__':
diff --git a/tests/qemu-iotests/257 b/tests/qemu-iotests/257
index 7cd2520829..c72c82a171 100755
--- a/tests/qemu-iotests/257
+++ b/tests/qemu-iotests/257
@@ -292,7 +292,7 @@ def test_bitmap_sync(bsync_mode, msync_mode='bitmap', failure=None):
         log('--- Preparing image & VM ---\n')
         drive0 = Drive(img_path, vm=vm)
         drive0.img_create(iotests.imgfmt, SIZE)
-        vm.add_device("{},id=scsi0".format(iotests.get_virtio_scsi_device()))
+        vm.add_device("{},id=scsi0".format('virtio-scsi'))
         vm.launch()
 
         file_config = {
@@ -449,7 +449,7 @@ def test_backup_api():
         log('--- Preparing image & VM ---\n')
         drive0 = Drive(img_path, vm=vm)
         drive0.img_create(iotests.imgfmt, SIZE)
-        vm.add_device("{},id=scsi0".format(iotests.get_virtio_scsi_device()))
+        vm.add_device("{},id=scsi0".format('virtio-scsi'))
         vm.launch()
 
         file_config = {
diff --git a/tests/qemu-iotests/307 b/tests/qemu-iotests/307
index 9008974346..c7685347bc 100755
--- a/tests/qemu-iotests/307
+++ b/tests/qemu-iotests/307
@@ -40,13 +40,11 @@ with iotests.FilePath('image') as img, \
 
     iotests.log('=== Launch VM ===')
 
-    virtio_scsi_device = iotests.get_virtio_scsi_device()
-
     vm.add_object('iothread,id=iothread0')
     vm.add_blockdev(f'file,filename={img},node-name=file')
     vm.add_blockdev(f'{iotests.imgfmt},file=file,node-name=fmt')
     vm.add_blockdev('raw,file=file,node-name=ro,read-only=on')
-    vm.add_device(f'id=scsi0,driver={virtio_scsi_device},iothread=iothread0')
+    vm.add_device(f'id=scsi0,driver=virtio-scsi,iothread=iothread0')
     vm.launch()
 
     vm.qmp_log('nbd-server-start',
diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
index 90d0b62523..1e9e6a066e 100644
--- a/tests/qemu-iotests/iotests.py
+++ b/tests/qemu-iotests/iotests.py
@@ -234,11 +234,6 @@ def qemu_io_silent_check(*args):
                                stderr=subprocess.STDOUT)
     return exitcode == 0
 
-def get_virtio_scsi_device():
-    if qemu_default_machine == 's390-ccw-virtio':
-        return 'virtio-scsi-ccw'
-    return 'virtio-scsi-pci'
-
 class QemuIoInteractive:
     def __init__(self, *args):
         self.args = qemu_io_args_no_fmt + list(args)
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 20/22] iotests: test m68k with the virt machine
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (18 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 19/22] iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182" Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 21/22] iotests: iothreads need ioeventfd Alex Bennée
                   ` (3 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Kevin Wolf, open list:Block layer core, Cornelia Huck,
	Philippe Mathieu-Daudé,
	qemu-devel, Max Reitz, Alex Bennée, Laurent Vivier

From: Laurent Vivier <laurent@vivier.eu>

This allows to cover the virtio tests with a 32bit big-endian
virtio-mmio machine.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20210319202335.2397060-6-laurent@vivier.eu>
Message-Id: <20210323165308.15244-21-alex.bennee@linaro.org>

diff --git a/tests/qemu-iotests/testenv.py b/tests/qemu-iotests/testenv.py
index 1fbec854c1..6d27712617 100644
--- a/tests/qemu-iotests/testenv.py
+++ b/tests/qemu-iotests/testenv.py
@@ -208,6 +208,7 @@ def __init__(self, imgfmt: str, imgproto: str, aiomode: str,
             ('arm', 'virt'),
             ('aarch64', 'virt'),
             ('avr', 'mega2560'),
+            ('m68k', 'virt'),
             ('rx', 'gdbsim-r5f562n8'),
             ('tricore', 'tricore_testboard')
         )
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 21/22] iotests: iothreads need ioeventfd
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (19 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 20/22] iotests: test m68k with the virt machine Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:30 ` [PULL 22/22] gitlab: default to not building the documentation Alex Bennée
                   ` (2 subsequent siblings)
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Kevin Wolf, Thomas Huth, open list:Block layer core, qemu-devel,
	Max Reitz, Alex Bennée, Laurent Vivier

From: Laurent Vivier <laurent@vivier.eu>

And ioeventfd are only available with virtio-scsi-pci or virtio-scsi-ccw,
use the alias but add a rule to require virtio-scsi-pci or virtio-scsi-ccw
for the tests that use iothreads.

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210319202335.2397060-7-laurent@vivier.eu>
Message-Id: <20210323165308.15244-22-alex.bennee@linaro.org>

diff --git a/tests/qemu-iotests/127 b/tests/qemu-iotests/127
index 98e8e82a82..32edc3b068 100755
--- a/tests/qemu-iotests/127
+++ b/tests/qemu-iotests/127
@@ -44,7 +44,8 @@ trap "_cleanup; exit \$status" 0 1 2 3 15
 _supported_fmt qcow2
 _supported_proto file fuse
 
-_require_devices virtio-scsi scsi-hd
+_require_devices scsi-hd
+_require_one_device_of virtio-scsi-pci virtio-scsi-ccw
 
 IMG_SIZE=64K
 
diff --git a/tests/qemu-iotests/256 b/tests/qemu-iotests/256
index 8d82a1dd86..13666813bd 100755
--- a/tests/qemu-iotests/256
+++ b/tests/qemu-iotests/256
@@ -24,6 +24,8 @@ import os
 import iotests
 from iotests import log
 
+iotests._verify_virtio_scsi_pci_or_ccw()
+
 iotests.script_initialize(supported_fmts=['qcow2'])
 size = 64 * 1024 * 1024
 
@@ -61,8 +63,8 @@ with iotests.FilePath('img0') as img0_path, \
     log('--- Preparing images & VM ---\n')
     vm.add_object('iothread,id=iothread0')
     vm.add_object('iothread,id=iothread1')
-    vm.add_device('virtio-scsi-pci,id=scsi0,iothread=iothread0')
-    vm.add_device('virtio-scsi-pci,id=scsi1,iothread=iothread1')
+    vm.add_device('virtio-scsi,id=scsi0,iothread=iothread0')
+    vm.add_device('virtio-scsi,id=scsi1,iothread=iothread1')
     iotests.qemu_img_create('-f', iotests.imgfmt, img0_path, str(size))
     iotests.qemu_img_create('-f', iotests.imgfmt, img1_path, str(size))
     vm.add_drive(img0_path, interface='none')
diff --git a/tests/qemu-iotests/common.rc b/tests/qemu-iotests/common.rc
index 65cdba5723..7f49c9716d 100644
--- a/tests/qemu-iotests/common.rc
+++ b/tests/qemu-iotests/common.rc
@@ -977,5 +977,18 @@ _require_devices()
     done
 }
 
+_require_one_device_of()
+{
+    available=$($QEMU -M none -device help | \
+                grep ^name | sed -e 's/^name "//' -e 's/".*$//')
+    for device
+    do
+        if echo "$available" | grep -q "$device" ; then
+            return
+        fi
+    done
+    _notrun "$* not available"
+}
+
 # make sure this script returns success
 true
diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
index 1e9e6a066e..5af0182895 100644
--- a/tests/qemu-iotests/iotests.py
+++ b/tests/qemu-iotests/iotests.py
@@ -1146,6 +1146,11 @@ def _verify_virtio_blk() -> None:
     if 'virtio-blk' not in out:
         notrun('Missing virtio-blk in QEMU binary')
 
+def _verify_virtio_scsi_pci_or_ccw() -> None:
+    out = qemu_pipe('-M', 'none', '-device', 'help')
+    if 'virtio-scsi-pci' not in out and 'virtio-scsi-ccw' not in out:
+        notrun('Missing virtio-scsi-pci or virtio-scsi-ccw in QEMU binary')
+
 
 def supports_quorum():
     return 'quorum' in qemu_img_pipe('--help')
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* [PULL 22/22] gitlab: default to not building the documentation
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (20 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 21/22] iotests: iothreads need ioeventfd Alex Bennée
@ 2021-03-24 14:30 ` Alex Bennée
  2021-03-24 14:57 ` [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) no-reply
  2021-03-24 17:41 ` Peter Maydell
  23 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-24 14:30 UTC (permalink / raw)
  To: peter.maydell
  Cc: Thomas Huth, qemu-devel, Wainer dos Santos Moschetta,
	Philippe Mathieu-Daudé,
	Willian Rampazzo, Alex Bennée

In d0f26e68a0 ("gitlab: force enable docs build in Fedora, Ubuntu,
Debian") we made sure we can build the documents on more than one
system. However we don't want to build documents all the time as it's
a waste of cycles (and energy). So lets reduce the total amount of
documentation we build while still keeping coverage of at least one
build on each supported target.

Fixes: a8a3abe0b3 ("gitlab: move docs and tools build across from Travis")
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Willian Rampazzo <willianr@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20210323165308.15244-23-alex.bennee@linaro.org>

diff --git a/.gitlab-ci.d/crossbuilds.yml b/.gitlab-ci.d/crossbuilds.yml
index d5098c986b..2d95784ed5 100644
--- a/.gitlab-ci.d/crossbuilds.yml
+++ b/.gitlab-ci.d/crossbuilds.yml
@@ -6,10 +6,10 @@
     - mkdir build
     - cd build
     - PKG_CONFIG_PATH=$PKG_CONFIG_PATH
-      ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-user
-        --target-list-exclude="arm-softmmu cris-softmmu i386-softmmu
-          microblaze-softmmu mips-softmmu mipsel-softmmu mips64-softmmu
-          ppc-softmmu sh4-softmmu xtensa-softmmu"
+      ../configure --enable-werror --disable-docs $QEMU_CONFIGURE_OPTS
+        --disable-user --target-list-exclude="arm-softmmu cris-softmmu
+          i386-softmmu microblaze-softmmu mips-softmmu mipsel-softmmu
+          mips64-softmmu ppc-softmmu sh4-softmmu xtensa-softmmu"
     - make -j$(expr $(nproc) + 1) all check-build $MAKE_CHECK_ARGS
 
 # Job to cross-build specific accelerators.
@@ -25,8 +25,8 @@
     - mkdir build
     - cd build
     - PKG_CONFIG_PATH=$PKG_CONFIG_PATH
-      ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-tools
-        --enable-${ACCEL:-kvm} $ACCEL_CONFIGURE_OPTS
+      ../configure --enable-werror --disable-docs $QEMU_CONFIGURE_OPTS
+        --disable-tools --enable-${ACCEL:-kvm} $ACCEL_CONFIGURE_OPTS
     - make -j$(expr $(nproc) + 1) all check-build
 
 .cross_user_build_job:
@@ -36,7 +36,8 @@
     - mkdir build
     - cd build
     - PKG_CONFIG_PATH=$PKG_CONFIG_PATH
-      ../configure --enable-werror $QEMU_CONFIGURE_OPTS --disable-system
+      ../configure --enable-werror --disable-docs $QEMU_CONFIGURE_OPTS
+        --disable-system
     - make -j$(expr $(nproc) + 1) all check-build $MAKE_CHECK_ARGS
 
 cross-armel-system:
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 9ffbaa7ffb..3480d79db3 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -23,9 +23,9 @@ include:
     - cd build
     - if test -n "$TARGETS";
       then
-        ../configure --enable-werror $CONFIGURE_ARGS --target-list="$TARGETS" ;
+        ../configure --enable-werror --disable-docs $CONFIGURE_ARGS --target-list="$TARGETS" ;
       else
-        ../configure --enable-werror $CONFIGURE_ARGS ;
+        ../configure --enable-werror --disable-docs $CONFIGURE_ARGS ;
       fi || { cat config.log meson-logs/meson-log.txt && exit 1; }
     - if test -n "$LD_JOBS";
       then
@@ -119,7 +119,7 @@ build-system-ubuntu:
     job: amd64-ubuntu2004-container
   variables:
     IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-fdt=system --enable-slirp=system
+    CONFIGURE_ARGS: --enable-docs --enable-fdt=system --enable-slirp=system
     TARGETS: aarch64-softmmu alpha-softmmu cris-softmmu hppa-softmmu
       moxie-softmmu microblazeel-softmmu mips64el-softmmu
     MAKE_CHECK_ARGS: check-build
@@ -607,7 +607,7 @@ tsan-build:
     job: amd64-ubuntu2004-container
   variables:
     IMAGE: ubuntu2004
-    CONFIGURE_ARGS: --enable-tsan --cc=clang-10 --cxx=clang++-10 --disable-docs
+    CONFIGURE_ARGS: --enable-tsan --cc=clang-10 --cxx=clang++-10
           --enable-trace-backends=ust --enable-fdt=system --enable-slirp=system
     TARGETS: x86_64-softmmu ppc64-softmmu riscv64-softmmu x86_64-linux-user
     MAKE_CHECK_ARGS: bench V=1
@@ -619,7 +619,7 @@ build-deprecated:
     job: amd64-debian-user-cross-container
   variables:
     IMAGE: debian-all-test-cross
-    CONFIGURE_ARGS: --disable-docs --disable-tools
+    CONFIGURE_ARGS: --disable-tools
     MAKE_CHECK_ARGS: build-tcg
     TARGETS: ppc64abi32-linux-user lm32-softmmu unicore32-softmmu
   artifacts:
-- 
2.20.1



^ permalink raw reply related	[flat|nested] 149+ messages in thread

* Re: [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing)
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (21 preceding siblings ...)
  2021-03-24 14:30 ` [PULL 22/22] gitlab: default to not building the documentation Alex Bennée
@ 2021-03-24 14:57 ` no-reply
  2021-03-24 17:41 ` Peter Maydell
  23 siblings, 0 replies; 149+ messages in thread
From: no-reply @ 2021-03-24 14:57 UTC (permalink / raw)
  To: alex.bennee; +Cc: peter.maydell, alex.bennee, qemu-devel

Patchew URL: https://patchew.org/QEMU/20210324143021.8560-1-alex.bennee@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20210324143021.8560-1-alex.bennee@linaro.org
Subject: [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing)

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20210324143021.8560-1-alex.bennee@linaro.org -> patchew/20210324143021.8560-1-alex.bennee@linaro.org
Switched to a new branch 'test'
c0d4a2c gitlab: default to not building the documentation
64c6e36 iotests: iothreads need ioeventfd
12cee67 iotests: test m68k with the virt machine
6303dc6 iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"
865c165 blockdev: with -drive if=virtio, use generic virtio-blk
d1a3668 m68k: add the virtio devices aliases
742c635 qdev: define list of archs with virtio-pci or virtio-ccw
c2b33bc gitlab: extend timeouts for CFI builds
c760417 utils: Work around mingw strto*l bug with 0x
1860f36 utils: Tighter tests for qemu_strtosz
d3598e7 cirrus.yml: Update the FreeBSD task to version 12.2
108a222 configure: Don't use the __atomic_*_16 functions for testing 128-bit support
5fbfc81 gitlab-ci.yml: Merge the trace-backend testing into other jobs
41d8c49 tests/tcg: add HeapInfo checking to semihosting test
b8f4662 linux-user/riscv: initialise the TaskState heap/stack info
316ec74 semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO
d69fb4b semihosting/arm-compat-semi: unify GET/SET_ARG helpers
5428105 semihosting: move semihosting tests to multiarch
d1286bc tools/virtiofsd: include --socket-group in help
54d2761 docs/devel: expand style section of memory management
c5c3fbf docs/devel: include the plugin API information from the headers
f0bb0d5 scripts/kernel-doc: strip QEMU_ from function definitions

=== OUTPUT BEGIN ===
1/22 Checking commit f0bb0d54fcfa (scripts/kernel-doc: strip QEMU_ from function definitions)
2/22 Checking commit c5c3fbfdec88 (docs/devel: include the plugin API information from the headers)
3/22 Checking commit 54d2761f4aa4 (docs/devel: expand style section of memory management)
4/22 Checking commit d1286bc70171 (tools/virtiofsd: include --socket-group in help)
5/22 Checking commit 54281050f5c5 (semihosting: move semihosting tests to multiarch)
6/22 Checking commit d69fb4b75e34 (semihosting/arm-compat-semi: unify GET/SET_ARG helpers)
7/22 Checking commit 316ec74a997d (semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO)
8/22 Checking commit b8f46621be65 (linux-user/riscv: initialise the TaskState heap/stack info)
9/22 Checking commit 41d8c49f2560 (tests/tcg: add HeapInfo checking to semihosting test)
10/22 Checking commit 5fbfc8104282 (gitlab-ci.yml: Merge the trace-backend testing into other jobs)
11/22 Checking commit 108a222ebaab (configure: Don't use the __atomic_*_16 functions for testing 128-bit support)
12/22 Checking commit d3598e78b4c0 (cirrus.yml: Update the FreeBSD task to version 12.2)
13/22 Checking commit 1860f36702eb (utils: Tighter tests for qemu_strtosz)
14/22 Checking commit c760417434c6 (utils: Work around mingw strto*l bug with 0x)
ERROR: consider using qemu_strtol in preference to strtol
#146: FILE: util/cutils.c:409:
+        if (strtol(nptr, &tmp, 10) == 0 && errno == 0 &&

total: 1 errors, 0 warnings, 169 lines checked

Patch 14/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/22 Checking commit c2b33bcdb254 (gitlab: extend timeouts for CFI builds)
16/22 Checking commit 742c635cb147 (qdev: define list of archs with virtio-pci or virtio-ccw)
17/22 Checking commit d1a366845ba4 (m68k: add the virtio devices aliases)
18/22 Checking commit 865c165d1853 (blockdev: with -drive if=virtio, use generic virtio-blk)
19/22 Checking commit 6303dc6e1cba (iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182")
20/22 Checking commit 12cee67703b2 (iotests: test m68k with the virt machine)
21/22 Checking commit 64c6e363b893 (iotests: iothreads need ioeventfd)
22/22 Checking commit c0d4a2c88b42 (gitlab: default to not building the documentation)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20210324143021.8560-1-alex.bennee@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing)
  2021-03-24 14:22   ` Alex Bennée
@ 2021-03-24 15:58     ` Peter Maydell
  0 siblings, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-24 15:58 UTC (permalink / raw)
  To: Alex Bennée; +Cc: QEMU Developers

On Wed, 24 Mar 2021 at 14:23, Alex Bennée <alex.bennee@linaro.org> wrote:
>
>
> Peter Maydell <peter.maydell@linaro.org> writes:
>
> > On Tue, 23 Mar 2021 at 17:59, Alex Bennée <alex.bennee@linaro.org> wrote:
> >> I've added a testing patch to extend the CFI times, Laurent's series
> >> to fix the iotest regressions currently keeping the CI from going
> >> green and an optimisation to the --enable-docs build to try and start
> >> bringing the total CI time down a bit. rc0 is being tagged today so
> >> I'll probably roll a PR from this later in the week in time for rc1.
> >
> > That's tricky given you sent this patchseries at 6pm on the day
> > when rc1 was nominally going to be tagged :-)
>
> The wiki says:
>
>   2021-03-30    Tag rc1
>
> so I thought I had a few days.

Oops, yes, you're right, sorry. I always get confused by softfreeze
not being rc0...

-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing)
  2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
                   ` (22 preceding siblings ...)
  2021-03-24 14:57 ` [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) no-reply
@ 2021-03-24 17:41 ` Peter Maydell
  23 siblings, 0 replies; 149+ messages in thread
From: Peter Maydell @ 2021-03-24 17:41 UTC (permalink / raw)
  To: Alex Bennée; +Cc: QEMU Developers

On Wed, 24 Mar 2021 at 14:30, Alex Bennée <alex.bennee@linaro.org> wrote:
>
> The following changes since commit 01874b15d36e3f9a3506c47941a92ccf8d8bed98:
>
>   Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210323' into staging (2021-03-24 11:22:08 +0000)
>
> are available in the Git repository at:
>
>   https://github.com/stsquad/qemu.git tags/pull-6.0-rc0-fixed-240321-1
>
> for you to fetch changes up to a9eb2df27f117bbac9f370bf8cb79532005f19c2:
>
>   gitlab: default to not building the documentation (2021-03-24 14:25:48 +0000)
>
> ----------------------------------------------------------------
> Various fixes for 6.0:
>
>   - include kernel-doc API reference for plugins
>   - fix semihosting SYS_HEAPINFO
>   - various tweaks to improve CI runtime
>   - more stroz fixes
>   - fix iotest CI regressions
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/6.0
for any user-visible changes.

-- PMM


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address
  2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
                   ` (5 preceding siblings ...)
  2021-03-15 12:46 ` [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address Alex Bennée
@ 2021-03-25 11:47 ` Alex Bennée
  2021-04-30  8:54 ` Thomas Huth
  7 siblings, 0 replies; 149+ messages in thread
From: Alex Bennée @ 2021-03-25 11:47 UTC (permalink / raw)
  To: qemu-devel

This is now merged and while be available in the 6.0 release.

** Changed in: qemu
       Status: In Progress => Fix Committed

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Fix Committed

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address
  2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
                   ` (6 preceding siblings ...)
  2021-03-25 11:47 ` Alex Bennée
@ 2021-04-30  8:54 ` Thomas Huth
  7 siblings, 0 replies; 149+ messages in thread
From: Thomas Huth @ 2021-04-30  8:54 UTC (permalink / raw)
  To: qemu-devel

** Changed in: qemu
       Status: Fix Committed => Fix Released

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1915925

Title:
  ARM semihosting HEAPINFO results wrote to wrong address

Status in QEMU:
  Fix Released

Bug description:
  This affects latest development branch of QEMU.

  According to the ARM spec of the HEAPINFO semihosting call:

  https://developer.arm.com/documentation/100863/0300/Semihosting-
  operations/SYS-HEAPINFO--0x16-?lang=en

  > the PARAMETER REGISTER contains the address of a pointer to a four-
  field data block.

  However, QEMU treated the PARAMETER REGISTER as pointing to a four-
  field data block directly.

  Here is a simple program that can demonstrate this problem:
  https://github.com/iNvEr7/qemu-learn/tree/newlib-bug/semihosting-
  newlib

  This code links with newlib with semihosting mode, which will call the
  HEAPINFO SVC during crt0 routine. When running in QEMU (make run), it
  may crash the program either because of invalid write or memory
  curruption, depending on the compiled program structure.

  Also refer to my discussion with newlib folks:
  https://sourceware.org/pipermail/newlib/2021/018260.html

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1915925/+subscriptions


^ permalink raw reply	[flat|nested] 149+ messages in thread

end of thread, other threads:[~2021-04-30  9:04 UTC | newest]

Thread overview: 149+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-24 14:29 [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) Alex Bennée
2021-03-24 14:30 ` [PULL 01/22] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
2021-03-24 14:30 ` [PULL 02/22] docs/devel: include the plugin API information from the headers Alex Bennée
2021-03-24 14:30 ` [PULL 03/22] docs/devel: expand style section of memory management Alex Bennée
2021-03-24 14:30 ` [PULL 04/22] tools/virtiofsd: include --socket-group in help Alex Bennée
2021-03-24 14:30 ` [PULL 05/22] semihosting: move semihosting tests to multiarch Alex Bennée
2021-03-24 14:30 ` [PULL 06/22] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
2021-03-24 14:30 ` [PULL 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
2021-03-24 14:30   ` [Bug 1915925] " Alex Bennée
2021-03-24 14:30 ` [PULL 08/22] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
2021-03-24 14:30 ` [PULL 09/22] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
2021-03-24 14:30 ` [PULL 10/22] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
2021-03-24 14:30 ` [PULL 11/22] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
2021-03-24 14:30 ` [PULL 12/22] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
2021-03-24 14:30 ` [PULL 13/22] utils: Tighter tests for qemu_strtosz Alex Bennée
2021-03-24 14:30 ` [PULL 14/22] utils: Work around mingw strto*l bug with 0x Alex Bennée
2021-03-24 14:30 ` [PULL 15/22] gitlab: extend timeouts for CFI builds Alex Bennée
2021-03-24 14:30 ` [PULL 16/22] qdev: define list of archs with virtio-pci or virtio-ccw Alex Bennée
2021-03-24 14:30 ` [PULL 17/22] m68k: add the virtio devices aliases Alex Bennée
2021-03-24 14:30 ` [PULL 18/22] blockdev: with -drive if=virtio, use generic virtio-blk Alex Bennée
2021-03-24 14:30 ` [PULL 19/22] iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182" Alex Bennée
2021-03-24 14:30 ` [PULL 20/22] iotests: test m68k with the virt machine Alex Bennée
2021-03-24 14:30 ` [PULL 21/22] iotests: iothreads need ioeventfd Alex Bennée
2021-03-24 14:30 ` [PULL 22/22] gitlab: default to not building the documentation Alex Bennée
2021-03-24 14:57 ` [PULL for 6.0 00/22] various fixes (kernel-doc, semihosting, testing) no-reply
2021-03-24 17:41 ` Peter Maydell
  -- strict thread matches above, loose matches on Subject: below --
2021-03-23 16:52 [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR " Alex Bennée
2021-03-23 16:52 ` [PATCH v2 01/22] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
2021-03-23 16:52 ` [PATCH v2 02/22] docs/devel: include the plugin API information from the headers Alex Bennée
2021-03-23 16:52 ` [PATCH v2 03/22] docs/devel: expand style section of memory management Alex Bennée
2021-03-23 16:52 ` [PATCH v2 04/22] tools/virtiofsd: include --socket-group in help Alex Bennée
2021-03-23 16:52 ` [PATCH v2 05/22] semihosting: move semihosting tests to multiarch Alex Bennée
2021-03-23 16:52 ` [PATCH v2 06/22] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
2021-03-23 16:52 ` [PATCH v2 07/22] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
2021-03-23 16:52   ` [Bug 1915925] " Alex Bennée
2021-03-23 16:52 ` [PATCH v2 08/22] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
2021-03-23 21:29   ` Alistair Francis
2021-03-23 16:52 ` [PATCH v2 09/22] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
2021-03-24  6:11   ` Thomas Huth
2021-03-24 14:09   ` Richard Henderson
2021-03-23 16:52 ` [PATCH v2 10/22] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
2021-03-23 16:52 ` [PATCH v2 11/22] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
2021-03-23 16:52 ` [PATCH v2 12/22] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
2021-03-23 16:52 ` [PATCH v2 13/22] utils: Tighter tests for qemu_strtosz Alex Bennée
2021-03-23 16:53 ` [PATCH v2 14/22] utils: Work around mingw strto*l bug with 0x Alex Bennée
2021-03-23 16:53 ` [PATCH v2 15/22] gitlab: extend timeouts for CFI builds Alex Bennée
2021-03-23 16:53 ` [PATCH v2 16/22] qdev: define list of archs with virtio-pci or virtio-ccw Alex Bennée
2021-03-23 16:53 ` [PATCH v2 17/22] m68k: add the virtio devices aliases Alex Bennée
2021-03-23 16:53 ` [PATCH v2 18/22] blockdev: with -drive if=virtio, use generic virtio-blk Alex Bennée
2021-03-23 16:53 ` [PATCH v2 19/22] iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182" Alex Bennée
2021-03-23 16:53 ` [PATCH v2 20/22] iotests: test m68k with the virt machine Alex Bennée
2021-03-23 16:53 ` [PATCH v2 21/22] iotests: iothreads need ioeventfd Alex Bennée
2021-03-23 16:53 ` [PATCH v2 22/22] gitlab: default to not building the documentation Alex Bennée
2021-03-23 18:21 ` [PATCH for 6.0 v2 00/22] fixes for rc1 pre-PR (kernel-doc, semihosting, testing) no-reply
2021-03-24 13:40 ` Peter Maydell
2021-03-24 14:22   ` Alex Bennée
2021-03-24 15:58     ` Peter Maydell
2021-03-20 13:36 [PATCH for 6.0 v1 00/14] fixes for rc1 " Alex Bennée
2021-03-20 13:36 ` [PATCH v1 01/14] scripts/kernel-doc: strip QEMU_ from function definitions Alex Bennée
2021-03-20 16:04   ` Richard Henderson
2021-03-20 13:36 ` [PATCH v1 02/14] docs/devel: include the plugin API information from the headers Alex Bennée
2021-03-20 13:36 ` [PATCH v1 03/14] docs/devel: expand style section of memory management Alex Bennée
2021-03-20 16:00   ` Richard Henderson
2021-03-20 13:36 ` [PATCH v1 04/14] tools/virtiofsd: include --socket-group in help Alex Bennée
2021-03-22 11:46   ` Stefan Hajnoczi
2021-03-20 13:36 ` [PATCH v1 05/14] semihosting: move semihosting tests to multiarch Alex Bennée
2021-03-20 16:03   ` Richard Henderson
2021-03-20 13:36 ` [PATCH v1 06/14] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
2021-03-20 13:36 ` [PATCH v1 07/14] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
2021-03-20 13:36   ` [Bug 1915925] " Alex Bennée
2021-03-20 13:37 ` [PATCH v1 08/14] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
2021-03-20 16:05   ` Richard Henderson
2021-03-20 13:37 ` [PATCH v1 09/14] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
2021-03-20 16:11   ` Richard Henderson
2021-03-20 13:37 ` [PATCH v1 10/14] gitlab-ci.yml: Merge the trace-backend testing into other jobs Alex Bennée
2021-03-22 17:03   ` Willian Rampazzo
2021-03-20 13:37 ` [PATCH v1 11/14] configure: Don't use the __atomic_*_16 functions for testing 128-bit support Alex Bennée
2021-03-20 13:37 ` [PATCH v1 12/14] cirrus.yml: Update the FreeBSD task to version 12.2 Alex Bennée
2021-03-20 13:37 ` [PATCH v1 13/14] utils: Tighter tests for qemu_strtosz Alex Bennée
2021-03-20 13:37 ` [PATCH v1 14/14] utils: Work around mingw strto*l bug with 0x Alex Bennée
2021-03-20 13:54 ` [PATCH for 6.0 v1 00/14] fixes for rc1 (kernel-doc, semihosting, testing) no-reply
2021-03-12 10:20 [PATCH v5 0/5] semihosting/next (SYS_HEAPINFO) Alex Bennée
2021-03-12 10:20 ` [PATCH v5 1/5] semihosting: move semihosting tests to multiarch Alex Bennée
2021-03-12 10:20 ` [PATCH v5 2/5] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
2021-03-12 10:20 ` [PATCH v5 3/5] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
2021-03-12 10:20   ` [Bug 1915925] " Alex Bennée
2021-03-12 10:32   ` Peter Maydell
2021-03-12 10:32     ` [Bug 1915925] " Peter Maydell
2021-03-12 10:20 ` [PATCH v5 4/5] linux-user/riscv: initialise the TaskState heap/stack info Alex Bennée
2021-03-12 10:20 ` [PATCH v5 5/5] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
2021-03-12 10:35   ` Peter Maydell
2021-03-12 11:23     ` Alex Bennée
2021-03-12 11:27       ` Peter Maydell
2021-03-12 14:08         ` Alex Bennée
2021-03-09 17:21 [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Alex Bennée
2021-03-09 17:21 ` [PATCH v3 1/4] semihosting: move semihosting tests to multiarch Alex Bennée
2021-03-09 17:21 ` [PATCH v3 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
2021-03-09 17:21 ` [PATCH v3 4/4] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
2021-03-11 13:32 ` [PATCH v3 0/4] semihosting/next (SYS_HEAPINFO) Peter Maydell
2021-03-11 20:05   ` Alex Bennée
2021-03-09 14:17 [PATCH v2 0/4] semihosting/next (SYS_HEAPINFO fix) Alex Bennée
2021-03-09 14:17 ` [PATCH v2 1/4] semihosting: move semihosting tests to multiarch Alex Bennée
2021-03-09 14:17 ` [PATCH v2 2/4] semihosting/arm-compat-semi: unify GET/SET_ARG helpers Alex Bennée
2021-03-09 16:33   ` Peter Maydell
2021-03-09 17:02   ` Keith Packard via
2021-03-09 17:24     ` Alex Bennée
2021-03-09 14:17 ` [PATCH v2 3/4] semihosting/arm-compat-semi: deref parameter register for SYS_HEAPINFO Alex Bennée
2021-03-09 14:17   ` [Bug 1915925] " Alex Bennée
2021-03-09 16:35   ` [Bug 1915925] " Peter Maydell
2021-03-09 16:35     ` Peter Maydell
2021-03-09 17:01     ` Alex Bennée
2021-03-09 17:01       ` [Bug 1915925] " Alex Bennée
2021-03-09 14:17 ` [PATCH v2 4/4] tests/tcg: add HeapInfo checking to semihosting test Alex Bennée
2021-03-09 17:08   ` Keith Packard via
2021-03-05 13:54 [PATCH v1 0/3] semihosting/next (move from hw, heapinfo) Alex Bennée
2021-03-05 13:54 ` [PATCH v1 1/3] semihosting: Move include/hw/semihosting/ -> include/semihosting/ Alex Bennée
2021-03-05 13:54 ` [PATCH v1 2/3] semihosting: Move hw/semihosting/ -> semihosting/ Alex Bennée
2021-03-05 13:54 ` [PATCH v1 3/3] semihosting/arg-compat: fix up handling of SYS_HEAPINFO Alex Bennée
2021-03-05 13:54   ` [Bug 1915925] " Alex Bennée
2021-03-05 14:10   ` Peter Maydell
2021-03-05 14:10     ` [Bug 1915925] " Peter Maydell
2021-03-05 20:22     ` Keith Packard via
2021-03-05 20:22       ` [Bug 1915925] " Keith Packard
2021-03-05 22:54       ` Peter Maydell
2021-03-05 22:54         ` [Bug 1915925] " Peter Maydell
2021-03-05 23:54         ` Keith Packard via
2021-03-05 23:54           ` [Bug 1915925] " Keith Packard
2021-03-06  1:27           ` Richard Henderson
2021-03-06 14:07           ` Peter Maydell
2021-03-06 14:07             ` [Bug 1915925] " Peter Maydell
2021-03-06 16:54             ` Keith Packard via
2021-03-06 16:54               ` [Bug 1915925] " Keith Packard
2021-03-08 10:09               ` Peter Maydell
2021-03-08 10:09                 ` [Bug 1915925] " Peter Maydell
2021-03-08 13:36                 ` Alistair Francis
2021-03-08 17:28                   ` Keith Packard via
2021-03-08 17:28                     ` [Bug 1915925] " Keith Packard
2021-03-05 20:19   ` Keith Packard via
2021-03-05 20:19     ` [Bug 1915925] " Keith Packard
2021-02-17 12:19 [Bug 1915925] [NEW] ARM semihosting HEAPINFO results wrote to wrong address iNvEr7
2021-02-17 14:50 ` [Bug 1915925] " Peter Maydell
2021-02-17 15:03 ` Peter Maydell
2021-02-17 16:13 ` Philippe Mathieu-Daudé
2021-03-05 13:33 ` Alex Bennée
2021-03-09 17:21 ` [Bug 1915925] [PATCH v3 3/4] semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO Alex Bennée
2021-03-09 17:21   ` Alex Bennée
2021-03-15 12:46 ` [Bug 1915925] Re: ARM semihosting HEAPINFO results wrote to wrong address Alex Bennée
2021-03-25 11:47 ` Alex Bennée
2021-04-30  8:54 ` Thomas Huth

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