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From: Corey Minyard <cminyard@mvista.com>
To: Patrick Venture <venture@google.com>
Cc: qemu-devel@nongnu.org
Subject: Re: IPMI Smbus
Date: Tue, 6 Apr 2021 11:54:27 -0500	[thread overview]
Message-ID: <20210406165427.GQ7167@minyard.net> (raw)
In-Reply-To: <CAO=noty9JPU7L8XXKs48TEC9SrJ6j44boA=6ZQP4b_4Z3oy4Kw@mail.gmail.com>

On Tue, Apr 06, 2021 at 09:04:35AM -0700, Patrick Venture wrote:
> Corey;
> 
> I saw you have a branch that is working on adding smbus IPMI support
> (the ssif approach).
> 
> Can you provide details on the status of this work?

There is already an SMBus BMC device that can sit on the I2C bus.  It's
in mainstream qemu now.

It does not have smbus alert support, though.  I have patches for that,
but qemu doesn't have a flexibly general interrupt infrastructure, so I
hacked something in, and it's likely to be contentious.  The trouble is
that the interrupt is disconnected from any real device, and qemu
doesn't handle that very well.  And like the other things, I really only
created it for my testing.

For doing what you are trying to do, I don't think you need any special
support on either side for SSIF to work.

-corey

> 
> Patrick


  reply	other threads:[~2021-04-06 16:58 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-06 16:04 IPMI Smbus Patrick Venture
2021-04-06 16:54 ` Corey Minyard [this message]
2021-04-06 17:06   ` Patrick Venture
2021-04-06 18:34     ` Corey Minyard

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