* [PATCH 1/2] target/arm: Needn't validate the target in scratch host
@ 2021-04-07 4:00 Gavin Shan
2021-04-07 4:01 ` [PATCH 2/2] target/arm: Initlaize PMU feature for scratch vcpu Gavin Shan
0 siblings, 1 reply; 4+ messages in thread
From: Gavin Shan @ 2021-04-07 4:00 UTC (permalink / raw)
To: qemu-arm
Cc: peter.maydell, richard.henderson, qemu-devel, marcin.juszkiewicz,
shan.gavin, pbonzini
@init->target is always -1 and preferred target is retrieved from
host when @init isn't NULL in kvm_arm_create_scratch_host_vcpu().
So we can have the assumption that preferred target retrived from
host is tried prior to the specified target list.
Signed-off-by: Gavin Shan <gshan@redhat.com>
---
target/arm/kvm.c | 15 ++++-----------
target/arm/kvm64.c | 12 +++++-------
2 files changed, 9 insertions(+), 18 deletions(-)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index d8381ba224..3141d5d313 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -69,6 +69,7 @@ bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
int *fdarray,
struct kvm_vcpu_init *init)
{
+ struct kvm_vcpu_init try;
int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1;
kvmfd = qemu_open_old("/dev/kvm", O_RDWR);
@@ -89,15 +90,9 @@ bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
goto finish;
}
- if (init->target == -1) {
- struct kvm_vcpu_init preferred;
-
- ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &preferred);
- if (!ret) {
- init->target = preferred.target;
- }
- }
- if (ret >= 0) {
+ ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, &try);
+ if (!ret) {
+ init->target = try.target;
ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
if (ret < 0) {
goto err;
@@ -108,8 +103,6 @@ bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
* creating one kind of guest CPU which is its preferred
* CPU type.
*/
- struct kvm_vcpu_init try;
-
while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
try.target = *cpus_to_try++;
memcpy(try.features, init->features, sizeof(init->features));
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 581335e49d..79800f00a7 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -515,11 +515,9 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
KVM_ARM_TARGET_CORTEX_A57,
QEMU_KVM_ARM_TARGET_NONE
};
- /*
- * target = -1 informs kvm_arm_create_scratch_host_vcpu()
- * to use the preferred target
- */
- struct kvm_vcpu_init init = { .target = -1, };
+ struct kvm_vcpu_init init = {
+ .features[0] = 0;
+ };
if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try, fdarray, &init)) {
return false;
@@ -742,8 +740,7 @@ void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map)
*/
if (!probed) {
struct kvm_vcpu_init init = {
- .target = -1,
- .features[0] = (1 << KVM_ARM_VCPU_SVE),
+ .features[0] = 0,
};
struct kvm_one_reg reg = {
.id = KVM_REG_ARM64_SVE_VLS,
@@ -753,6 +750,7 @@ void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *map)
probed = true;
+ init.features[0] = (1 << KVM_ARM_VCPU_SVE);
if (!kvm_arm_create_scratch_host_vcpu(NULL, fdarray, &init)) {
error_report("failed to create scratch VCPU with SVE enabled");
abort();
--
2.23.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] target/arm: Initlaize PMU feature for scratch vcpu
2021-04-07 4:00 [PATCH 1/2] target/arm: Needn't validate the target in scratch host Gavin Shan
@ 2021-04-07 4:01 ` Gavin Shan
2021-04-07 7:38 ` Peter Maydell
0 siblings, 1 reply; 4+ messages in thread
From: Gavin Shan @ 2021-04-07 4:01 UTC (permalink / raw)
To: qemu-arm
Cc: peter.maydell, richard.henderson, qemu-devel, marcin.juszkiewicz,
shan.gavin, pbonzini
If the scratch vCPU is initialized without PMU feature, we receive
error on reading PMCR_EL0 as it's invisible in this case. It leads
to host probing failure.
This fixes the issue by initializing the scratch vcpu with the PMU
feature enabled and reading PMCR_EL0 from host. Otherwise, its value
is set according to the detected target.
Fixes: f7fb73b8cdd3 ("target/arm: Make number of counters in PMCR follow the CPU")
Signed-off-by: Gavin Shan <gshan@redhat.com>
---
target/arm/kvm64.c | 32 +++++++++++++++++++++++++++-----
1 file changed, 27 insertions(+), 5 deletions(-)
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index 79800f00a7..7311e86d1d 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -516,11 +516,14 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
QEMU_KVM_ARM_TARGET_NONE
};
struct kvm_vcpu_init init = {
- .features[0] = 0;
+ .features[0] = (1 << KVM_ARM_VCPU_PMU_V3),
};
- if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try, fdarray, &init)) {
- return false;
+ if (!kvm_arm_create_scratch_host_vcpu(NULL, fdarray, &init)) {
+ init.features[0] = 0;
+ if (!kvm_arm_create_scratch_host_vcpu(cpus_to_try, fdarray, &init)) {
+ return false;
+ }
}
ahcf->target = init.target;
@@ -564,8 +567,27 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)
ARM64_SYS_REG(3, 0, 0, 7, 1));
err |= read_sys_reg64(fdarray[2], &ahcf->isar.id_aa64mmfr2,
ARM64_SYS_REG(3, 0, 0, 7, 2));
- err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
- ARM64_SYS_REG(3, 3, 9, 12, 0));
+
+ /*
+ * Read PMCR_EL0 from host if PMU feature has been enabled
+ * successfully. Otherwise, the value is set according to
+ * the detected target.
+ */
+ if (init.features[0] & (1 << KVM_ARM_VCPU_PMU_V3)) {
+ err |= read_sys_reg64(fdarray[2], &ahcf->isar.reset_pmcr_el0,
+ ARM64_SYS_REG(3, 3, 9, 12, 0));
+ } else {
+ switch (init.target) {
+ case KVM_ARM_TARGET_CORTEX_A53:
+ ahcf->isar.reset_pmcr_el0 = 0x41033000;
+ break;
+ case KVM_ARM_TARGET_CORTEX_A57:
+ ahcf->isar.reset_pmcr_el0 = 0x41013000;
+ break;
+ default:
+ ahcf->isar.reset_pmcr_el0 = 0x41023000;
+ }
+ }
/*
* Note that if AArch32 support is not present in the host,
--
2.23.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] target/arm: Initlaize PMU feature for scratch vcpu
2021-04-07 4:01 ` [PATCH 2/2] target/arm: Initlaize PMU feature for scratch vcpu Gavin Shan
@ 2021-04-07 7:38 ` Peter Maydell
2021-04-12 4:11 ` Gavin Shan
0 siblings, 1 reply; 4+ messages in thread
From: Peter Maydell @ 2021-04-07 7:38 UTC (permalink / raw)
To: Gavin Shan
Cc: Richard Henderson, QEMU Developers, Marcin Juszkiewicz, qemu-arm,
Shan Gavin, Paolo Bonzini
On Wed, 7 Apr 2021 at 03:01, Gavin Shan <gshan@redhat.com> wrote:
>
> If the scratch vCPU is initialized without PMU feature, we receive
> error on reading PMCR_EL0 as it's invisible in this case. It leads
> to host probing failure.
>
> This fixes the issue by initializing the scratch vcpu with the PMU
> feature enabled and reading PMCR_EL0 from host. Otherwise, its value
> is set according to the detected target.
>
> Fixes: f7fb73b8cdd3 ("target/arm: Make number of counters in PMCR follow the CPU")
This commit has been reverted...
I couldn't find a cover letter for these patches, so it's
hard to tell what you're aiming to do with them. Could you
make sure you always send a cover letter with a multiple-patch
series, please ? This also helps with our automated tooling.
thanks
-- PMM
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] target/arm: Initlaize PMU feature for scratch vcpu
2021-04-07 7:38 ` Peter Maydell
@ 2021-04-12 4:11 ` Gavin Shan
0 siblings, 0 replies; 4+ messages in thread
From: Gavin Shan @ 2021-04-12 4:11 UTC (permalink / raw)
To: Peter Maydell
Cc: Richard Henderson, QEMU Developers, Marcin Juszkiewicz, qemu-arm,
Shan Gavin, Paolo Bonzini
Hi Peter,
On 4/7/21 5:38 PM, Peter Maydell wrote:
> On Wed, 7 Apr 2021 at 03:01, Gavin Shan <gshan@redhat.com> wrote:
>>
>> If the scratch vCPU is initialized without PMU feature, we receive
>> error on reading PMCR_EL0 as it's invisible in this case. It leads
>> to host probing failure.
>>
>> This fixes the issue by initializing the scratch vcpu with the PMU
>> feature enabled and reading PMCR_EL0 from host. Otherwise, its value
>> is set according to the detected target.
>>
>> Fixes: f7fb73b8cdd3 ("target/arm: Make number of counters in PMCR follow the CPU")
>
> This commit has been reverted...
>
> I couldn't find a cover letter for these patches, so it's
> hard to tell what you're aiming to do with them. Could you
> make sure you always send a cover letter with a multiple-patch
> series, please ? This also helps with our automated tooling.
>
Sorry for the delay. Yep, I will always include cover letter for
a series. For this particular series, it's invalid since f7fb73b8cdd3
has been reverted. So please ignore this series.
Thanks,
Gavin
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-04-12 2:13 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-04-07 4:00 [PATCH 1/2] target/arm: Needn't validate the target in scratch host Gavin Shan
2021-04-07 4:01 ` [PATCH 2/2] target/arm: Initlaize PMU feature for scratch vcpu Gavin Shan
2021-04-07 7:38 ` Peter Maydell
2021-04-12 4:11 ` Gavin Shan
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).