From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 4/5] target/arm: Check PAGE_WRITE_ORG for MTE writeability
Date: Mon, 12 Apr 2021 11:31:51 +0100 [thread overview]
Message-ID: <20210412103152.28433-5-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210412103152.28433-1-peter.maydell@linaro.org>
From: Richard Henderson <richard.henderson@linaro.org>
We can remove PAGE_WRITE when (internally) marking a page
read-only because it contains translated code.
This can be triggered by tests/tcg/aarch64/bti-2, after
having serviced SIGILL trampolines on the stack.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/mte_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/mte_helper.c b/target/arm/mte_helper.c
index 0bbb9ec3463..8be17e1b707 100644
--- a/target/arm/mte_helper.c
+++ b/target/arm/mte_helper.c
@@ -83,7 +83,7 @@ static uint8_t *allocation_tag_mem(CPUARMState *env, int ptr_mmu_idx,
uint8_t *tags;
uintptr_t index;
- if (!(flags & (ptr_access == MMU_DATA_STORE ? PAGE_WRITE : PAGE_READ))) {
+ if (!(flags & (ptr_access == MMU_DATA_STORE ? PAGE_WRITE_ORG : PAGE_READ))) {
/* SIGSEGV */
arm_cpu_tlb_fill(env_cpu(env), ptr, ptr_size, ptr_access,
ptr_mmu_idx, false, ra);
--
2.20.1
next prev parent reply other threads:[~2021-04-12 10:37 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-12 10:31 [PULL 0/5] target-arm queue Peter Maydell
2021-04-12 10:31 ` [PULL 1/5] hw/arm/virt-acpi-build: Fix GSIV values of the {GERR, Sync} interrupts Peter Maydell
2021-04-12 10:31 ` [PULL 2/5] hw/arm/smmuv3: Emulate CFGI_STE_RANGE for an aligned range of StreamIDs Peter Maydell
2021-04-12 10:31 ` [PULL 3/5] accel/tcg: Preserve PAGE_ANON when changing page permissions Peter Maydell
2021-04-12 10:31 ` Peter Maydell [this message]
2021-04-12 10:31 ` [PULL 5/5] exec: Fix overlap of PAGE_ANON and PAGE_TARGET_1 Peter Maydell
2021-04-12 10:42 ` [PULL 0/5] target-arm queue no-reply
2021-04-12 14:50 ` Peter Maydell
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