From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EF59C433B4 for ; Wed, 14 Apr 2021 12:30:01 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id CAE8961139 for ; Wed, 14 Apr 2021 12:30:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org CAE8961139 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39056 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lWeee-0002nW-0H for qemu-devel@archiver.kernel.org; Wed, 14 Apr 2021 08:30:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42510) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lWdgu-00071z-Tc for qemu-devel@nongnu.org; Wed, 14 Apr 2021 07:28:16 -0400 Received: from mx2.suse.de ([195.135.220.15]:45912) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lWdgk-0005mv-41 for qemu-devel@nongnu.org; Wed, 14 Apr 2021 07:28:16 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id C26B0B162; Wed, 14 Apr 2021 11:27:20 +0000 (UTC) From: Claudio Fontana To: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , =?UTF-8?q?Alex=20Benn=C3=A9e?= Subject: [RFC v13 60/80] target/arm: cpu-sve: rename functions according to module prefix Date: Wed, 14 Apr 2021 13:26:30 +0200 Message-Id: <20210414112650.18003-61-cfontana@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210414112650.18003-1-cfontana@suse.de> References: <20210414112650.18003-1-cfontana@suse.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Roman Bolshakov , Claudio Fontana , Eduardo Habkost , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" external functions have the cpu_sve prefix, while for static functions it can be omitted. Signed-off-by: Claudio Fontana --- target/arm/cpu-sve.h | 6 +++--- target/arm/cpu-sve.c | 32 ++++++++++++++++---------------- target/arm/cpu.c | 2 +- target/arm/cpu64.c | 4 ++-- target/arm/kvm/kvm-cpu.c | 2 +- 5 files changed, 23 insertions(+), 23 deletions(-) diff --git a/target/arm/cpu-sve.h b/target/arm/cpu-sve.h index 692509d419..ece36d2a0c 100644 --- a/target/arm/cpu-sve.h +++ b/target/arm/cpu-sve.h @@ -26,12 +26,12 @@ #include "cpu.h" /* called by arm_cpu_finalize_features in realizefn */ -void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp); +void cpu_sve_finalize_features(ARMCPU *cpu, Error **errp); /* add the CPU SVE properties */ -void aarch64_add_sve_properties(Object *obj); +void cpu_sve_add_props(Object *obj); /* add the CPU SVE properties specific to the "MAX" CPU */ -void aarch64_add_sve_properties_max(Object *obj); +void cpu_sve_add_props_max(Object *obj); #endif /* CPU_SVE_H */ diff --git a/target/arm/cpu-sve.c b/target/arm/cpu-sve.c index 129fb9586e..da60330cc2 100644 --- a/target/arm/cpu-sve.c +++ b/target/arm/cpu-sve.c @@ -27,7 +27,7 @@ #include "qapi/visitor.h" #include "cpu-sve.h" -void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) +void cpu_sve_finalize_features(ARMCPU *cpu, Error **errp) { /* * If any vector lengths are explicitly enabled with sve properties, @@ -229,8 +229,8 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) cpu->sve_max_vq = max_vq; } -static void cpu_max_get_sve_max_vq(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void get_prop_max_vq(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { ARMCPU *cpu = ARM_CPU(obj); uint32_t value; @@ -244,8 +244,8 @@ static void cpu_max_get_sve_max_vq(Object *obj, Visitor *v, const char *name, visit_type_uint32(v, name, &value, errp); } -static void cpu_max_set_sve_max_vq(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void set_prop_max_vq(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { ARMCPU *cpu = ARM_CPU(obj); uint32_t max_vq; @@ -276,8 +276,8 @@ static void cpu_max_set_sve_max_vq(Object *obj, Visitor *v, const char *name, * of the contents of "name" to determine which bit on which * to operate. */ -static void cpu_arm_get_sve_vq(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void get_prop_vq(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { ARMCPU *cpu = ARM_CPU(obj); uint32_t vq = atoi(&name[3]) / 128; @@ -292,8 +292,8 @@ static void cpu_arm_get_sve_vq(Object *obj, Visitor *v, const char *name, visit_type_bool(v, name, &value, errp); } -static void cpu_arm_set_sve_vq(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) +static void set_prop_vq(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { ARMCPU *cpu = ARM_CPU(obj); uint32_t vq = atoi(&name[3]) / 128; @@ -317,13 +317,13 @@ static void cpu_arm_set_sve_vq(Object *obj, Visitor *v, const char *name, set_bit(vq - 1, cpu->sve_vq_init); } -static bool cpu_arm_get_sve(Object *obj, Error **errp) +static bool get_prop_sve(Object *obj, Error **errp) { ARMCPU *cpu = ARM_CPU(obj); return cpu_isar_feature(aa64_sve, cpu); } -static void cpu_arm_set_sve(Object *obj, bool value, Error **errp) +static void set_prop_sve(Object *obj, bool value, Error **errp) { ARMCPU *cpu = ARM_CPU(obj); uint64_t t; @@ -338,21 +338,21 @@ static void cpu_arm_set_sve(Object *obj, bool value, Error **errp) cpu->isar.id_aa64pfr0 = t; } -void aarch64_add_sve_properties(Object *obj) +void cpu_sve_add_props(Object *obj) { uint32_t vq; - object_property_add_bool(obj, "sve", cpu_arm_get_sve, cpu_arm_set_sve); + object_property_add_bool(obj, "sve", get_prop_sve, set_prop_sve); for (vq = 1; vq <= ARM_MAX_VQ; ++vq) { char name[8]; sprintf(name, "sve%d", vq * 128); - object_property_add(obj, name, "bool", cpu_arm_get_sve_vq, cpu_arm_set_sve_vq, NULL, NULL); + object_property_add(obj, name, "bool", get_prop_vq, set_prop_vq, NULL, NULL); } } /* properties added for MAX CPU */ -void aarch64_add_sve_properties_max(Object *obj) +void cpu_sve_add_props_max(Object *obj) { - object_property_add(obj, "sve-max-vq", "uint32", cpu_max_get_sve_max_vq, cpu_max_set_sve_max_vq, NULL, NULL); + object_property_add(obj, "sve-max-vq", "uint32", get_prop_max_vq, set_prop_max_vq, NULL, NULL); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 75a8041855..be5d857e65 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -821,7 +821,7 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp) #ifdef TARGET_AARCH64 if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { - arm_cpu_sve_finalize(cpu, &local_err); + cpu_sve_finalize_features(cpu, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); return; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 52188698d9..7d6e0b553f 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -438,8 +438,8 @@ static void aarch64_max_initfn(Object *obj) qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property); } - aarch64_add_sve_properties(obj); - aarch64_add_sve_properties_max(obj); + cpu_sve_add_props(obj); + cpu_sve_add_props_max(obj); } static const ARMCPUInfo aarch64_cpus[] = { diff --git a/target/arm/kvm/kvm-cpu.c b/target/arm/kvm/kvm-cpu.c index a23831e3c6..09aede9319 100644 --- a/target/arm/kvm/kvm-cpu.c +++ b/target/arm/kvm/kvm-cpu.c @@ -89,7 +89,7 @@ static void host_cpu_instance_init(Object *obj) kvm_arm_set_cpu_features_from_host(cpu); if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { - aarch64_add_sve_properties(obj); + cpu_sve_add_props(obj); } arm_cpu_post_init(obj); } -- 2.26.2