qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
	"Huacai Chen" <chenhuacai@kernel.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH 16/26] target/mips: Move tlb_helper.c to tcg/sysemu/
Date: Sun, 18 Apr 2021 18:31:24 +0200	[thread overview]
Message-ID: <20210418163134.1133100-17-f4bug@amsat.org> (raw)
In-Reply-To: <20210418163134.1133100-1-f4bug@amsat.org>

Move tlb_helper.c to the tcg/sysemu/ subdir, along with
the following 3 declarations to tcg-internal.h:
- cpu_mips_tlb_flush()
- cpu_mips_translate_address()
- r4k_invalidate_tlb()

Simplify tlb_helper.c #ifdef'ry because files in tcg/sysemu/
are only build when sysemu mode is configured.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/internal.h                    | 5 -----
 target/mips/tcg/tcg-internal.h            | 5 +++++
 target/mips/{ => tcg/sysemu}/tlb_helper.c | 3 ---
 target/mips/meson.build                   | 1 -
 target/mips/tcg/sysemu/meson.build        | 1 +
 5 files changed, 6 insertions(+), 9 deletions(-)
 rename target/mips/{ => tcg/sysemu}/tlb_helper.c (99%)

diff --git a/target/mips/internal.h b/target/mips/internal.h
index 13f8e421662..b1b1681bf8d 100644
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -164,16 +164,12 @@ void r4k_helper_tlbp(CPUMIPSState *env);
 void r4k_helper_tlbr(CPUMIPSState *env);
 void r4k_helper_tlbinv(CPUMIPSState *env);
 void r4k_helper_tlbinvf(CPUMIPSState *env);
-void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
 
 void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
                                     vaddr addr, unsigned size,
                                     MMUAccessType access_type,
                                     int mmu_idx, MemTxAttrs attrs,
                                     MemTxResult response, uintptr_t retaddr);
-hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
-                                  MMUAccessType access_type);
-
 extern const VMStateDescription vmstate_mips_cpu;
 
 #endif /* !CONFIG_USER_ONLY */
@@ -413,7 +409,6 @@ static inline void compute_hflags(CPUMIPSState *env)
     }
 }
 
-void cpu_mips_tlb_flush(CPUMIPSState *env);
 void sync_c0_status(CPUMIPSState *env, CPUMIPSState *cpu, int tc);
 void cpu_mips_store_status(CPUMIPSState *env, target_ulong val);
 void cpu_mips_store_cause(CPUMIPSState *env, target_ulong val);
diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h
index 70655bab45c..6615151cba2 100644
--- a/target/mips/tcg/tcg-internal.h
+++ b/target/mips/tcg/tcg-internal.h
@@ -24,8 +24,13 @@ void mmu_init(CPUMIPSState *env, const mips_def_t *def);
 
 void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
 
+void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra);
 uint32_t cpu_mips_get_random(CPUMIPSState *env);
 
+hwaddr cpu_mips_translate_address(CPUMIPSState *env, target_ulong address,
+                                  MMUAccessType access_type);
+void cpu_mips_tlb_flush(CPUMIPSState *env);
+
 #endif /* !CONFIG_USER_ONLY */
 
 #endif
diff --git a/target/mips/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c
similarity index 99%
rename from target/mips/tlb_helper.c
rename to target/mips/tcg/sysemu/tlb_helper.c
index 2304fff4c42..82cfb0a9135 100644
--- a/target/mips/tlb_helper.c
+++ b/target/mips/tcg/sysemu/tlb_helper.c
@@ -25,8 +25,6 @@
 #include "exec/log.h"
 #include "hw/mips/cpudevs.h"
 
-#if !defined(CONFIG_USER_ONLY)
-
 /* no MMU emulation */
 int no_mmu_map_address(CPUMIPSState *env, hwaddr *physical, int *prot,
                        target_ulong address, MMUAccessType access_type)
@@ -1071,4 +1069,3 @@ void r4k_invalidate_tlb(CPUMIPSState *env, int idx, int use_extra)
         }
     }
 }
-#endif /* !CONFIG_USER_ONLY */
diff --git a/target/mips/meson.build b/target/mips/meson.build
index a55af1cd6cf..ff5eb210dfd 100644
--- a/target/mips/meson.build
+++ b/target/mips/meson.build
@@ -31,7 +31,6 @@
   'msa_translate.c',
   'op_helper.c',
   'rel6_translate.c',
-  'tlb_helper.c',
   'translate.c',
   'translate_addr_const.c',
   'txx9_translate.c',
diff --git a/target/mips/tcg/sysemu/meson.build b/target/mips/tcg/sysemu/meson.build
index 5c3024e7760..73ab9571ba6 100644
--- a/target/mips/tcg/sysemu/meson.build
+++ b/target/mips/tcg/sysemu/meson.build
@@ -1,4 +1,5 @@
 mips_softmmu_ss.add(files(
   'cp0_helper.c',
   'mips-semi.c',
+  'tlb_helper.c',
 ))
-- 
2.26.3



  parent reply	other threads:[~2021-04-18 16:53 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-18 16:31 [PATCH 00/26] target/mips: Re-org to allow KVM-only builds Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 01/26] target/mips: Simplify meson TCG rules Philippe Mathieu-Daudé
2021-04-18 18:50   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 02/26] target/mips: Move IEEE rounding mode array to new source file Philippe Mathieu-Daudé
2021-04-18 18:51   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 03/26] target/mips: Move msa_reset() " Philippe Mathieu-Daudé
2021-04-18 18:54   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 04/26] target/mips: Make CPU/FPU regnames[] arrays global Philippe Mathieu-Daudé
2021-04-18 18:59   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 05/26] target/mips: Restrict mips_cpu_dump_state() to cpu.c Philippe Mathieu-Daudé
2021-04-18 19:02   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 06/26] target/mips: Extract load/store helpers to ldst_helper.c Philippe Mathieu-Daudé
2021-04-18 19:08   ` Richard Henderson
2021-04-18 22:46     ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 07/26] meson: Introduce meson_user_arch source set for arch-specific user-mode Philippe Mathieu-Daudé
2021-04-18 19:09   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 08/26] target/mips: Introduce tcg-internal.h for TCG specific declarations Philippe Mathieu-Daudé
2021-04-18 19:13   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 09/26] target/mips: Add simple user-mode mips_cpu_do_interrupt() Philippe Mathieu-Daudé
2021-04-18 20:43   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 10/26] target/mips: Add simple user-mode mips_cpu_tlb_fill() Philippe Mathieu-Daudé
2021-04-18 20:44   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 11/26] target/mips: Move cpu_signal_handler definition around Philippe Mathieu-Daudé
2021-04-18 19:13   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 12/26] target/mips: Move sysemu specific files under sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-18 19:15   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 13/26] target/mips: Move code related to physical addressing to sysemu/phys.c Philippe Mathieu-Daudé
2021-04-18 19:30   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 14/26] target/mips: Move sysemu TCG-specific code to tcg/sysemu/ subfolder Philippe Mathieu-Daudé
2021-04-18 19:35   ` Richard Henderson
2021-04-18 22:45     ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 15/26] target/mips: Restrict mmu_init() to TCG Philippe Mathieu-Daudé
2021-04-18 19:35   ` Richard Henderson
2021-04-18 16:31 ` Philippe Mathieu-Daudé [this message]
2021-04-18 19:40   ` [PATCH 16/26] target/mips: Move tlb_helper.c to tcg/sysemu/ Richard Henderson
2021-04-18 16:31 ` [PATCH 17/26] target/mips: Restrict CPUMIPSTLBContext::map_address() handlers scope Philippe Mathieu-Daudé
2021-04-18 19:40   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 18/26] target/mips: Move Special opcodes to tcg/sysemu/special_helper.c Philippe Mathieu-Daudé
2021-04-18 19:47   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 19/26] target/mips: Move helper_cache() " Philippe Mathieu-Daudé
2021-04-18 19:52   ` Richard Henderson
2021-04-18 20:20     ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 20/26] target/mips: Move TLB management helpers to tcg/sysemu/tlb_helper.c Philippe Mathieu-Daudé
2021-04-18 20:06   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 21/26] target/mips: Move exception management code to exception.c Philippe Mathieu-Daudé
2021-04-18 20:23   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 22/26] target/mips: Move CP0 helpers to sysemu/cp0.c Philippe Mathieu-Daudé
2021-04-18 20:28   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 23/26] target/mips: Move helper.h -> tcg/helper.h.inc Philippe Mathieu-Daudé
2021-04-18 20:34   ` Richard Henderson
2021-04-18 21:20     ` Philippe Mathieu-Daudé
2021-04-18 16:31 ` [PATCH 24/26] target/mips: Move TCG source files under tcg/ sub directory Philippe Mathieu-Daudé
2021-04-18 20:39   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 25/26] hw/mips: Restrict non-virtualized machines to TCG Philippe Mathieu-Daudé
2021-04-18 20:41   ` Richard Henderson
2021-04-18 16:31 ` [PATCH 26/26] gitlab-ci: Add KVM mips64el cross-build jobs Philippe Mathieu-Daudé
2021-04-18 20:42   ` Richard Henderson
2021-04-19 16:00   ` Willian Rampazzo
2021-04-18 16:45 ` [PATCH 00/26] target/mips: Re-org to allow KVM-only builds no-reply

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210418163134.1133100-17-f4bug@amsat.org \
    --to=f4bug@amsat.org \
    --cc=aleksandar.rikalo@syrmia.com \
    --cc=aurelien@aurel32.net \
    --cc=chenhuacai@kernel.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --subject='Re: [PATCH 16/26] target/mips: Move tlb_helper.c to tcg/sysemu/' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).