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[81.40.121.39]) by smtp.gmail.com with ESMTPSA id x9sm7424160wrt.13.2021.04.18.09.33.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Apr 2021 09:33:07 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 19/26] target/mips: Move helper_cache() to tcg/sysemu/special_helper.c Date: Sun, 18 Apr 2021 18:31:27 +0200 Message-Id: <20210418163134.1133100-20-f4bug@amsat.org> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210418163134.1133100-1-f4bug@amsat.org> References: <20210418163134.1133100-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x430.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , Huacai Chen , Richard Henderson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Move helper_cache() to tcg/sysemu/special_helper.c. The CACHE opcode is privileged and is not accessible in user emulation. However we get a link failure when restricting the symbol to sysemu. For now, add a stub to satisfy linking, which abort if ever called. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/op_helper.c | 35 ------------------------- target/mips/tcg/sysemu/special_helper.c | 33 +++++++++++++++++++++++ target/mips/tcg/user/stubs.c | 29 ++++++++++++++++++++ target/mips/tcg/user/meson.build | 1 + 4 files changed, 63 insertions(+), 35 deletions(-) create mode 100644 target/mips/tcg/user/stubs.c diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 3903545831f..659c4d15668 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -789,38 +789,3 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, } } #endif /* !CONFIG_USER_ONLY */ - -void helper_cache(CPUMIPSState *env, target_ulong addr, uint32_t op) -{ -#ifndef CONFIG_USER_ONLY - static const char *const type_name[] = { - "Primary Instruction", - "Primary Data or Unified Primary", - "Tertiary", - "Secondary" - }; - uint32_t cache_type = extract32(op, 0, 2); - uint32_t cache_operation = extract32(op, 2, 3); - target_ulong index = addr & 0x1fffffff; - - switch (cache_operation) { - case 0b010: /* Index Store Tag */ - memory_region_dispatch_write(env->itc_tag, index, env->CP0_TagLo, - MO_64, MEMTXATTRS_UNSPECIFIED); - break; - case 0b001: /* Index Load Tag */ - memory_region_dispatch_read(env->itc_tag, index, &env->CP0_TagLo, - MO_64, MEMTXATTRS_UNSPECIFIED); - break; - case 0b000: /* Index Invalidate */ - case 0b100: /* Hit Invalidate */ - case 0b110: /* Hit Writeback */ - /* no-op */ - break; - default: - qemu_log_mask(LOG_UNIMP, "cache operation:%u (type: %s cache)\n", - cache_operation, type_name[cache_type]); - break; - } -#endif -} diff --git a/target/mips/tcg/sysemu/special_helper.c b/target/mips/tcg/sysemu/special_helper.c index f2cf7252484..ae8d0d03638 100644 --- a/target/mips/tcg/sysemu/special_helper.c +++ b/target/mips/tcg/sysemu/special_helper.c @@ -148,3 +148,36 @@ void helper_deret(CPUMIPSState *env) debug_post_eret(env); } + +void helper_cache(CPUMIPSState *env, target_ulong addr, uint32_t op) +{ + static const char *const type_name[] = { + "Primary Instruction", + "Primary Data or Unified Primary", + "Tertiary", + "Secondary" + }; + uint32_t cache_type = extract32(op, 0, 2); + uint32_t cache_operation = extract32(op, 2, 3); + target_ulong index = addr & 0x1fffffff; + + switch (cache_operation) { + case 0b010: /* Index Store Tag */ + memory_region_dispatch_write(env->itc_tag, index, env->CP0_TagLo, + MO_64, MEMTXATTRS_UNSPECIFIED); + break; + case 0b001: /* Index Load Tag */ + memory_region_dispatch_read(env->itc_tag, index, &env->CP0_TagLo, + MO_64, MEMTXATTRS_UNSPECIFIED); + break; + case 0b000: /* Index Invalidate */ + case 0b100: /* Hit Invalidate */ + case 0b110: /* Hit Writeback */ + /* no-op */ + break; + default: + qemu_log_mask(LOG_UNIMP, "cache operation:%u (type: %s cache)\n", + cache_operation, type_name[cache_type]); + break; + } +} diff --git a/target/mips/tcg/user/stubs.c b/target/mips/tcg/user/stubs.c new file mode 100644 index 00000000000..adb2f8e301b --- /dev/null +++ b/target/mips/tcg/user/stubs.c @@ -0,0 +1,29 @@ +/* + * MIPS emulation helpers for qemu. + * + * Copyright (c) 2004-2005 Jocelyn Mayer + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2.1 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + * + */ + +#include "qemu/osdep.h" +#include "cpu.h" +#include "internal.h" +#include "exec/helper-proto.h" + +void helper_cache(CPUMIPSState *env, target_ulong addr, uint32_t op) +{ + g_assert_not_reached(); +} diff --git a/target/mips/tcg/user/meson.build b/target/mips/tcg/user/meson.build index 2fe2062a73b..5f34783bdf2 100644 --- a/target/mips/tcg/user/meson.build +++ b/target/mips/tcg/user/meson.build @@ -1,3 +1,4 @@ mips_user_ss.add(files( 'helper.c', + 'stubs.c', )) -- 2.26.3