From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Kevin Wolf" <kwolf@redhat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Stephen Checkoway" <stephen.checkoway@oberlin.edu>,
qemu-block@nongnu.org,
"Yoshinori Sato" <ysato@users.sourceforge.jp>,
"open list:405" <qemu-ppc@nongnu.org>,
"Magnus Damm" <magnus.damm@gmail.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Max Reitz" <mreitz@redhat.com>,
"David Edmondson" <david.edmondson@oracle.com>,
"Michael Walle" <michael@walle.cc>,
qemu-arm@nongnu.org, "Jan Kiszka" <jan.kiszka@web.de>,
"Antony Pavlov" <antonynpavlov@gmail.com>,
"Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
"Greg Kurz" <groug@kaod.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"David Gibson" <david@gibson.dropbear.id.au>
Subject: [PATCH v2 7/7] hw/block/pflash_cfi02: Simplify pflash_cfi02_register() prototype
Date: Mon, 19 Apr 2021 11:43:29 +0200 [thread overview]
Message-ID: <20210419094329.1402767-8-f4bug@amsat.org> (raw)
In-Reply-To: <20210419094329.1402767-1-f4bug@amsat.org>
The previous commit removed the mapping code from TYPE_PFLASH_CFI02.
pflash_cfi02_register() doesn't use the 'nb_mappings' argument
anymore. Simply remove it to simplify.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/block/flash.h | 1 -
hw/arm/digic_boards.c | 1 -
hw/arm/musicpal.c | 1 -
hw/arm/xilinx_zynq.c | 2 +-
hw/block/pflash_cfi02.c | 3 +--
hw/lm32/lm32_boards.c | 4 ++--
hw/ppc/ppc405_boards.c | 6 +++---
hw/sh4/r2d.c | 2 +-
8 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/include/hw/block/flash.h b/include/hw/block/flash.h
index 7dde0adcee7..0e5dd818a9d 100644
--- a/include/hw/block/flash.h
+++ b/include/hw/block/flash.h
@@ -36,7 +36,6 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len,
- int nb_mappings,
int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3,
diff --git a/hw/arm/digic_boards.c b/hw/arm/digic_boards.c
index 293402b1240..eb694c70d4c 100644
--- a/hw/arm/digic_boards.c
+++ b/hw/arm/digic_boards.c
@@ -128,7 +128,6 @@ static void digic4_add_k8p3215uqb_rom(DigicState *s, hwaddr addr,
FLASH_K8P3215UQB_SIZE / FLASH_K8P3215UQB_SECTOR_SIZE);
qdev_prop_set_uint32(dev, "sector-length", FLASH_K8P3215UQB_SECTOR_SIZE);
qdev_prop_set_uint8(dev, "width", 4); /* 32-bit */
- qdev_prop_set_uint8(dev, "mappings", 0);
qdev_prop_set_uint8(dev, "big-endian", 0);
qdev_prop_set_uint16(dev, "id0", 0x00ec);
qdev_prop_set_uint16(dev, "id1", 0x007e);
diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c
index 7d1f2f3fb3f..e882e11df36 100644
--- a/hw/arm/musicpal.c
+++ b/hw/arm/musicpal.c
@@ -1657,7 +1657,6 @@ static void musicpal_init(MachineState *machine)
qdev_prop_set_uint32(dev, "num-blocks", flash_size / sector_size);
qdev_prop_set_uint32(dev, "sector-length", sector_size);
qdev_prop_set_uint8(dev, "width", 2); /* 16-bit */
- qdev_prop_set_uint8(dev, "mappings", 0);
qdev_prop_set_uint8(dev, "big-endian", 0);
qdev_prop_set_uint16(dev, "id0", 0x00bf);
qdev_prop_set_uint16(dev, "id1", 0x236d);
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 8db6cfd47f5..d12b00e7648 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -220,7 +220,7 @@ static void zynq_init(MachineState *machine)
pflash_cfi02_register(0xe2000000, "zynq.pflash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
FLASH_SECTOR_SIZE, 1,
- 1, 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
+ 0x0066, 0x0022, 0x0000, 0x0000, 0x0555, 0x2aa,
0);
/* Create the main clock source, and feed slcr with it */
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index 6f4b3e3c3fe..2b412402fac 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -968,7 +968,7 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
hwaddr size,
BlockBackend *blk,
uint32_t sector_len,
- int nb_mappings, int width,
+ int width,
uint16_t id0, uint16_t id1,
uint16_t id2, uint16_t id3,
uint16_t unlock_addr0,
@@ -977,7 +977,6 @@ PFlashCFI02 *pflash_cfi02_register(hwaddr base,
{
DeviceState *dev = qdev_new(TYPE_PFLASH_CFI02);
- assert(nb_mappings <= 1);
if (blk) {
qdev_prop_set_drive(dev, "drive", blk);
}
diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c
index b5d97dd53ed..96877ba7cfb 100644
--- a/hw/lm32/lm32_boards.c
+++ b/hw/lm32/lm32_boards.c
@@ -121,7 +121,7 @@ static void lm32_evr_init(MachineState *machine)
pflash_cfi02_register(flash_base, "lm32_evr.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
flash_sector_size,
- 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
+ 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
/* create irq lines */
env->pic_state = lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, cpu, 0));
@@ -218,7 +218,7 @@ static void lm32_uclinux_init(MachineState *machine)
pflash_cfi02_register(flash_base, "lm32_uclinux.flash", flash_size,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
flash_sector_size,
- 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
+ 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1);
/* create irq lines */
env->pic_state = lm32_pic_init(qemu_allocate_irq(cpu_irq_handler, env, 0));
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index 8f77887fb18..2503e033497 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -198,7 +198,7 @@ static void ref405ep_init(MachineState *machine)
pflash_cfi02_register((uint32_t)(-bios_size),
"ef405ep.bios", bios_size,
blk_by_legacy_dinfo(dinfo),
- 64 * KiB, 1,
+ 64 * KiB,
2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
} else
@@ -469,7 +469,7 @@ static void taihu_405ep_init(MachineState *machine)
pflash_cfi02_register(0xFFE00000,
"taihu_405ep.bios", bios_size,
blk_by_legacy_dinfo(dinfo),
- 64 * KiB, 1,
+ 64 * KiB,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
@@ -502,7 +502,7 @@ static void taihu_405ep_init(MachineState *machine)
bios_size = 32 * MiB;
pflash_cfi02_register(0xfc000000, "taihu_405ep.flash", bios_size,
blk_by_legacy_dinfo(dinfo),
- 64 * KiB, 1,
+ 64 * KiB,
4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA,
1);
fl_idx++;
diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
index 443820901d4..b7288dcba80 100644
--- a/hw/sh4/r2d.c
+++ b/hw/sh4/r2d.c
@@ -301,7 +301,7 @@ static void r2d_init(MachineState *machine)
dinfo = drive_get(IF_PFLASH, 0, 0);
pflash_cfi02_register(0x0, "r2d.flash", FLASH_SIZE,
dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
- 64 * KiB, 1, 2, 0x0001, 0x227e, 0x2220, 0x2200,
+ 64 * KiB, 2, 0x0001, 0x227e, 0x2220, 0x2200,
0x555, 0x2aa, 0);
/* NIC: rtl8139 on-board, and 2 slots. */
--
2.26.3
next prev parent reply other threads:[~2021-04-19 9:53 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-19 9:43 [PATCH v2 0/7] hw/misc: Add memory_region_add_subregion_aliased() helper [pflash part] Philippe Mathieu-Daudé
2021-04-19 9:43 ` [RFC PATCH v2 1/7] hw/misc: Add device to help managing aliased memory regions Philippe Mathieu-Daudé
2021-04-22 1:33 ` Richard Henderson
2021-07-06 21:24 ` Philippe Mathieu-Daudé
2021-04-19 9:43 ` [PATCH v2 2/7] hw/arm/musicpal: Open-code pflash_cfi02_register() call Philippe Mathieu-Daudé
2021-04-22 1:37 ` Richard Henderson
2021-04-19 9:43 ` [PATCH v2 3/7] hw/arm/musicpal: Map flash using memory_region_add_subregion_aliased() Philippe Mathieu-Daudé
2021-04-22 1:41 ` Richard Henderson
2021-04-19 9:43 ` [PATCH v2 4/7] hw/arm/digic: Open-code pflash_cfi02_register() call Philippe Mathieu-Daudé
2021-04-22 1:42 ` Richard Henderson
2021-04-19 9:43 ` [PATCH v2 5/7] hw/arm/digic: Map flash using memory_region_add_subregion_aliased() Philippe Mathieu-Daudé
2021-04-22 1:43 ` Richard Henderson
2021-04-19 9:43 ` [PATCH v2 6/7] hw/block/pflash_cfi02: Remove pflash_setup_mappings() Philippe Mathieu-Daudé
2021-04-22 1:47 ` Richard Henderson
2021-04-19 9:43 ` Philippe Mathieu-Daudé [this message]
2021-04-22 1:48 ` [PATCH v2 7/7] hw/block/pflash_cfi02: Simplify pflash_cfi02_register() prototype Richard Henderson
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