From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: f4bug@amsat.org, luis.pires@eldorado.org.br, qemu-ppc@nongnu.org,
lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br,
matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au
Subject: [PATCH v3 15/30] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE
Date: Thu, 29 Apr 2021 18:15:28 -0700 [thread overview]
Message-ID: <20210430011543.1017113-16-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210430011543.1017113-1-richard.henderson@linaro.org>
Remove the synthetic "exception" after no more uses.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/ppc/cpu.h | 1 -
linux-user/ppc/cpu_loop.c | 3 ---
target/ppc/translate.c | 20 +++++---------------
target/ppc/translate_init.c.inc | 4 ++--
4 files changed, 7 insertions(+), 21 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index cf10117065..9bb370abba 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -132,7 +132,6 @@ enum {
/* EOL */
POWERPC_EXCP_NB = 103,
/* QEMU exceptions: used internally during code translation */
- POWERPC_EXCP_STOP = 0x200, /* stop translation */
POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */
/* QEMU exceptions: special cases we want to stop translation */
POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */
diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c
index df71e15a25..4c308835bd 100644
--- a/linux-user/ppc/cpu_loop.c
+++ b/linux-user/ppc/cpu_loop.c
@@ -423,9 +423,6 @@ void cpu_loop(CPUPPCState *env)
cpu_abort(cs, "Maintenance exception while in user mode. "
"Aborting\n");
break;
- case POWERPC_EXCP_STOP: /* stop translation */
- /* We did invalidate the instruction cache. Go on */
- break;
case POWERPC_EXCP_BRANCH: /* branch instruction: */
/* We just stopped because of a branch. Go on */
break;
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 45cd3189c0..82fdf0bb77 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -367,13 +367,6 @@ static inline void gen_hvpriv_exception(DisasContext *ctx, uint32_t error)
gen_exception_err(ctx, POWERPC_EXCP_HV_EMU, POWERPC_EXCP_PRIV | error);
}
-/* Stop translation */
-static inline void gen_stop_exception(DisasContext *ctx)
-{
- gen_update_nip(ctx, ctx->base.pc_next);
- ctx->exception = POWERPC_EXCP_STOP;
-}
-
#define GEN_HANDLER(name, opc1, opc2, opc3, inval, type) \
GEN_OPCODE(name, opc1, opc2, opc3, inval, type, PPC_NONE)
@@ -3157,7 +3150,7 @@ static void gen_isync(DisasContext *ctx)
gen_check_tlb_flush(ctx, false);
}
tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
}
#define MEMOP_GET_SIZE(x) (1 << ((x) & MO_SIZE))
@@ -4434,7 +4427,7 @@ static void gen_mtmsrd(DisasContext *ctx)
gen_helper_store_msr(cpu_env, cpu_gpr[rS(ctx->opcode)]);
}
/* Must stop the translation as machine state (may have) changed */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
#endif /* !defined(CONFIG_USER_ONLY) */
}
#endif /* defined(TARGET_PPC64) */
@@ -4477,7 +4470,7 @@ static void gen_mtmsr(DisasContext *ctx)
tcg_temp_free(msr);
}
/* Must stop the translation as machine state (may have) changed */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
#endif
}
@@ -6614,7 +6607,7 @@ static void gen_wrtee(DisasContext *ctx)
* Stop translation to have a chance to raise an exception if we
* just set msr_ee to 1
*/
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
#endif /* defined(CONFIG_USER_ONLY) */
}
@@ -6628,7 +6621,7 @@ static void gen_wrteei(DisasContext *ctx)
if (ctx->opcode & 0x00008000) {
tcg_gen_ori_tl(cpu_msr, cpu_msr, (1 << MSR_EE));
/* Stop translation to have a chance to raise an exception */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
} else {
tcg_gen_andi_tl(cpu_msr, cpu_msr, ~(1 << MSR_EE));
}
@@ -8083,9 +8076,6 @@ static void ppc_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
case POWERPC_EXCP_BRANCH:
ctx->base.is_jmp = DISAS_NORETURN;
break;
- case POWERPC_EXCP_STOP:
- ctx->base.is_jmp = DISAS_EXIT;
- break;
default:
/* Every other ctx->exception should have set NORETURN. */
g_assert_not_reached();
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index 9af3fb2066..f3e79b8685 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -463,7 +463,7 @@ static void spr_write_hid0_601(DisasContext *ctx, int sprn, int gprn)
{
gen_helper_store_hid0_601(cpu_env, cpu_gpr[gprn]);
/* Must stop the translation as endianness may have changed */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
}
#endif
@@ -511,7 +511,7 @@ static void spr_write_40x_dbcr0(DisasContext *ctx, int sprn, int gprn)
gen_store_spr(sprn, cpu_gpr[gprn]);
gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]);
/* We must stop translation as we may have rebooted */
- gen_stop_exception(ctx);
+ ctx->base.is_jmp = DISAS_EXIT_UPDATE;
}
static void spr_write_40x_sler(DisasContext *ctx, int sprn, int gprn)
--
2.25.1
next prev parent reply other threads:[~2021-04-30 1:36 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-30 1:15 [PATCH v3 00/30] Base for adding PowerPC 64-bit instructions Richard Henderson
2021-04-30 1:15 ` [PATCH v3 01/30] decodetree: Introduce whex and whexC helpers Richard Henderson
2021-04-30 13:01 ` Luis Fernando Fujita Pires
2021-05-03 22:32 ` Philippe Mathieu-Daudé
2021-04-30 1:15 ` [PATCH v3 02/30] decodetree: More use of f-strings Richard Henderson
2021-04-30 13:01 ` Luis Fernando Fujita Pires
2021-05-03 22:33 ` Philippe Mathieu-Daudé
2021-04-30 1:15 ` [PATCH v3 03/30] decodetree: Add support for 64-bit instructions Richard Henderson
2021-04-30 13:03 ` Luis Fernando Fujita Pires
2021-04-30 1:15 ` [PATCH v3 04/30] decodetree: Extend argument set syntax to allow types Richard Henderson
2021-04-30 13:29 ` Luis Fernando Fujita Pires
2021-04-30 1:15 ` [PATCH v3 05/30] target/ppc: Add cia field to DisasContext Richard Henderson
2021-04-30 20:08 ` Bruno Piazera Larsen
2021-04-30 20:35 ` Luis Fernando Fujita Pires
2021-04-30 1:15 ` [PATCH v3 06/30] target/ppc: Split out decode_legacy Richard Henderson
2021-04-30 20:36 ` Luis Fernando Fujita Pires
2021-04-30 1:15 ` [PATCH v3 07/30] target/ppc: Move DISAS_NORETURN setting into gen_exception* Richard Henderson
2021-05-03 12:58 ` Luis Fernando Fujita Pires
2021-04-30 1:15 ` [PATCH v3 08/30] target/ppc: Remove special case for POWERPC_SYSCALL Richard Henderson
2021-05-03 12:59 ` Luis Fernando Fujita Pires
2021-04-30 1:15 ` [PATCH v3 09/30] target/ppc: Remove special case for POWERPC_EXCP_TRAP Richard Henderson
2021-05-03 13:00 ` Luis Fernando Fujita Pires
2021-04-30 1:15 ` [PATCH v3 10/30] target/ppc: Simplify gen_debug_exception Richard Henderson
2021-04-30 1:15 ` [PATCH v3 11/30] target/ppc: Introduce DISAS_{EXIT,CHAIN}{,_UPDATE} Richard Henderson
2021-04-30 1:15 ` [PATCH v3 12/30] target/ppc: Replace POWERPC_EXCP_SYNC with DISAS_EXIT Richard Henderson
2021-04-30 1:15 ` [PATCH v3 13/30] target/ppc: Remove unnecessary gen_io_end calls Richard Henderson
2021-04-30 1:15 ` [PATCH v3 14/30] target/ppc: Introduce gen_icount_io_start Richard Henderson
2021-04-30 1:15 ` Richard Henderson [this message]
2021-04-30 1:15 ` [PATCH v3 16/30] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN Richard Henderson
2021-04-30 1:15 ` [PATCH v3 17/30] target/ppc: Remove DisasContext.exception Richard Henderson
2021-04-30 13:00 ` Matheus K. Ferst
2021-04-30 1:15 ` [PATCH v3 18/30] target/ppc: Move single-step check to ppc_tr_tb_stop Richard Henderson
2021-04-30 1:15 ` [PATCH v3 19/30] target/ppc: Tidy exception vs exit_tb Richard Henderson
2021-04-30 1:15 ` [PATCH v3 20/30] target/ppc: Mark helper_raise_exception* as noreturn Richard Henderson
2021-05-03 22:36 ` Philippe Mathieu-Daudé
2021-04-30 1:15 ` [PATCH v3 21/30] target/ppc: Use translator_loop_temp_check Richard Henderson
2021-04-30 1:15 ` [PATCH v3 22/30] target/ppc: Introduce macros to check isa extensions Richard Henderson
2021-05-03 22:37 ` Philippe Mathieu-Daudé
2021-04-30 1:15 ` [PATCH v3 23/30] target/ppc: Add infrastructure for prefixed insns Richard Henderson
2021-04-30 1:15 ` [PATCH v3 24/30] target/ppc: Move page crossing check to ppc_tr_translate_insn Richard Henderson
2021-04-30 1:26 ` Richard Henderson
2021-04-30 1:15 ` [PATCH v3 25/30] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI Richard Henderson
2021-04-30 11:23 ` Luis Fernando Fujita Pires
2021-04-30 14:23 ` Richard Henderson
2021-04-30 18:45 ` Luis Fernando Fujita Pires
2021-04-30 19:11 ` Richard Henderson
2021-04-30 20:32 ` Luis Fernando Fujita Pires
2021-04-30 22:29 ` Richard Henderson
2021-04-30 14:05 ` Matheus K. Ferst
2021-04-30 14:31 ` Richard Henderson
2021-04-30 18:02 ` Matheus K. Ferst
2021-04-30 18:43 ` Richard Henderson
2021-04-30 23:29 ` Matheus K. Ferst
2021-04-30 1:15 ` [PATCH v3 26/30] target/ppc: Implement PNOP Richard Henderson
2021-05-03 22:41 ` Philippe Mathieu-Daudé
2021-04-30 1:15 ` [PATCH v3 27/30] target/ppc: Move D/DS/X-form integer loads to decodetree Richard Henderson
2021-04-30 23:54 ` Matheus K. Ferst
2021-05-01 0:50 ` Richard Henderson
2021-05-03 12:28 ` Matheus K. Ferst
2021-04-30 1:15 ` [PATCH v3 28/30] target/ppc: Implement prefixed integer load instructions Richard Henderson
2021-04-30 1:15 ` [PATCH v3 29/30] target/ppc: Move D/DS/X-form integer stores to decodetree Richard Henderson
2021-04-30 1:15 ` [PATCH v3 30/30] target/ppc: Implement prefixed integer store instructions Richard Henderson
2021-04-30 1:48 ` [PATCH v3 00/30] Base for adding PowerPC 64-bit instructions no-reply
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