qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Yang Zhong <yang.zhong@intel.com>
To: qemu-devel@nongnu.org
Cc: yang.zhong@intel.com, pbonzini@redhat.com, kai.huang@intel.com,
	seanjc@google.com
Subject: [PATCH v2 28/32] bitops: Support 32 and 64 bit mask macro
Date: Tue, 11 May 2021 14:20:47 +0800	[thread overview]
Message-ID: <20210511062051.41948-29-yang.zhong@intel.com> (raw)
In-Reply-To: <20210511062051.41948-1-yang.zhong@intel.com>

The Qemu should enable bit mask macro like Linux did in the
kernel, the GENMASK(h, l) and GENMASK_ULL(h, l) will set the
bit to 1 from l to h bit in the 32 bit or 64 bit long type.

Signed-off-by: Yang Zhong <yang.zhong@intel.com>
---
 include/qemu/bitops.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index 3acbf3384c..8678c8dcd5 100644
--- a/include/qemu/bitops.h
+++ b/include/qemu/bitops.h
@@ -18,6 +18,7 @@
 
 #define BITS_PER_BYTE           CHAR_BIT
 #define BITS_PER_LONG           (sizeof (unsigned long) * BITS_PER_BYTE)
+#define BITS_PER_LONG_LONG       64
 
 #define BIT(nr)                 (1UL << (nr))
 #define BIT_ULL(nr)             (1ULL << (nr))
@@ -28,6 +29,12 @@
 #define MAKE_64BIT_MASK(shift, length) \
     (((~0ULL) >> (64 - (length))) << (shift))
 
+#define GENMASK(h, l) \
+    (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
+
+#define GENMASK_ULL(h, l) \
+    (((~0ULL) << (l)) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
+
 /**
  * set_bit - Set a bit in memory
  * @nr: the bit to set
-- 
2.29.2.334.gfaefdd61ec



  parent reply	other threads:[~2021-05-11  6:52 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-11  6:20 [PATCH v2 00/32] Qemu SGX virtualization Yang Zhong
2021-05-11  6:20 ` [PATCH v2 01/32] memory: Add RAM_PROTECTED flag to skip IOMMU mappings Yang Zhong
2021-05-11  6:20 ` [PATCH v2 02/32] hostmem: Add hostmem-epc as a backend for SGX EPC Yang Zhong
2021-05-11  6:20 ` [PATCH v2 03/32] qom: Add memory-backend-epc ObjectOptions support Yang Zhong
2021-05-11  6:20 ` [PATCH v2 04/32] i386: Add 'sgx-epc' device to expose EPC sections to guest Yang Zhong
2021-05-11  6:20 ` [PATCH v2 05/32] vl: Add "sgx-epc" option to expose SGX " Yang Zhong
2021-05-11  6:20 ` [PATCH v2 06/32] i386: Add primary SGX CPUID and MSR defines Yang Zhong
2021-05-11  6:20 ` [PATCH v2 07/32] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX Yang Zhong
2021-05-11  6:20 ` [PATCH v2 08/32] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX Yang Zhong
2021-05-11  6:20 ` [PATCH v2 09/32] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX Yang Zhong
2021-05-11  6:20 ` [PATCH v2 10/32] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs Yang Zhong
2021-05-11  6:20 ` [PATCH v2 11/32] i386: Add feature control MSR dependency when SGX is enabled Yang Zhong
2021-05-11  6:20 ` [PATCH v2 12/32] i386: Update SGX CPUID info according to hardware/KVM/user input Yang Zhong
2021-05-11  6:20 ` [PATCH v2 13/32] linux-headers: Add placeholder for KVM_CAP_SGX_ATTRIBUTE Yang Zhong
2021-05-11  6:20 ` [PATCH v2 14/32] i386: kvm: Add support for exposing PROVISIONKEY to guest Yang Zhong
2021-05-11  6:20 ` [PATCH v2 15/32] i386: Propagate SGX CPUID sub-leafs to KVM Yang Zhong
2021-05-11  6:20 ` [PATCH v2 16/32] Adjust min CPUID level to 0x12 when SGX is enabled Yang Zhong
2021-05-11  6:20 ` [PATCH v2 17/32] hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly Yang Zhong
2021-05-11  6:20 ` [PATCH v2 18/32] hw/i386/pc: Account for SGX EPC sections when calculating device memory Yang Zhong
2021-05-11  6:20 ` [PATCH v2 19/32] i386/pc: Add e820 entry for SGX EPC section(s) Yang Zhong
2021-05-11  6:20 ` [PATCH v2 20/32] i386: acpi: Add SGX EPC entry to ACPI tables Yang Zhong
2021-05-11  6:20 ` [PATCH v2 21/32] q35: Add support for SGX EPC Yang Zhong
2021-05-11  6:20 ` [PATCH v2 22/32] i440fx: " Yang Zhong
2021-05-11  6:20 ` [PATCH v2 23/32] hostmem: Add the reset interface for EPC backend reset Yang Zhong
2021-05-11  6:20 ` [PATCH v2 24/32] sgx-epc: Add the reset interface for sgx-epc virt device Yang Zhong
2021-05-11  6:20 ` [PATCH v2 25/32] qmp: Add query-sgx command Yang Zhong
2021-05-11  6:20 ` [PATCH v2 26/32] hmp: Add 'info sgx' command Yang Zhong
2021-05-11  6:20 ` [PATCH v2 27/32] i386: Add sgx_get_info() interface Yang Zhong
2021-05-11  6:20 ` Yang Zhong [this message]
2021-05-11  6:20 ` [PATCH v2 29/32] qmp: Add the qmp_query_sgx_capabilities() Yang Zhong
2021-05-11  6:20 ` [PATCH v2 30/32] Kconfig: Add CONFIG_SGX support Yang Zhong
2021-05-11  6:20 ` [PATCH v2 31/32] sgx-epc: Add the fill_device_info() callback support Yang Zhong
2021-05-11  6:20 ` [PATCH v2 32/32] doc: Add the SGX doc Yang Zhong

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210511062051.41948-29-yang.zhong@intel.com \
    --to=yang.zhong@intel.com \
    --cc=kai.huang@intel.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=seanjc@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).