From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Wainer dos Santos Moschetta" <wainersm@redhat.com>,
"Cleber Rosa" <crosa@redhat.com>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH 2/5] hw/pci-host/bonito: Trace PCI config accesses smaller than 32-bit
Date: Thu, 24 Jun 2021 22:27:44 +0200 [thread overview]
Message-ID: <20210624202747.1433023-3-f4bug@amsat.org> (raw)
In-Reply-To: <20210624202747.1433023-1-f4bug@amsat.org>
Per the datasheet section "5.7.5. Accessing PCI configuration space"
the address must be 32-bit aligned. Trace eventual accesses not
aligned to 32-bit.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/pci-host/bonito.c | 8 ++++++++
hw/pci-host/trace-events | 3 +++
2 files changed, 11 insertions(+)
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index afb3d1f81d5..751fdcec689 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -52,6 +52,7 @@
#include "hw/misc/unimp.h"
#include "hw/registerfields.h"
#include "qom/object.h"
+#include "trace.h"
/* #define DEBUG_BONITO */
@@ -185,6 +186,7 @@ FIELD(BONGENCFG, PCIQUEUE, 12, 1)
#define BONITO_PCICONF_IDSEL_OFFSET 11
#define BONITO_PCICONF_FUN_MASK 0x700 /* [10:8] */
#define BONITO_PCICONF_FUN_OFFSET 8
+#define BONITO_PCICONF_REG_MASK_DS (~3) /* Per datasheet */
#define BONITO_PCICONF_REG_MASK 0xFC
#define BONITO_PCICONF_REG_OFFSET 0
@@ -495,6 +497,9 @@ static void bonito_spciconf_write(void *opaque, hwaddr addr, uint64_t val,
if (pciaddr == 0xffffffff) {
return;
}
+ if (addr & ~BONITO_PCICONF_REG_MASK_DS) {
+ trace_bonito_spciconf_small_access(addr, size);
+ }
/* set the pci address in s->config_reg */
phb->config_reg = (pciaddr) | (1u << 31);
@@ -521,6 +526,9 @@ static uint64_t bonito_spciconf_read(void *opaque, hwaddr addr, unsigned size)
if (pciaddr == 0xffffffff) {
return MAKE_64BIT_MASK(0, size * 8);
}
+ if (addr & ~BONITO_PCICONF_REG_MASK_DS) {
+ trace_bonito_spciconf_small_access(addr, size);
+ }
/* set the pci address in s->config_reg */
phb->config_reg = (pciaddr) | (1u << 31);
diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events
index f4b3a50cb0b..630e9fcc5e7 100644
--- a/hw/pci-host/trace-events
+++ b/hw/pci-host/trace-events
@@ -1,5 +1,8 @@
# See docs/devel/tracing.rst for syntax documentation.
+# bonito.c
+bonito_spciconf_small_access(uint64_t addr, unsigned size) "PCI config address is smaller then 32-bit, addr: 0x%"PRIx64", size: %u"
+
# grackle.c
grackle_set_irq(int irq_num, int level) "set_irq num %d level %d"
--
2.31.1
next prev parent reply other threads:[~2021-06-24 20:34 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-24 20:27 [PATCH 0/5] hw/mips: Fix the Fuloong 2E machine with PMON bios Philippe Mathieu-Daudé
2021-06-24 20:27 ` [PATCH 1/5] hw/isa/vt82c686: Replace magic numbers by definitions Philippe Mathieu-Daudé
2021-06-24 21:02 ` BALATON Zoltan
2021-06-24 20:27 ` Philippe Mathieu-Daudé [this message]
2021-06-24 20:27 ` [PATCH 3/5] hw/pci-host/bonito: Allow PCI config accesses smaller than 32-bit Philippe Mathieu-Daudé
2021-06-24 20:49 ` BALATON Zoltan
2021-06-29 4:54 ` Philippe Mathieu-Daudé
2021-06-24 20:27 ` [PATCH 4/5] tests/acceptance: Test Linux on the Fuloong 2E machine Philippe Mathieu-Daudé
2021-06-28 19:21 ` Wainer dos Santos Moschetta
2021-06-24 20:27 ` [PATCH 5/5] tests/acceptance: Test PMON " Philippe Mathieu-Daudé
2021-06-24 20:43 ` BALATON Zoltan
2021-06-29 4:51 ` Philippe Mathieu-Daudé
2021-06-29 10:47 ` BALATON Zoltan
2021-06-29 11:30 ` Philippe Mathieu-Daudé
2021-06-29 12:08 ` BALATON Zoltan
2021-06-28 19:38 ` Wainer dos Santos Moschetta
2021-07-01 21:49 ` [PATCH 0/5] hw/mips: Fix the Fuloong 2E machine with PMON bios Philippe Mathieu-Daudé
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