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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, mark.cave-ayland@ilande.co.uk,
	alex.bennee@linaro.org, f4bug@amsat.org
Subject: [PATCH 07/17] accel/tcg: Reduce CF_COUNT_MASK to match TCG_MAX_INSNS
Date: Thu,  1 Jul 2021 08:25:27 -0700	[thread overview]
Message-ID: <20210701152537.3330420-8-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210701152537.3330420-1-richard.henderson@linaro.org>

The space reserved for CF_COUNT_MASK was overly large.
Reduce to free up cflags bits and eliminate an extra test.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/exec-all.h   | 4 +++-
 accel/tcg/translate-all.c | 5 ++---
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 754f4130c9..dfe82ed19c 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -492,7 +492,9 @@ struct TranslationBlock {
     target_ulong cs_base; /* CS base for this block */
     uint32_t flags; /* flags defining in which context the code was generated */
     uint32_t cflags;    /* compile flags */
-#define CF_COUNT_MASK  0x00007fff
+
+/* Note that TCG_MAX_INSNS is 512; we validate this match elsewhere. */
+#define CF_COUNT_MASK  0x000001ff
 #define CF_LAST_IO     0x00008000 /* Last insn may be an IO access.  */
 #define CF_MEMI_ONLY   0x00010000 /* Only instrument memory ops */
 #define CF_USE_ICOUNT  0x00020000
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 7929a7e320..d0177d772d 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1435,9 +1435,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
     if (max_insns == 0) {
         max_insns = CF_COUNT_MASK;
     }
-    if (max_insns > TCG_MAX_INSNS) {
-        max_insns = TCG_MAX_INSNS;
-    }
+    QEMU_BUILD_BUG_ON(CF_COUNT_MASK + 1 != TCG_MAX_INSNS);
+
     if (cpu->singlestep_enabled || singlestep) {
         max_insns = 1;
     }
-- 
2.25.1



  parent reply	other threads:[~2021-07-01 15:32 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-01 15:25 [PATCH 00/17] tcg: breakpoint reorg Richard Henderson
2021-07-01 15:25 ` [PATCH 01/17] target/i386: Use cpu_breakpoint_test in breakpoint_handler Richard Henderson
2021-07-01 15:25 ` [PATCH 02/17] accel/tcg: Move helper_lookup_tb_ptr to cpu-exec.c Richard Henderson
2021-07-01 16:33   ` Philippe Mathieu-Daudé
2021-07-01 15:25 ` [PATCH 03/17] accel/tcg: Move tb_lookup " Richard Henderson
2021-07-01 16:34   ` Philippe Mathieu-Daudé
2021-07-01 15:25 ` [PATCH 04/17] accel/tcg: Split out log_cpu_exec Richard Henderson
2021-07-01 15:25 ` [PATCH 05/17] accel/tcg: Log tb->cflags with -d exec Richard Henderson
2021-07-01 16:36   ` Philippe Mathieu-Daudé
2021-07-01 15:25 ` [PATCH 06/17] tcg: Remove TCG_TARGET_HAS_goto_ptr Richard Henderson
2021-07-01 16:37   ` Philippe Mathieu-Daudé
2021-07-01 15:25 ` Richard Henderson [this message]
2021-07-01 15:25 ` [PATCH 08/17] accel/tcg: Move curr_cflags into cpu-exec.c Richard Henderson
2021-07-01 15:25 ` [PATCH 09/17] accel/tcg: Add CF_NO_GOTO_TB and CF_NO_GOTO_PTR Richard Henderson
2021-07-01 15:25 ` [PATCH 10/17] accel/tcg: Drop CF_NO_GOTO_PTR from -d nochain Richard Henderson
2021-07-01 15:25 ` [PATCH 11/17] accel/tcg: Handle -singlestep in curr_cflags Richard Henderson
2021-07-01 15:25 ` [PATCH 12/17] accel/tcg: Use CF_NO_GOTO_{TB, PTR} in cpu_exec_step_atomic Richard Henderson
2021-07-01 15:25 ` [PATCH 13/17] accel/tcg: Move cflags lookup into tb_find Richard Henderson
2021-07-01 15:25 ` [PATCH 14/17] accel/tcg: Adjust interface of TranslatorOps.breakpoint_check Richard Henderson
2021-07-01 15:25 ` [PATCH 15/17] accel/tcg: Hoist tb_cflags to a local in translator_loop Richard Henderson
2021-07-01 15:25 ` [PATCH 16/17] accel/tcg: Encode breakpoint info into tb->cflags Richard Henderson
2021-07-01 15:25 ` [PATCH 17/17] cpu: Add breakpoint tracepoints Richard Henderson
2021-07-01 16:43   ` Philippe Mathieu-Daudé
2021-07-03  7:00 ` [PATCH 00/17] tcg: breakpoint reorg Mark Cave-Ayland

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