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Fri, 27 Aug 2021 07:49:50 -0700 (PDT) Received: from mail.google.com ([141.164.41.4]) by smtp.gmail.com with ESMTPSA id c133sm6780054pfb.39.2021.08.27.07.49.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Aug 2021 07:49:50 -0700 (PDT) Date: Fri, 27 Aug 2021 22:49:38 +0800 From: Changbin Du To: Peter Maydell Subject: Re: [PATCH 0/3] gdbstub: add support for switchable endianness Message-ID: <20210827144938.72astzvxxy3igpn4@mail.google.com> References: <20210823142004.17935-1-changbin.du@gmail.com> <7523c6ad-52cd-0b20-b09d-01bd537edbb3@redhat.com> <20210823230535.js3gymomh2chmznc@mail.google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=changbin.du@gmail.com; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V" , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Bin Meng , QEMU Developers , qemu-arm , Alistair Francis , Paolo Bonzini , Alex =?utf-8?Q?Benn=C3=A9e?= , Palmer Dabbelt , Changbin Du Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Tue, Aug 24, 2021 at 10:11:14AM +0100, Peter Maydell wrote: > On Tue, 24 Aug 2021 at 00:05, Changbin Du wrote: > > > > On Mon, Aug 23, 2021 at 04:30:05PM +0100, Peter Maydell wrote: > > > changes to be more capable of handling dynamic target changes > > > (this would also help with eg debugging across 32<->64 bit switches); > > > as I understand it that gdb work would be pretty significant, > > > and at least for aarch64 pretty much nobody cares about > > > big-endian, so nobody's got round to doing it yet. > > > > > Mostly we do not care dynamic target changes because nearly all OS will setup > > endianness mode by its first instruction. And dynamic changes for gdb is hard > > since the byte order of debugging info in elf is fixed. And currently the GDB > > remote protocol does not support querying endianness info from remote. > > > > So usually we needn't change byte order during a debug session, but we just want > > the qemu gdbstub can send data in and handle data it received in right byte order. > > This patch does this work with the help of users via the option 'endianness='. > > I'm not a huge fan of putting in workarounds that deal with the > problem for specific cases and require users to tweak options settings, > rather than solving the problem in a more general way that would > let it all Just Work for all cases. > Probably we can add a new callback 'gdb_get_endianness' for CPUClass, and use this callback to determine if bswap is needed every time we read/write cpu registers. What's your thought? > -- PMM -- Cheers, Changbin Du