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From: Anup Patel <anup.patel@wdc.com>
To: Peter Maydell <peter.maydell@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Atish Patra <atish.patra@wdc.com>,
	Anup Patel <anup.patel@wdc.com>,
	qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
	Anup Patel <anup@brainfault.org>
Subject: [PATCH v2 01/22] target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-mode
Date: Thu,  2 Sep 2021 16:54:59 +0530	[thread overview]
Message-ID: <20210902112520.475901-2-anup.patel@wdc.com> (raw)
In-Reply-To: <20210902112520.475901-1-anup.patel@wdc.com>

We should be returning illegal instruction trap when RV64 HS-mode tries
to access RV32 HS-mode CSR.

Fixes: d6f20dacea51 ("target/riscv: Fix 32-bit HS mode access permissions")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
---
 target/riscv/csr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 50a2c3a3b4..1f13d1042d 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -181,7 +181,7 @@ static RISCVException hmode(CPURISCVState *env, int csrno)
 static RISCVException hmode32(CPURISCVState *env, int csrno)
 {
     if (!riscv_cpu_is_32bit(env)) {
-        if (riscv_cpu_virt_enabled(env)) {
+        if (!riscv_cpu_virt_enabled(env)) {
             return RISCV_EXCP_ILLEGAL_INST;
         } else {
             return RISCV_EXCP_VIRT_INSTRUCTION_FAULT;
-- 
2.25.1



  reply	other threads:[~2021-09-02 11:37 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-02 11:24 [PATCH v2 00/22] QEMU RISC-V AIA support Anup Patel
2021-09-02 11:24 ` Anup Patel [this message]
2021-09-03  3:32   ` [PATCH v2 01/22] target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-mode Alistair Francis
2021-09-02 11:25 ` [PATCH v2 02/22] target/riscv: Implement SGEIP bit in hip and hie CSRs Anup Patel
2021-09-15  1:03   ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 03/22] target/riscv: Implement hgeie and hgeip CSRs Anup Patel
2021-09-15  2:41   ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 04/22] target/riscv: Improve fidelity of guest external interrupts Anup Patel
2021-09-09  6:44   ` Alistair Francis
2021-09-09 16:35     ` Bin Meng
2021-09-13 16:33     ` Anup Patel
2021-09-15  0:49       ` Alistair Francis
2021-09-16 13:42         ` Anup Patel
2021-10-15  6:24           ` Alistair Francis
2021-10-18 12:55             ` Anup Patel
2021-10-18 22:55               ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 05/22] target/riscv: Allow setting CPU feature from machine/device emulation Anup Patel
2021-09-04 15:12   ` Bin Meng
2021-10-21 17:06     ` Anup Patel
2021-09-06  5:33   ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 06/22] target/riscv: Add AIA cpu feature Anup Patel
2021-09-04 15:13   ` Bin Meng
2021-09-06  5:33   ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 07/22] target/riscv: Add defines for AIA CSRs Anup Patel
2021-09-02 11:25 ` [PATCH v2 08/22] target/riscv: Allow AIA device emulation to set ireg rmw callback Anup Patel
2021-09-02 11:25 ` [PATCH v2 09/22] target/riscv: Implement AIA local interrupt priorities Anup Patel
2021-09-02 11:25 ` [PATCH v2 10/22] target/riscv: Implement AIA CSRs for 64 local interrupts on RV32 Anup Patel
2021-09-02 11:25 ` [PATCH v2 11/22] target/riscv: Implement AIA hvictl and hviprioX CSRs Anup Patel
2021-09-02 11:25 ` [PATCH v2 12/22] target/riscv: Implement AIA interrupt filtering CSRs Anup Patel
2021-09-02 11:25 ` [PATCH v2 13/22] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs Anup Patel
2021-09-02 11:25 ` [PATCH v2 14/22] target/riscv: Implement AIA xiselect and xireg CSRs Anup Patel
2021-09-02 11:25 ` [PATCH v2 15/22] target/riscv: Implement AIA IMSIC interface CSRs Anup Patel
2021-09-02 11:25 ` [PATCH v2 16/22] hw/riscv: virt: Use AIA INTC compatible string when available Anup Patel
2021-09-15  1:17   ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 17/22] target/riscv: Allow users to force enable AIA CSRs in HART Anup Patel
2021-09-15  1:16   ` Alistair Francis
2021-09-02 11:25 ` [PATCH v2 18/22] hw/intc: Add RISC-V AIA APLIC device emulation Anup Patel
2021-09-02 11:25 ` [PATCH v2 19/22] hw/riscv: virt: Add optional AIA APLIC support to virt machine Anup Patel
2021-09-02 11:25 ` [PATCH v2 20/22] hw/intc: Add RISC-V AIA IMSIC device emulation Anup Patel
2021-09-02 11:25 ` [PATCH v2 21/22] hw/riscv: virt: Add optional AIA IMSIC support to virt machine Anup Patel
2021-09-02 11:25 ` [PATCH v2 22/22] docs/system: riscv: Document AIA options for " Anup Patel
2021-09-09  6:51   ` Alistair Francis
2021-09-04 13:51 ` [PATCH v2 00/22] QEMU RISC-V AIA support Bin Meng
2021-09-04 15:33   ` Anup Patel

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