From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Yoshinori Sato" <ysato@users.sourceforge.jp>
Subject: [PATCH v3 26/30] target/sh4: Restrict has_work() handler to sysemu and TCG
Date: Fri, 3 Sep 2021 20:13:08 +0200 [thread overview]
Message-ID: <20210903181308.761050-1-f4bug@amsat.org> (raw)
In-Reply-To: <20210902161543.417092-1-f4bug@amsat.org>
Restrict has_work() to TCG sysemu.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/sh4/cpu.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index 2047742d03c..6c47d28631c 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -58,12 +58,15 @@ static bool superh_io_recompile_replay_branch(CPUState *cs,
}
return false;
}
-#endif
+#if defined(CONFIG_TCG)
static bool superh_cpu_has_work(CPUState *cs)
{
return cs->interrupt_request & CPU_INTERRUPT_HARD;
}
+#endif /* CONFIG_TCG */
+
+#endif /* !CONFIG_USER_ONLY */
static void superh_cpu_reset(DeviceState *dev)
{
@@ -239,6 +242,7 @@ static const struct TCGCPUOps superh_tcg_ops = {
.tlb_fill = superh_cpu_tlb_fill,
#ifndef CONFIG_USER_ONLY
+ .has_work = superh_cpu_has_work,
.cpu_exec_interrupt = superh_cpu_exec_interrupt,
.do_interrupt = superh_cpu_do_interrupt,
.do_unaligned_access = superh_cpu_do_unaligned_access,
@@ -258,7 +262,6 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_reset(dc, superh_cpu_reset, &scc->parent_reset);
cc->class_by_name = superh_cpu_class_by_name;
- cc->has_work = superh_cpu_has_work;
cc->dump_state = superh_cpu_dump_state;
cc->set_pc = superh_cpu_set_pc;
cc->gdb_read_register = superh_cpu_gdb_read_register;
--
2.31.1
next prev parent reply other threads:[~2021-09-03 18:19 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-02 16:15 [PATCH v3 00/30] accel: Move has_work() from SysemuCPUOps to AccelOpsClass Philippe Mathieu-Daudé
2021-09-02 16:15 ` [PATCH v3 01/30] accel/tcg: Restrict cpu_handle_halt() to sysemu Philippe Mathieu-Daudé
2021-09-03 19:31 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 02/30] hw/core: Restrict cpu_has_work() " Philippe Mathieu-Daudé
2021-09-03 20:11 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 03/30] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-03 20:11 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 04/30] sysemu: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-03 20:14 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 05/30] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-03 20:15 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 06/30] accel/whpx: " Philippe Mathieu-Daudé
2021-09-03 20:16 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 07/30] accel/tcg: Implement AccelOpsClass::has_work() as stub Philippe Mathieu-Daudé
2021-09-03 20:17 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 08/30] target/alpha: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-03 20:18 ` Richard Henderson
2021-09-03 20:34 ` Philippe Mathieu-Daudé
2021-09-03 20:38 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 09/30] target/arm: " Philippe Mathieu-Daudé
2021-09-03 20:19 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 10/30] target/avr: " Philippe Mathieu-Daudé
2021-09-03 20:20 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 11/30] target/cris: " Philippe Mathieu-Daudé
2021-09-03 20:21 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 12/30] target/hexagon: Remove unused has_work() handler Philippe Mathieu-Daudé
2021-09-03 20:21 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 13/30] target/hppa: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-03 20:22 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 14/30] target/i386: " Philippe Mathieu-Daudé
2021-09-03 20:23 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 15/30] target/m68k: " Philippe Mathieu-Daudé
2021-09-03 20:24 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 16/30] target/microblaze: " Philippe Mathieu-Daudé
2021-09-03 20:25 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 17/30] target/mips: " Philippe Mathieu-Daudé
2021-09-03 20:26 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 18/30] target/nios2: " Philippe Mathieu-Daudé
2021-09-03 20:31 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 19/30] target/openrisc: " Philippe Mathieu-Daudé
2021-09-03 20:31 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 20/30] target/ppc: " Philippe Mathieu-Daudé
2021-09-03 0:49 ` David Gibson
2021-09-03 20:43 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 21/30] target/ppc: Introduce PowerPCCPUClass::has_work() Philippe Mathieu-Daudé
2021-09-03 0:50 ` David Gibson
2021-09-03 20:38 ` Philippe Mathieu-Daudé
2021-09-03 20:42 ` Richard Henderson
2021-09-03 21:11 ` Philippe Mathieu-Daudé
2021-09-11 22:31 ` Philippe Mathieu-Daudé
2021-09-12 12:31 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 22/30] target/ppc: Simplify has_work() handlers Philippe Mathieu-Daudé
2021-09-03 20:43 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 23/30] target/riscv: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-03 20:43 ` Richard Henderson
2021-09-02 16:15 ` [PATCH v3 24/30] target/rx: " Philippe Mathieu-Daudé
2021-09-03 20:44 ` Richard Henderson
2021-09-03 17:55 ` [PATCH v3 25/30] target/s390x: " Philippe Mathieu-Daudé
2021-09-03 20:44 ` Richard Henderson
2021-09-03 18:13 ` Philippe Mathieu-Daudé [this message]
2021-09-03 20:45 ` [PATCH v3 26/30] target/sh4: " Richard Henderson
2021-09-03 18:14 ` [PATCH v3 27/30] target/sparc: " Philippe Mathieu-Daudé
2021-09-03 20:46 ` Richard Henderson
2021-09-03 18:14 ` [PATCH v3 28/30] target/tricore: " Philippe Mathieu-Daudé
2021-09-03 20:46 ` Richard Henderson
2021-09-03 18:15 ` [PATCH v3 29/30] target/xtensa: " Philippe Mathieu-Daudé
2021-09-03 20:47 ` Richard Henderson
2021-09-03 18:19 ` [PATCH v3 30/30] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one Philippe Mathieu-Daudé
2021-09-03 20:48 ` Richard Henderson
2021-09-06 6:48 ` Paul Durrant
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210903181308.761050-1-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=ysato@users.sourceforge.jp \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).