From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"David Gibson" <david@gibson.dropbear.id.au>
Subject: [PATCH v4 20/30] target/ppc: Introduce PowerPCCPUClass::has_work()
Date: Sun, 12 Sep 2021 19:27:21 +0200 [thread overview]
Message-ID: <20210912172731.789788-21-f4bug@amsat.org> (raw)
In-Reply-To: <20210912172731.789788-1-f4bug@amsat.org>
We're moving the hook from CPUState to TCGCPUOps. TCGCPUOps is
a const structure, so to avoid creating multiple versions of
the same structure, simply changing the has_work() handler,
introduce yet another indirection with a has_work() handler in
PowerPCCPUClass, and ppc_cpu_has_work() method which dispatch
to it.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/ppc/cpu-qom.h | 1 +
target/ppc/cpu_init.c | 23 ++++++++++++++---------
2 files changed, 15 insertions(+), 9 deletions(-)
diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
index 5800fa324e8..36110112506 100644
--- a/target/ppc/cpu-qom.h
+++ b/target/ppc/cpu-qom.h
@@ -188,6 +188,7 @@ struct PowerPCCPUClass {
uint32_t flags;
int bfd_mach;
uint32_t l1_dcache_size, l1_icache_size;
+ bool (*has_work)(CPUState *cpu);
#ifndef CONFIG_USER_ONLY
unsigned int gdb_num_sprs;
const char *gdb_spr_xml;
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 6aad01d1d3a..2f7d262b176 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7621,7 +7621,6 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
- CPUClass *cc = CPU_CLASS(oc);
dc->fw_name = "PowerPC,POWER7";
dc->desc = "POWER7";
@@ -7630,7 +7629,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
pcc->pcr_supported = PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
pcc->init_proc = init_proc_POWER7;
pcc->check_pow = check_pow_nocheck;
- cc->has_work = cpu_has_work_POWER7;
+ pcc->has_work = cpu_has_work_POWER7;
pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
@@ -7789,7 +7788,6 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
- CPUClass *cc = CPU_CLASS(oc);
dc->fw_name = "PowerPC,POWER8";
dc->desc = "POWER8";
@@ -7798,7 +7796,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
pcc->pcr_supported = PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
pcc->init_proc = init_proc_POWER8;
pcc->check_pow = check_pow_nocheck;
- cc->has_work = cpu_has_work_POWER8;
+ pcc->has_work = cpu_has_work_POWER8;
pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
@@ -8003,7 +8001,6 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
- CPUClass *cc = CPU_CLASS(oc);
dc->fw_name = "PowerPC,POWER9";
dc->desc = "POWER9";
@@ -8013,7 +8010,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
PCR_COMPAT_2_05;
pcc->init_proc = init_proc_POWER9;
pcc->check_pow = check_pow_nocheck;
- cc->has_work = cpu_has_work_POWER9;
+ pcc->has_work = cpu_has_work_POWER9;
pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
@@ -8212,7 +8209,6 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc);
- CPUClass *cc = CPU_CLASS(oc);
dc->fw_name = "PowerPC,POWER10";
dc->desc = "POWER10";
@@ -8223,7 +8219,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data)
PCR_COMPAT_2_06 | PCR_COMPAT_2_05;
pcc->init_proc = init_proc_POWER10;
pcc->check_pow = check_pow_nocheck;
- cc->has_work = cpu_has_work_POWER10;
+ pcc->has_work = cpu_has_work_POWER10;
pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB |
PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES |
PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE |
@@ -8790,7 +8786,7 @@ static void ppc_cpu_set_pc(CPUState *cs, vaddr value)
cpu->env.nip = value;
}
-static bool ppc_cpu_has_work(CPUState *cs)
+static bool cpu_has_work_default(CPUState *cs)
{
PowerPCCPU *cpu = POWERPC_CPU(cs);
CPUPPCState *env = &cpu->env;
@@ -8798,6 +8794,14 @@ static bool ppc_cpu_has_work(CPUState *cs)
return msr_ee && (cs->interrupt_request & CPU_INTERRUPT_HARD);
}
+static bool ppc_cpu_has_work(CPUState *cs)
+{
+ PowerPCCPU *cpu = POWERPC_CPU(cs);
+ PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
+
+ return pcc->has_work(cs);
+}
+
static void ppc_cpu_reset(DeviceState *dev)
{
CPUState *s = CPU(dev);
@@ -9037,6 +9041,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_unrealize(dc, ppc_cpu_unrealize,
&pcc->parent_unrealize);
pcc->pvr_match = ppc_pvr_match_default;
+ pcc->has_work = cpu_has_work_default;
device_class_set_props(dc, ppc_cpu_properties);
device_class_set_parent_reset(dc, ppc_cpu_reset, &pcc->parent_reset);
--
2.31.1
next prev parent reply other threads:[~2021-09-12 17:48 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-12 17:27 [PATCH v4 00/30] accel: Move has_work() from SysemuCPUOps to AccelOpsClass Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 01/30] accel/tcg: Restrict cpu_handle_halt() to sysemu Philippe Mathieu-Daudé
2021-09-12 18:34 ` Richard Henderson
2021-09-12 17:27 ` [PATCH v4 02/30] hw/core: Restrict cpu_has_work() " Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 03/30] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 04/30] sysemu: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 05/30] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 06/30] accel/whpx: " Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 07/30] accel/tcg: Implement AccelOpsClass::has_work() as stub Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 08/30] target/alpha: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 09/30] target/arm: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 10/30] target/avr: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 11/30] target/cris: " Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 12/30] target/hexagon: Remove unused has_work() handler Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 13/30] target/hppa: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 14/30] target/i386: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 15/30] target/m68k: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 16/30] target/microblaze: " Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 17/30] target/mips: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 18/30] target/nios2: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 19/30] target/openrisc: " Philippe Mathieu-Daudé
2021-09-12 17:27 ` Philippe Mathieu-Daudé [this message]
2021-09-12 18:46 ` [PATCH v4 20/30] target/ppc: Introduce PowerPCCPUClass::has_work() Richard Henderson
2021-09-12 17:27 ` [PATCH v4 21/30] target/ppc: Restrict has_work() handlers to sysemu and TCG Philippe Mathieu-Daudé
2021-09-12 18:49 ` Richard Henderson
2021-09-12 17:27 ` [PATCH v4 22/30] target/riscv: Restrict has_work() handler " Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 23/30] target/rx: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 24/30] target/s390x: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 25/30] target/sh4: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 26/30] target/sparc: Remove pointless use of CONFIG_TCG definition Philippe Mathieu-Daudé
2021-09-12 18:36 ` Richard Henderson
2021-09-12 17:27 ` [PATCH v4 27/30] target/sparc: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 28/30] target/tricore: " Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 29/30] target/xtensa: " Philippe Mathieu-Daudé
2021-09-12 17:27 ` [PATCH v4 30/30] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one Philippe Mathieu-Daudé
2021-09-15 18:06 ` [PATCH v4 00/30] accel: Move has_work() from SysemuCPUOps to AccelOpsClass Richard Henderson
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