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envelope-from=tongh@xilinx.com; helo=NAM10-BN7-obe.outbound.protection.outlook.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_PASS=-0.001, T_SPF_HELO_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@gmail.com, alistair@alistair23.me, tong.ho@xilinx.com, qemu-devel@nongnu.org, peter.maydell@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" This series implements the Xilinx eFUSE and BBRAM devices for the Versal and ZynqMP product families. Furthermore, both new devices are connected to the xlnx-versal-virt board and the xlnx-zcu102 board. See changes in docs/system/arm/xlnx-versal-virt.rst for detail. --- Changelogs: v2->v3: * Move drive-backend attaching to board models * Use OBJECT_DECLARE_SIMPLE_TYPE instead of OBJECT_CHECK * Use reg_array->mem directly instead of an extra mr-container * Add doc comments for .h file API * Remove "qemu/osdep.h" from .h files * Remove ad-hoc endianess detection * Remove error_abort from device models * Remove empty vmstate and mininum_version_id_old * Remove unused #define macros * Remove unavailable references from comments * Kconfig & meson.build: - Add CONFIG_XLNX_EFUSE_CRC in patch 1 - Select bbram and efuse devices from boards' Kconfig - Remove 'if' from meson.build * Fix spelling and wording in comments and docs v1->v2: * Move doc change from 1st to last of this series * Remove outdated comment of 'autogenerated by xregqemu.py' from all affected files. --- Tong Ho (9): hw/nvram: Introduce Xilinx eFuse QOM hw/nvram: Introduce Xilinx Versal eFuse device hw/nvram: Introduce Xilinx ZynqMP eFuse device hw/nvram: Introduce Xilinx battery-backed ram hw/arm: xlnx-versal-virt: Add Xilinx BBRAM device hw/arm: xlnx-versal-virt: Add Xilinx eFUSE device hw/arm: xlnx-zcu102: Add Xilinx BBRAM device hw/arm: xlnx-zcu102: Add Xilinx eFUSE device docs/system/arm: xlnx-versal-virt: BBRAM and eFUSE Usage docs/system/arm/xlnx-versal-virt.rst | 49 ++ hw/Kconfig | 2 + hw/arm/Kconfig | 2 + hw/arm/xlnx-versal-virt.c | 88 +++ hw/arm/xlnx-versal.c | 57 ++ hw/arm/xlnx-zcu102.c | 30 + hw/arm/xlnx-zynqmp.c | 49 ++ hw/nvram/Kconfig | 19 + hw/nvram/meson.build | 8 + hw/nvram/xlnx-bbram.c | 545 +++++++++++++++++ hw/nvram/xlnx-efuse-crc.c | 119 ++++ hw/nvram/xlnx-efuse.c | 280 +++++++++ hw/nvram/xlnx-versal-efuse-cache.c | 114 ++++ hw/nvram/xlnx-versal-efuse-ctrl.c | 783 ++++++++++++++++++++++++ hw/nvram/xlnx-zynqmp-efuse.c | 855 +++++++++++++++++++++++++++ include/hw/arm/xlnx-versal.h | 15 + include/hw/arm/xlnx-zynqmp.h | 5 + include/hw/nvram/xlnx-bbram.h | 54 ++ include/hw/nvram/xlnx-efuse.h | 132 +++++ include/hw/nvram/xlnx-versal-efuse.h | 68 +++ include/hw/nvram/xlnx-zynqmp-efuse.h | 44 ++ 21 files changed, 3318 insertions(+) create mode 100644 hw/nvram/xlnx-bbram.c create mode 100644 hw/nvram/xlnx-efuse-crc.c create mode 100644 hw/nvram/xlnx-efuse.c create mode 100644 hw/nvram/xlnx-versal-efuse-cache.c create mode 100644 hw/nvram/xlnx-versal-efuse-ctrl.c create mode 100644 hw/nvram/xlnx-zynqmp-efuse.c create mode 100644 include/hw/nvram/xlnx-bbram.h create mode 100644 include/hw/nvram/xlnx-efuse.h create mode 100644 include/hw/nvram/xlnx-versal-efuse.h create mode 100644 include/hw/nvram/xlnx-zynqmp-efuse.h -- 2.25.1