From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v8 15/40] accel/tcg: Introduce TCGCPUOps::has_work()
Date: Mon, 27 Sep 2021 00:26:51 +0200 [thread overview]
Message-ID: <20210926222716.1732932-16-f4bug@amsat.org> (raw)
In-Reply-To: <20210926222716.1732932-1-f4bug@amsat.org>
Introduce a target-specific has_work() handler for TCG.
Eventually call it from tcg_cpu_has_work(), our
AccelOpsClass::has_work() handler.
Inspired-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
include/hw/core/tcg-cpu-ops.h | 4 ++++
accel/tcg/tcg-accel-ops.c | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 6cbe17f2e6d..c19c507b23c 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -66,6 +66,10 @@ struct TCGCPUOps {
void (*do_interrupt)(CPUState *cpu);
#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
#ifdef CONFIG_SOFTMMU
+ /**
+ * @has_work: Callback for checking if there is work to do.
+ */
+ bool (*has_work)(CPUState *cpu);
/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
/**
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index ebaacff1842..cd44bb6d0d8 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -32,6 +32,7 @@
#include "qemu/main-loop.h"
#include "qemu/guest-random.h"
#include "exec/exec-all.h"
+#include "hw/core/tcg-cpu-ops.h"
#include "tcg-accel-ops.h"
#include "tcg-accel-ops-mttcg.h"
@@ -80,6 +81,9 @@ static bool tcg_cpu_has_work(CPUState *cpu)
if (cc->has_work) {
return cc->has_work(cpu);
}
+ if (cc->tcg_ops->has_work) {
+ return cc->tcg_ops->has_work(cpu);
+ }
return false;
}
--
2.31.1
next prev parent reply other threads:[~2021-09-26 22:35 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-26 22:26 [PATCH v8 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 01/40] accel: Simplify qemu_init_vcpu() Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 02/40] hw/core: Restrict cpu_has_work() to sysemu Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 03/40] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 04/40] hw/core: Move cpu_common_has_work() to cpu_has_work() Philippe Mathieu-Daudé
2021-09-26 23:58 ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 05/40] accel: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-26 23:59 ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 06/40] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 07/40] accel/whpx: " Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 08/40] accel/hvf: " Philippe Mathieu-Daudé
2021-09-27 0:00 ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 09/40] accel/xen: " Philippe Mathieu-Daudé
2021-09-27 0:01 ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 10/40] accel/hax: " Philippe Mathieu-Daudé
2021-09-27 0:01 ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 11/40] accel/nvmm: " Philippe Mathieu-Daudé
2021-09-27 0:02 ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 12/40] accel/qtest: " Philippe Mathieu-Daudé
2021-09-27 0:02 ` Richard Henderson
2021-09-26 22:26 ` [PATCH v8 13/40] accel/tcg: " Philippe Mathieu-Daudé
2021-09-27 0:12 ` Richard Henderson
2021-09-27 4:38 ` Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 14/40] accel: Simplify cpu_has_work() Philippe Mathieu-Daudé
2021-09-26 22:26 ` Philippe Mathieu-Daudé [this message]
2021-09-26 22:26 ` [PATCH v8 16/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 17/40] target/arm: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 18/40] target/alpha: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 19/40] target/avr: " Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 20/40] target/cris: " Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 21/40] target/hexagon: Remove unused has_work() handler Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 22/40] target/hppa: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:26 ` [PATCH v8 23/40] target/i386: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 24/40] target/m68k: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 25/40] target/microblaze: " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 26/40] target/mips: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 27/40] target/nios2: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 28/40] target/openrisc: " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 29/40] target/ppc: Introduce PowerPCCPUClass::has_work() Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 31/40] target/riscv: Restrict has_work() handler " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 32/40] target/rx: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 33/40] target/s390x: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 34/40] target/sh4: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 35/40] target/sparc: Remove pointless use of CONFIG_TCG definition Philippe Mathieu-Daudé
2021-09-29 7:06 ` Mark Cave-Ayland
2021-09-26 22:27 ` [PATCH v8 36/40] target/sparc: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-29 7:07 ` Mark Cave-Ayland
2021-09-26 22:27 ` [PATCH v8 37/40] target/tricore: " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 38/40] target/xtensa: " Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 39/40] accel/tcg: Remove CPUClass::has_work() Philippe Mathieu-Daudé
2021-09-26 22:27 ` [PATCH v8 40/40] accel/tcg: Simplify tcg_cpu_has_work() Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210926222716.1732932-16-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).