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From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: Yang Zhong <yang.zhong@intel.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>
Subject: [PULL 06/33] vl: Add sgx compound properties to expose SGX EPC sections to guest
Date: Tue, 28 Sep 2021 14:50:49 +0200	[thread overview]
Message-ID: <20210928125116.183620-7-pbonzini@redhat.com> (raw)
In-Reply-To: <20210928125116.183620-1-pbonzini@redhat.com>

From: Sean Christopherson <sean.j.christopherson@intel.com>

Because SGX EPC is enumerated through CPUID, EPC "devices" need to be
realized prior to realizing the vCPUs themselves, i.e. long before
generic devices are parsed and realized.  From a virtualization
perspective, the CPUID aspect also means that EPC sections cannot be
hotplugged without paravirtualizing the guest kernel (hardware does
not support hotplugging as EPC sections must be locked down during
pre-boot to provide EPC's security properties).

So even though EPC sections could be realized through the generic
-devices command, they need to be created much earlier for them to
actually be usable by the guest.  Place all EPC sections in a
contiguous block, somewhat arbitrarily starting after RAM above 4g.
Ensuring EPC is in a contiguous region simplifies calculations, e.g.
device memory base, PCI hole, etc..., allows dynamic calculation of the
total EPC size, e.g. exposing EPC to guests does not require -maxmem,
and last but not least allows all of EPC to be enumerated in a single
ACPI entry, which is expected by some kernels, e.g. Windows 7 and 8.

The new compound properties command for sgx like below:
 ......
 -object memory-backend-epc,id=mem1,size=28M,prealloc=on \
 -object memory-backend-epc,id=mem2,size=10M \
 -M sgx-epc.0.memdev=mem1,sgx-epc.1.memdev=mem2

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-6-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
 hw/i386/sgx-epc.c         | 20 ++++++++++++++------
 hw/i386/x86.c             | 29 +++++++++++++++++++++++++++++
 include/hw/i386/pc.h      |  3 +++
 include/hw/i386/sgx-epc.h | 14 ++++++++++++++
 include/hw/i386/x86.h     |  1 +
 qapi/machine.json         | 26 +++++++++++++++++++++++++-
 qemu-options.hx           | 10 ++++++++--
 7 files changed, 94 insertions(+), 9 deletions(-)

diff --git a/hw/i386/sgx-epc.c b/hw/i386/sgx-epc.c
index c584acc17b..6677dc74b5 100644
--- a/hw/i386/sgx-epc.c
+++ b/hw/i386/sgx-epc.c
@@ -14,13 +14,8 @@
 #include "hw/i386/sgx-epc.h"
 #include "hw/mem/memory-device.h"
 #include "hw/qdev-properties.h"
-#include "monitor/qdev.h"
 #include "qapi/error.h"
 #include "qapi/visitor.h"
-#include "qemu/config-file.h"
-#include "qemu/error-report.h"
-#include "qemu/option.h"
-#include "qemu/units.h"
 #include "target/i386/cpu.h"
 #include "exec/address-spaces.h"
 
@@ -56,6 +51,8 @@ static void sgx_epc_realize(DeviceState *dev, Error **errp)
 {
     PCMachineState *pcms = PC_MACHINE(qdev_get_machine());
     X86MachineState *x86ms = X86_MACHINE(pcms);
+    MemoryDeviceState *md = MEMORY_DEVICE(dev);
+    SGXEPCState *sgx_epc = &pcms->sgx_epc;
     SGXEPCDevice *epc = SGX_EPC(dev);
     HostMemoryBackend *hostmem;
     const char *path;
@@ -77,7 +74,18 @@ static void sgx_epc_realize(DeviceState *dev, Error **errp)
         return;
     }
 
-    error_setg(errp, "'" TYPE_SGX_EPC "' not supported");
+    epc->addr = sgx_epc->base + sgx_epc->size;
+
+    memory_region_add_subregion(&sgx_epc->mr, epc->addr - sgx_epc->base,
+                                host_memory_backend_get_memory(hostmem));
+
+    host_memory_backend_set_mapped(hostmem, true);
+
+    sgx_epc->sections = g_renew(SGXEPCDevice *, sgx_epc->sections,
+                                sgx_epc->nr_sections + 1);
+    sgx_epc->sections[sgx_epc->nr_sections++] = epc;
+
+    sgx_epc->size += memory_device_get_region_size(md, errp);
 }
 
 static void sgx_epc_unrealize(DeviceState *dev)
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 00448ed55a..41ef9a84a9 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -30,6 +30,8 @@
 #include "qapi/error.h"
 #include "qapi/qmp/qerror.h"
 #include "qapi/qapi-visit-common.h"
+#include "qapi/clone-visitor.h"
+#include "qapi/qapi-visit-machine.h"
 #include "qapi/visitor.h"
 #include "sysemu/qtest.h"
 #include "sysemu/whpx.h"
@@ -1263,6 +1265,27 @@ static void x86_machine_set_bus_lock_ratelimit(Object *obj, Visitor *v,
     visit_type_uint64(v, name, &x86ms->bus_lock_ratelimit, errp);
 }
 
+static void machine_get_sgx_epc(Object *obj, Visitor *v, const char *name,
+                                void *opaque, Error **errp)
+{
+    X86MachineState *x86ms = X86_MACHINE(obj);
+    SgxEPCList *list = x86ms->sgx_epc_list;
+
+    visit_type_SgxEPCList(v, name, &list, errp);
+}
+
+static void machine_set_sgx_epc(Object *obj, Visitor *v, const char *name,
+                                void *opaque, Error **errp)
+{
+    X86MachineState *x86ms = X86_MACHINE(obj);
+    SgxEPCList *list;
+
+    list = x86ms->sgx_epc_list;
+    visit_type_SgxEPCList(v, name, &x86ms->sgx_epc_list, errp);
+
+    qapi_free_SgxEPCList(list);
+}
+
 static void x86_machine_initfn(Object *obj)
 {
     X86MachineState *x86ms = X86_MACHINE(obj);
@@ -1322,6 +1345,12 @@ static void x86_machine_class_init(ObjectClass *oc, void *data)
                                 x86_machine_set_bus_lock_ratelimit, NULL, NULL);
     object_class_property_set_description(oc, X86_MACHINE_BUS_LOCK_RATELIMIT,
             "Set the ratelimit for the bus locks acquired in VMs");
+
+    object_class_property_add(oc, "sgx-epc", "SgxEPC",
+        machine_get_sgx_epc, machine_set_sgx_epc,
+        NULL, NULL);
+    object_class_property_set_description(oc, "sgx-epc",
+        "SGX EPC device");
 }
 
 static const TypeInfo x86_machine_info = {
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 4d2e35a152..668e48be8a 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -12,6 +12,7 @@
 #include "hw/acpi/acpi_dev_interface.h"
 #include "hw/hotplug.h"
 #include "qom/object.h"
+#include "hw/i386/sgx-epc.h"
 
 #define HPET_INTCAP "hpet-intcap"
 
@@ -49,6 +50,8 @@ typedef struct PCMachineState {
 
     /* ACPI Memory hotplug IO base address */
     hwaddr memhp_io_base;
+
+    SGXEPCState sgx_epc;
 } PCMachineState;
 
 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
diff --git a/include/hw/i386/sgx-epc.h b/include/hw/i386/sgx-epc.h
index cf3ed5c0cd..83269972e0 100644
--- a/include/hw/i386/sgx-epc.h
+++ b/include/hw/i386/sgx-epc.h
@@ -41,4 +41,18 @@ typedef struct SGXEPCDevice {
     HostMemoryBackendEpc *hostmem;
 } SGXEPCDevice;
 
+/*
+ * @base: address in guest physical address space where EPC regions start
+ * @mr: address space container for memory devices
+ */
+typedef struct SGXEPCState {
+    uint64_t base;
+    uint64_t size;
+
+    MemoryRegion mr;
+
+    struct SGXEPCDevice **sections;
+    int nr_sections;
+} SGXEPCState;
+
 #endif
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 6e9244a82c..23267a3674 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -62,6 +62,7 @@ struct X86MachineState {
     unsigned pci_irq_mask;
     unsigned apic_id_limit;
     uint16_t boot_cpus;
+    SgxEPCList *sgx_epc_list;
 
     OnOffAuto smm;
     OnOffAuto acpi;
diff --git a/qapi/machine.json b/qapi/machine.json
index 32d47f4e35..26c539fe2c 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -1225,7 +1225,6 @@
 ##
 { 'struct': 'VirtioMEMDeviceInfoWrapper',
   'data': { 'data': 'VirtioMEMDeviceInfo' } }
-
 ##
 # @MemoryDeviceInfo:
 #
@@ -1246,6 +1245,31 @@
           }
 }
 
+##
+# @SgxEPC:
+#
+# Sgx EPC cmdline information
+#
+# @memdev: memory backend linked with device
+#
+# Since: 6.2
+##
+{ 'struct': 'SgxEPC',
+  'data': { 'memdev': 'str' } }
+
+##
+# @SgxEPCProperties:
+#
+# SGX properties of machine types.
+#
+# @sgx-epc: list of ids of memory-backend-epc objects.
+#
+# Since: 6.2
+##
+{ 'struct': 'SgxEPCProperties',
+  'data': { 'sgx-epc': ['SgxEPC'] }
+}
+
 ##
 # @query-memory-devices:
 #
diff --git a/qemu-options.hx b/qemu-options.hx
index 8f603cc7e6..ceca52818a 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -126,8 +126,14 @@ SRST
             -m 512M
 ERST
 
-HXCOMM Deprecated by -machine
-DEF("M", HAS_ARG, QEMU_OPTION_M, "", QEMU_ARCH_ALL)
+DEF("M", HAS_ARG, QEMU_OPTION_M,
+    "                sgx-epc.0.memdev=memid\n",
+    QEMU_ARCH_ALL)
+
+SRST
+``sgx-epc.0.memdev=@var{memid}``
+    Define an SGX EPC section.
+ERST
 
 DEF("cpu", HAS_ARG, QEMU_OPTION_cpu,
     "-cpu cpu        select CPU ('-cpu help' for list)\n", QEMU_ARCH_ALL)
-- 
2.31.1




  parent reply	other threads:[~2021-09-28 12:59 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-28 12:50 [PULL 00/33] x86 and misc changes for 2021-09-28 Paolo Bonzini
2021-09-28 12:50 ` [PULL 01/33] memory: Add RAM_PROTECTED flag to skip IOMMU mappings Paolo Bonzini
2021-09-28 12:50 ` [PULL 02/33] Kconfig: Add CONFIG_SGX support Paolo Bonzini
2021-09-28 12:50 ` [PULL 03/33] hostmem: Add hostmem-epc as a backend for SGX EPC Paolo Bonzini
2021-09-28 12:50 ` [PULL 04/33] qom: Add memory-backend-epc ObjectOptions support Paolo Bonzini
2021-09-28 12:50 ` [PULL 05/33] i386: Add 'sgx-epc' device to expose EPC sections to guest Paolo Bonzini
2021-11-09 14:25   ` Thomas Huth
2021-11-09 17:48     ` Paolo Bonzini
2021-11-10  6:41       ` Yang Zhong
2021-11-10  7:00         ` Thomas Huth
2021-09-28 12:50 ` Paolo Bonzini [this message]
2021-09-28 12:50 ` [PULL 07/33] i386: Add primary SGX CPUID and MSR defines Paolo Bonzini
2021-09-28 12:50 ` [PULL 08/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX Paolo Bonzini
2021-09-28 12:50 ` [PULL 09/33] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX Paolo Bonzini
2021-09-28 12:50 ` [PULL 10/33] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX Paolo Bonzini
2021-09-28 12:50 ` [PULL 11/33] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs Paolo Bonzini
2021-09-28 12:50 ` [PULL 12/33] i386: Add feature control MSR dependency when SGX is enabled Paolo Bonzini
2021-09-28 12:50 ` [PULL 13/33] i386: Update SGX CPUID info according to hardware/KVM/user input Paolo Bonzini
2021-09-28 12:50 ` [PULL 14/33] i386: kvm: Add support for exposing PROVISIONKEY to guest Paolo Bonzini
2021-09-28 12:50 ` [PULL 15/33] i386: Propagate SGX CPUID sub-leafs to KVM Paolo Bonzini
2021-09-28 12:50 ` [PULL 16/33] Adjust min CPUID level to 0x12 when SGX is enabled Paolo Bonzini
2021-09-28 12:51 ` [PULL 17/33] hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly Paolo Bonzini
2021-09-28 12:51 ` [PULL 18/33] hw/i386/pc: Account for SGX EPC sections when calculating device memory Paolo Bonzini
2021-09-28 12:51 ` [PULL 19/33] i386/pc: Add e820 entry for SGX EPC section(s) Paolo Bonzini
2021-09-28 12:51 ` [PULL 20/33] i386: acpi: Add SGX EPC entry to ACPI tables Paolo Bonzini
2021-09-28 12:51 ` [PULL 21/33] q35: Add support for SGX EPC Paolo Bonzini
2021-09-28 12:51 ` [PULL 22/33] i440fx: " Paolo Bonzini
2021-09-28 12:51 ` [PULL 23/33] sgx-epc: Add the fill_device_info() callback support Paolo Bonzini
2021-09-28 12:51 ` [PULL 24/33] docs/system: Add SGX documentation to the system manual Paolo Bonzini
2021-09-28 12:51 ` [PULL 25/33] target/i386: Add HMP and QMP interfaces for SGX Paolo Bonzini
2021-09-28 12:51 ` [PULL 26/33] target/i386: Add the query-sgx-capabilities QMP command Paolo Bonzini
2021-09-28 12:51 ` [PULL 27/33] meson: unpack edk2 firmware even if --disable-blobs Paolo Bonzini
2021-09-28 12:51 ` [PULL 28/33] tests: qtest: bios-tables-test depends on the unpacked edk2 ROMs Paolo Bonzini
2021-09-28 12:51 ` [PULL 29/33] target/i386: Fix memory leak in sev_read_file_base64() Paolo Bonzini
2021-09-28 12:51 ` [PULL 30/33] memory: Name all the memory listeners Paolo Bonzini
2021-09-28 12:51 ` [PULL 31/33] memory: Add tracepoint for dirty sync Paolo Bonzini
2021-09-28 12:51 ` [PULL 32/33] build-sys: add HAVE_IPPROTO_MPTCP Paolo Bonzini
2021-09-28 12:51 ` [PULL 33/33] meson_options.txt: Switch the default value for the vnc option to 'auto' Paolo Bonzini
2021-09-29 20:19 ` [PULL 00/33] x86 and misc changes for 2021-09-28 Peter Maydell

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