[RFC PATCH 0/1] hw: aspeed_adc: Add initial Aspeed ADC support

[<pdel@fb.com>]

From: Peter Delevoryas <pdel@fb.com>

Hey everyone,

This patch mostly just does the basic, boilerplate setup for the ADC, so
that we can start adding more ADC feature emulation in the future.

The only device behavior that I tried to add was emulating the control
initialization sequence and the sequence for enabling "Auto compensating
sensing mode". I didn't even use something like a timer to delay the
response for each register write by a few cycles, it just immediately
updates the register.

I was looking at the Nuvoton ADC model, "hw/adc/npcm7xx_adc.c", and I
noticed that it has "enter_reset" and "hold_reset" methods, should I
implement the initialization sequence as part of the "Resettable"
interface? (It seems like I probably should, I'm just not really sure).

I could also add a timer to emulate the time it takes to initialize the
ADC, I see the Nuvoton module also has a constant
"NPCM7XX_ADC_RESET_CYCLES" but it's not used anywhere, but I imagine I
could do something similar to the conversion timer in that module?  I
think the upstream drivers poll every 0.5 ms and timeout after 500 ms,
so I could use that as a guide.

This patch, even without any conversion emulation, is useful to me
because some OpenBMC platforms use Aspeed SDK ADC drivers, and they
don't have error handling if the ADC doesn't respond, so they can't boot
in QEMU without some basic emulation like this.

Thanks,
Peter

Peter Delevoryas (1):
  hw: aspeed_adc: Add initial Aspeed ADC support

 hw/adc/aspeed_adc.c         | 205 ++++++++++++++++++++++++++++++++++++
 hw/adc/meson.build          |   1 +
 hw/adc/trace-events         |   4 +
 hw/arm/aspeed_ast2600.c     |  18 ++++
 hw/arm/aspeed_soc.c         |  17 +++
 include/hw/adc/aspeed_adc.h |  48 +++++++++
 include/hw/arm/aspeed_soc.h |   5 +
 7 files changed, 298 insertions(+)
 create mode 100644 hw/adc/aspeed_adc.c
 create mode 100644 include/hw/adc/aspeed_adc.h

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2.30.2